LLVM 22.0.0git
ARMWinCOFFObjectWriter.cpp
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1//===-- ARMWinCOFFObjectWriter.cpp - ARM Windows COFF Object Writer -- C++ -==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
11#include "llvm/ADT/Twine.h"
14#include "llvm/MC/MCContext.h"
15#include "llvm/MC/MCExpr.h"
16#include "llvm/MC/MCFixup.h"
18#include "llvm/MC/MCValue.h"
21
22using namespace llvm;
23
24namespace {
25
26class ARMWinCOFFObjectWriter : public MCWinCOFFObjectTargetWriter {
27public:
28 ARMWinCOFFObjectWriter()
30 }
31
32 ~ARMWinCOFFObjectWriter() override = default;
33
34 unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
35 const MCFixup &Fixup, bool IsCrossSection,
36 const MCAsmBackend &MAB) const override;
37
38 bool recordRelocation(const MCFixup &) const override;
39};
40
41} // end anonymous namespace
42
43unsigned ARMWinCOFFObjectWriter::getRelocType(MCContext &Ctx,
44 const MCValue &Target,
45 const MCFixup &Fixup,
46 bool IsCrossSection,
47 const MCAsmBackend &MAB) const {
48 auto Spec = Target.getSpecifier();
49 unsigned FixupKind = Fixup.getKind();
50 bool PCRel = false;
51 if (IsCrossSection) {
52 if (PCRel || FixupKind != FK_Data_4) {
53 Ctx.reportError(Fixup.getLoc(), "Cannot represent this expression");
55 }
57 PCRel = true;
58 }
59
60
61 switch (FixupKind) {
62 default: {
63 Ctx.reportError(Fixup.getLoc(), "unsupported relocation type");
65 }
66 case FK_Data_4:
67 if (PCRel)
69 switch (Spec) {
74 default:
76 }
77 case FK_SecRel_2:
79 case FK_SecRel_4:
91 }
92}
93
94bool ARMWinCOFFObjectWriter::recordRelocation(const MCFixup &Fixup) const {
95 return static_cast<unsigned>(Fixup.getKind()) != ARM::fixup_t2_movt_hi16;
96}
97
98namespace llvm {
99
100std::unique_ptr<MCObjectTargetWriter>
102 return std::make_unique<ARMWinCOFFObjectWriter>();
103}
104
105} // end namespace llvm
PowerPC TLS Dynamic Call Fixup
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:55
Context object for machine code objects.
Definition: MCContext.h:83
LLVM_ABI void reportError(SMLoc L, const Twine &Msg)
Definition: MCContext.cpp:1115
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:61
virtual bool recordRelocation(const MCFixup &) const
virtual unsigned getRelocType(MCContext &Ctx, const MCValue &Target, const MCFixup &Fixup, bool IsCrossSection, const MCAsmBackend &MAB) const =0
Target - Wrapper for Target specific information.
@ fixup_t2_movt_hi16
Definition: ARMFixupKinds.h:99
@ fixup_arm_thumb_blx
Definition: ARMFixupKinds.h:84
@ fixup_t2_uncondbranch
Definition: ARMFixupKinds.h:57
@ fixup_t2_condbranch
Definition: ARMFixupKinds.h:54
@ fixup_arm_thumb_bl
Definition: ARMFixupKinds.h:81
@ fixup_t2_movw_lo16
@ IMAGE_FILE_MACHINE_ARMNT
Definition: COFF.h:100
@ IMAGE_REL_ARM_BRANCH20T
Definition: COFF.h:394
@ IMAGE_REL_ARM_ADDR32NB
Definition: COFF.h:383
@ IMAGE_REL_ARM_ADDR32
Definition: COFF.h:382
@ IMAGE_REL_ARM_MOV32T
Definition: COFF.h:393
@ IMAGE_REL_ARM_BRANCH24T
Definition: COFF.h:395
@ IMAGE_REL_ARM_ABSOLUTE
Definition: COFF.h:381
@ IMAGE_REL_ARM_REL32
Definition: COFF.h:389
@ IMAGE_REL_ARM_BLX23T
Definition: COFF.h:396
@ IMAGE_REL_ARM_SECREL
Definition: COFF.h:391
@ IMAGE_REL_ARM_SECTION
Definition: COFF.h:390
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ FK_SecRel_2
A two-byte section relative fixup.
Definition: MCFixup.h:40
@ FK_Data_4
A four-byte fixup.
Definition: MCFixup.h:36
@ FK_SecRel_4
A four-byte section relative fixup.
Definition: MCFixup.h:41
std::unique_ptr< MCObjectTargetWriter > createARMWinCOFFObjectWriter()
Construct an ARM PE/COFF object writer.