LLVM 22.0.0git
RISCVAsmBackend.h
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1//===-- RISCVAsmBackend.h - RISC-V Assembler Backend ----------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVASMBACKEND_H
10#define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVASMBACKEND_H
11
15#include "llvm/ADT/StringMap.h"
18
19namespace llvm {
20class MCAssembler;
21class MCObjectTargetWriter;
22class raw_ostream;
23
25 const MCSubtargetInfo &STI;
26 uint8_t OSABI;
27 bool Is64Bit;
29 // Temporary symbol used to check whether a PC-relative fixup is resolved.
30 MCSymbol *PCRelTemp = nullptr;
31
32 bool isPCRelFixupResolved(const MCSymbol *SymA, const MCFragment &F);
33
34 StringMap<MCSymbol *> VendorSymbols;
35
36public:
37 RISCVAsmBackend(const MCSubtargetInfo &STI, uint8_t OSABI, bool Is64Bit,
38 bool IsLittleEndian, const MCTargetOptions &Options);
39 ~RISCVAsmBackend() override = default;
40
41 std::optional<bool> evaluateFixup(const MCFragment &, MCFixup &, MCValue &,
42 uint64_t &) override;
43 bool addReloc(const MCFragment &, const MCFixup &, const MCValue &,
44 uint64_t &FixedValue, bool IsResolved);
45
46 void maybeAddVendorReloc(const MCFragment &, const MCFixup &);
47
48 void applyFixup(const MCFragment &, const MCFixup &, const MCValue &Target,
49 uint8_t *Data, uint64_t Value, bool IsResolved) override;
50
51 std::unique_ptr<MCObjectTargetWriter>
52 createObjectTargetWriter() const override;
53
55 const MCValue &, uint64_t,
56 bool) const override;
57
58 std::optional<MCFixupKind> getFixupKind(StringRef Name) const override;
59
60 MCFixupKindInfo getFixupKindInfo(MCFixupKind Kind) const override;
61
63 const MCSubtargetInfo &STI) const override;
64 void relaxInstruction(MCInst &Inst,
65 const MCSubtargetInfo &STI) const override;
66
67 bool relaxAlign(MCFragment &F, unsigned &Size) override;
68 bool relaxDwarfLineAddr(MCFragment &) const override;
69 bool relaxDwarfCFA(MCFragment &) const override;
70 std::pair<bool, bool> relaxLEB128(MCFragment &LF,
71 int64_t &Value) const override;
72
74 const MCSubtargetInfo *STI) const override;
75
77};
78}
79
80#endif
This file defines the StringMap class.
std::string Name
uint64_t Size
static LVOptions Options
Definition: LVOptions.cpp:25
#define F(x, y, z)
Definition: MD5.cpp:55
mir Rename Register Operands
raw_pwrite_stream & OS
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:55
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:61
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:188
Generic base class for all target subtargets.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:42
std::optional< bool > evaluateFixup(const MCFragment &, MCFixup &, MCValue &, uint64_t &) override
std::unique_ptr< MCObjectTargetWriter > createObjectTargetWriter() const override
void relaxInstruction(MCInst &Inst, const MCSubtargetInfo &STI) const override
Relax the instruction in the given fragment to the next wider instruction.
bool relaxAlign(MCFragment &F, unsigned &Size) override
const MCTargetOptions & getTargetOptions() const
bool addReloc(const MCFragment &, const MCFixup &, const MCValue &, uint64_t &FixedValue, bool IsResolved)
MCFixupKindInfo getFixupKindInfo(MCFixupKind Kind) const override
Get information on a fixup kind.
std::pair< bool, bool > relaxLEB128(MCFragment &LF, int64_t &Value) const override
void applyFixup(const MCFragment &, const MCFixup &, const MCValue &Target, uint8_t *Data, uint64_t Value, bool IsResolved) override
bool writeNopData(raw_ostream &OS, uint64_t Count, const MCSubtargetInfo *STI) const override
Write an (optimal) nop sequence of Count bytes to the given output.
void maybeAddVendorReloc(const MCFragment &, const MCFixup &)
bool mayNeedRelaxation(unsigned Opcode, ArrayRef< MCOperand > Operands, const MCSubtargetInfo &STI) const override
Check whether the given instruction (encoded as Opcode+Operands) may need relaxation.
bool fixupNeedsRelaxationAdvanced(const MCFragment &, const MCFixup &, const MCValue &, uint64_t, bool) const override
Target specific predicate for whether a given fixup requires the associated instruction to be relaxed...
~RISCVAsmBackend() override=default
std::optional< MCFixupKind > getFixupKind(StringRef Name) const override
Map a relocation name used in .reloc to a fixup kind.
bool relaxDwarfCFA(MCFragment &) const override
bool relaxDwarfLineAddr(MCFragment &) const override
StringMap - This is an unconventional map that is specialized for handling keys that are "strings",...
Definition: StringMap.h:133
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:55
Target - Wrapper for Target specific information.
LLVM Value Representation.
Definition: Value.h:75
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:53
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
Target independent information on a fixup kind.
Definition: MCAsmBackend.h:38