Provide an instruction scheduling machine model to CodeGen passes. More...

#include "llvm/CodeGen/TargetSchedule.h"

Public Types
using	ProcResIter = const MCWriteProcResEntry *

Public Member Functions
	TargetSchedModel ()
LLVM_ABI void	init (const TargetSubtargetInfo *TSInfo, bool EnableSModel=true, bool EnableSItins=true)
	Initialize the machine model for instruction scheduling.
LLVM_ABI const MCSchedClassDesc *	resolveSchedClass (const MachineInstr *MI) const
	Return the MCSchedClassDesc for this instruction.
const TargetSubtargetInfo *	getSubtargetInfo () const
	TargetSubtargetInfo getter.
const TargetInstrInfo *	getInstrInfo () const
	TargetInstrInfo getter.
LLVM_ABI bool	hasInstrSchedModel () const
	Return true if this machine model includes an instruction-level scheduling model.
const MCSchedModel *	getMCSchedModel () const
LLVM_ABI bool	hasInstrItineraries () const
	Return true if this machine model includes cycle-to-cycle itinerary data.
const InstrItineraryData *	getInstrItineraries () const
bool	hasInstrSchedModelOrItineraries () const
	Return true if this machine model includes an instruction-level scheduling model or cycle-to-cycle itinerary data.
LLVM_ABI bool	enableIntervals () const
unsigned	getProcessorID () const
	Identify the processor corresponding to the current subtarget.
unsigned	getIssueWidth () const
	Maximum number of micro-ops that may be scheduled per cycle.
LLVM_ABI bool	mustBeginGroup (const MachineInstr MI, const MCSchedClassDesc SC=nullptr) const
	Return true if new group must begin.
LLVM_ABI bool	mustEndGroup (const MachineInstr MI, const MCSchedClassDesc SC=nullptr) const
	Return true if current group must end.
LLVM_ABI unsigned	getNumMicroOps (const MachineInstr MI, const MCSchedClassDesc SC=nullptr) const
	Return the number of issue slots required for this MI.
unsigned	getNumProcResourceKinds () const
	Get the number of kinds of resources for this target.
const MCProcResourceDesc *	getProcResource (unsigned PIdx) const
	Get a processor resource by ID for convenience.
const char *	getResourceName (unsigned PIdx) const
ProcResIter	getWriteProcResBegin (const MCSchedClassDesc *SC) const
ProcResIter	getWriteProcResEnd (const MCSchedClassDesc *SC) const
unsigned	getResourceFactor (unsigned ResIdx) const
	Multiply the number of units consumed for a resource by this factor to normalize it relative to other resources.
unsigned	getMicroOpFactor () const
	Multiply number of micro-ops by this factor to normalize it relative to other resources.
unsigned	getLatencyFactor () const
	Multiply cycle count by this factor to normalize it relative to other resources.
unsigned	getMicroOpBufferSize () const
	Number of micro-ops that may be buffered for OOO execution.
int	getResourceBufferSize (unsigned PIdx) const
	Number of resource units that may be buffered for OOO execution.
LLVM_ABI unsigned	computeOperandLatency (const MachineInstr DefMI, unsigned DefOperIdx, const MachineInstr UseMI, unsigned UseOperIdx) const
	Compute operand latency based on the available machine model.
LLVM_ABI unsigned	computeInstrLatency (const MachineInstr *MI, bool UseDefaultDefLatency=true) const
	Compute the instruction latency based on the available machine model.
LLVM_ABI unsigned	computeInstrLatency (const MCInst &Inst) const
LLVM_ABI unsigned	computeInstrLatency (unsigned Opcode) const
LLVM_ABI unsigned	computeOutputLatency (const MachineInstr DefMI, unsigned DefOperIdx, const MachineInstr DepMI) const
	Output dependency latency of a pair of defs of the same register.
LLVM_ABI double	computeReciprocalThroughput (const MachineInstr *MI) const
	Compute the reciprocal throughput of the given instruction.
LLVM_ABI double	computeReciprocalThroughput (const MCInst &MI) const
LLVM_ABI double	computeReciprocalThroughput (unsigned Opcode) const

Detailed Description

Provide an instruction scheduling machine model to CodeGen passes.

Definition at line 31 of file TargetSchedule.h.

Member Typedef Documentation

◆ ProcResIter

using llvm::TargetSchedModel::ProcResIter = const MCWriteProcResEntry *

Definition at line 142 of file TargetSchedule.h.

Constructor & Destructor Documentation

◆ TargetSchedModel()

llvm::TargetSchedModel::TargetSchedModel ( )

inline

Definition at line 60 of file TargetSchedule.h.

References llvm::Default.

Member Function Documentation

◆ computeInstrLatency() [1/3]

unsigned TargetSchedModel::computeInstrLatency	(	const MachineInstr *	MI,
		bool	UseDefaultDefLatency = true ) const

Compute the instruction latency based on the available machine model.

Compute and return the expected latency of this instruction independent of a particular use. computeOperandLatency is the preferred API, but this is occasionally useful to help estimate instruction cost.

If UseDefaultDefLatency is false and no new machine sched model is present this method falls back to TII->getInstrLatency with an empty instruction itinerary (this is so we preserve the previous behavior of the if converter after moving it to TargetSchedModel).

Definition at line 254 of file TargetSchedule.cpp.

References hasInstrItineraries(), hasInstrSchedModel(), llvm::MCSchedClassDesc::isValid(), MI, and resolveSchedClass().

◆ computeInstrLatency() [2/3]

unsigned TargetSchedModel::computeInstrLatency ( const MCInst & Inst ) const

Definition at line 247 of file TargetSchedule.cpp.

References capLatency(), llvm::MCInst::getOpcode(), and hasInstrSchedModel().

◆ computeInstrLatency() [3/3]

unsigned TargetSchedModel::computeInstrLatency ( unsigned Opcode ) const

Definition at line 241 of file TargetSchedule.cpp.

References assert(), capLatency(), and hasInstrSchedModel().

◆ computeOperandLatency()

unsigned TargetSchedModel::computeOperandLatency	(	const MachineInstr *	DefMI,
		unsigned	DefOperIdx,
		const MachineInstr *	UseMI,
		unsigned	UseOperIdx ) const

Compute operand latency based on the available machine model.

Compute and return the latency of the given data dependent def and use when the operand indices are already known. UseMI may be NULL for an unknown user.

Definition at line 170 of file TargetSchedule.cpp.

References capLatency(), llvm::MCWriteLatencyEntry::Cycles, DefMI, llvm::errs(), findDefIdx(), findUseIdx(), hasInstrItineraries(), hasInstrSchedModel(), llvm::MCSchedClassDesc::isValid(), llvm::Latency, llvm_unreachable, llvm::MCSchedClassDesc::NumReadAdvanceEntries, resolveSchedClass(), UseMI, and llvm::MCWriteLatencyEntry::WriteResourceID.

Referenced by llvm::AArch64Subtarget::adjustSchedDependency(), pushDepHeight(), and updatePhysDepsUpwards().

◆ computeOutputLatency()

unsigned TargetSchedModel::computeOutputLatency	(	const MachineInstr *	DefMI,
		unsigned	DefOperIdx,
		const MachineInstr *	DepMI ) const

Output dependency latency of a pair of defs of the same register.

This is typically one cycle.

Definition at line 270 of file TargetSchedule.cpp.

References DefMI, llvm::TargetSubtargetInfo::getRegisterInfo(), llvm::MachineFunction::getSubtarget(), hasInstrSchedModel(), llvm::MCSchedClassDesc::isValid(), llvm::MachineInstr::readsRegister(), resolveSchedClass(), and TRI.

◆ computeReciprocalThroughput() [1/3]

double TargetSchedModel::computeReciprocalThroughput ( const MachineInstr * MI ) const

Compute the reciprocal throughput of the given instruction.

Definition at line 306 of file TargetSchedule.cpp.

References getInstrItineraries(), llvm::MCSchedModel::getReciprocalThroughput(), hasInstrItineraries(), hasInstrSchedModel(), MI, and resolveSchedClass().

Referenced by computeReciprocalThroughput().

◆ computeReciprocalThroughput() [2/3]

double TargetSchedModel::computeReciprocalThroughput ( const MCInst & MI ) const

Definition at line 335 of file TargetSchedule.cpp.

References computeReciprocalThroughput(), hasInstrSchedModel(), and MI.

◆ computeReciprocalThroughput() [3/3]

double TargetSchedModel::computeReciprocalThroughput ( unsigned Opcode ) const

Definition at line 320 of file TargetSchedule.cpp.

References getInstrItineraries(), llvm::MCSchedModel::getReciprocalThroughput(), hasInstrItineraries(), hasInstrSchedModel(), llvm::MCSchedClassDesc::isValid(), and llvm::MCSchedClassDesc::isVariant().

◆ enableIntervals()

bool TargetSchedModel::enableIntervals ( ) const

Definition at line 341 of file TargetSchedule.cpp.

References ForceEnableIntervals.

◆ getInstrInfo()

const TargetInstrInfo * llvm::TargetSchedModel::getInstrInfo ( ) const

inline

TargetInstrInfo getter.

Definition at line 78 of file TargetSchedule.h.

◆ getInstrItineraries()

const InstrItineraryData * llvm::TargetSchedModel::getInstrItineraries ( ) const

inline

Definition at line 95 of file TargetSchedule.h.

References hasInstrItineraries().

Referenced by computeReciprocalThroughput(), computeReciprocalThroughput(), and llvm::TargetInstrInfo::hasLowDefLatency().

◆ getIssueWidth()

unsigned llvm::TargetSchedModel::getIssueWidth ( ) const

inline

Maximum number of micro-ops that may be scheduled per cycle.

Definition at line 111 of file TargetSchedule.h.

Referenced by llvm::PPCTTIImpl::isHardwareLoopProfitable().

◆ getLatencyFactor()

unsigned llvm::TargetSchedModel::getLatencyFactor ( ) const

inline

Multiply cycle count by this factor to normalize it relative to other resources.

This is the number of resource units per cycle.

Definition at line 168 of file TargetSchedule.h.

◆ getMCSchedModel()

const MCSchedModel * llvm::TargetSchedModel::getMCSchedModel ( ) const

inline

Definition at line 87 of file TargetSchedule.h.

◆ getMicroOpBufferSize()

unsigned llvm::TargetSchedModel::getMicroOpBufferSize ( ) const

inline

Number of micro-ops that may be buffered for OOO execution.

Definition at line 173 of file TargetSchedule.h.

◆ getMicroOpFactor()

unsigned llvm::TargetSchedModel::getMicroOpFactor ( ) const

inline

Multiply number of micro-ops by this factor to normalize it relative to other resources.

Definition at line 162 of file TargetSchedule.h.

Referenced by llvm::SchedRemainder::init().

◆ getNumMicroOps()

unsigned TargetSchedModel::getNumMicroOps	(	const MachineInstr *	MI,
		const MCSchedClassDesc *	SC = nullptr ) const

Return the number of issue slots required for this MI.

Definition at line 92 of file TargetSchedule.cpp.

References hasInstrItineraries(), hasInstrSchedModel(), llvm::MCSchedClassDesc::isValid(), MI, llvm::MCSchedClassDesc::NumMicroOps, and resolveSchedClass().

Referenced by llvm::SchedRemainder::init().

◆ getNumProcResourceKinds()

unsigned llvm::TargetSchedModel::getNumProcResourceKinds ( ) const

inline

Get the number of kinds of resources for this target.

Definition at line 125 of file TargetSchedule.h.

Referenced by llvm::SchedRemainder::init().

◆ getProcessorID()

unsigned llvm::TargetSchedModel::getProcessorID ( ) const

inline

Identify the processor corresponding to the current subtarget.

Definition at line 108 of file TargetSchedule.h.

◆ getProcResource()

const MCProcResourceDesc * llvm::TargetSchedModel::getProcResource ( unsigned PIdx ) const

inline

Get a processor resource by ID for convenience.

Definition at line 130 of file TargetSchedule.h.

◆ getResourceBufferSize()

int llvm::TargetSchedModel::getResourceBufferSize ( unsigned PIdx ) const

inline

Number of resource units that may be buffered for OOO execution.

Returns: The buffer size in resource units or -1 for unlimited.

Definition at line 177 of file TargetSchedule.h.

◆ getResourceFactor()

unsigned llvm::TargetSchedModel::getResourceFactor ( unsigned ResIdx ) const

inline

Multiply the number of units consumed for a resource by this factor to normalize it relative to other resources.

Definition at line 156 of file TargetSchedule.h.

Referenced by llvm::SchedRemainder::init().

◆ getResourceName()

const char * llvm::TargetSchedModel::getResourceName ( unsigned PIdx ) const

inline

Definition at line 135 of file TargetSchedule.h.

◆ getSubtargetInfo()

const TargetSubtargetInfo * llvm::TargetSchedModel::getSubtargetInfo ( ) const

inline

TargetSubtargetInfo getter.

Definition at line 75 of file TargetSchedule.h.

◆ getWriteProcResBegin()

ProcResIter llvm::TargetSchedModel::getWriteProcResBegin ( const MCSchedClassDesc * SC ) const

inline

Definition at line 146 of file TargetSchedule.h.

Referenced by llvm::SchedRemainder::init().

◆ getWriteProcResEnd()

ProcResIter llvm::TargetSchedModel::getWriteProcResEnd ( const MCSchedClassDesc * SC ) const

inline

Definition at line 150 of file TargetSchedule.h.

Referenced by llvm::SchedRemainder::init().

◆ hasInstrItineraries()

bool TargetSchedModel::hasInstrItineraries ( ) const

Return true if this machine model includes cycle-to-cycle itinerary data.

This models scheduling at each stage in the processor pipeline.

Definition at line 40 of file TargetSchedule.cpp.

Referenced by computeInstrLatency(), computeOperandLatency(), computeReciprocalThroughput(), computeReciprocalThroughput(), getInstrItineraries(), getNumMicroOps(), and hasInstrSchedModelOrItineraries().

◆ hasInstrSchedModel()

bool TargetSchedModel::hasInstrSchedModel ( ) const

Return true if this machine model includes an instruction-level scheduling model.

This is more detailed than the course grain IssueWidth and default latency properties, but separate from the per-cycle itinerary data.

Definition at line 36 of file TargetSchedule.cpp.

Referenced by computeInstrLatency(), computeInstrLatency(), computeInstrLatency(), computeOperandLatency(), computeOutputLatency(), computeReciprocalThroughput(), computeReciprocalThroughput(), computeReciprocalThroughput(), getNumMicroOps(), hasInstrSchedModelOrItineraries(), llvm::SchedRemainder::init(), mustBeginGroup(), and mustEndGroup().

◆ hasInstrSchedModelOrItineraries()

bool llvm::TargetSchedModel::hasInstrSchedModelOrItineraries ( ) const

inline

Return true if this machine model includes an instruction-level scheduling model or cycle-to-cycle itinerary data.

Definition at line 103 of file TargetSchedule.h.

References hasInstrItineraries(), and hasInstrSchedModel().

◆ init()

void TargetSchedModel::init	(	const TargetSubtargetInfo *	TSInfo,
		bool	EnableSModel = true,
		bool	EnableSItins = true )

Initialize the machine model for instruction scheduling.

The machine model API keeps a copy of the top-level MCSchedModel table indices and may query TargetSubtargetInfo and TargetInstrInfo to resolve dynamic properties.

Definition at line 44 of file TargetSchedule.cpp.

References llvm::TargetSubtargetInfo::getInstrInfo(), and llvm::MCSubtargetInfo::getSchedModel().

Referenced by llvm::PPCTTIImpl::isHardwareLoopProfitable().

◆ mustBeginGroup()

bool TargetSchedModel::mustBeginGroup	(	const MachineInstr *	MI,
		const MCSchedClassDesc *	SC = nullptr ) const

Return true if new group must begin.

Returns true only if instruction is specified as single issue.

Definition at line 70 of file TargetSchedule.cpp.

References llvm::MCSchedClassDesc::BeginGroup, hasInstrSchedModel(), llvm::MCSchedClassDesc::isValid(), MI, and resolveSchedClass().

◆ mustEndGroup()

bool TargetSchedModel::mustEndGroup	(	const MachineInstr *	MI,
		const MCSchedClassDesc *	SC = nullptr ) const

Return true if current group must end.

Definition at line 81 of file TargetSchedule.cpp.

References llvm::MCSchedClassDesc::EndGroup, hasInstrSchedModel(), llvm::MCSchedClassDesc::isValid(), MI, and resolveSchedClass().

◆ resolveSchedClass()

const MCSchedClassDesc * TargetSchedModel::resolveSchedClass ( const MachineInstr * MI ) const

Return the MCSchedClassDesc for this instruction.

Some SchedClasses require evaluation of predicates that depend on instruction operands or flags.

Definition at line 117 of file TargetSchedule.cpp.

References assert(), llvm::MCSchedClassDesc::isValid(), llvm::MCSchedClassDesc::isVariant(), and MI.

Referenced by computeInstrLatency(), computeOperandLatency(), computeOutputLatency(), computeReciprocalThroughput(), getNumMicroOps(), mustBeginGroup(), and mustEndGroup().

The documentation for this class was generated from the following files:

include/llvm/CodeGen/TargetSchedule.h
lib/CodeGen/TargetSchedule.cpp

Public Types

Public Member Functions

Detailed Description

Member Typedef Documentation

◆ ProcResIter

Constructor & Destructor Documentation

◆ TargetSchedModel()

Member Function Documentation

◆ computeInstrLatency() [1/3]

◆ computeInstrLatency() [2/3]

◆ computeInstrLatency() [3/3]

◆ computeOperandLatency()

◆ computeOutputLatency()

◆ computeReciprocalThroughput() [1/3]

◆ computeReciprocalThroughput() [2/3]

◆ computeReciprocalThroughput() [3/3]

◆ enableIntervals()

◆ getInstrInfo()

◆ getInstrItineraries()

◆ getIssueWidth()

◆ getLatencyFactor()

◆ getMCSchedModel()

◆ getMicroOpBufferSize()

◆ getMicroOpFactor()

◆ getNumMicroOps()

◆ getNumProcResourceKinds()

◆ getProcessorID()

◆ getProcResource()

◆ getResourceBufferSize()

◆ getResourceFactor()

◆ getResourceName()

◆ getSubtargetInfo()

◆ getWriteProcResBegin()

◆ getWriteProcResEnd()

◆ hasInstrItineraries()

◆ hasInstrSchedModel()

◆ hasInstrSchedModelOrItineraries()

◆ init()

◆ mustBeginGroup()

◆ mustEndGroup()

◆ resolveSchedClass()