core/sync/atomic.rs
1//! Atomic types
2//!
3//! Atomic types provide primitive shared-memory communication between
4//! threads, and are the building blocks of other concurrent
5//! types.
6//!
7//! This module defines atomic versions of a select number of primitive
8//! types, including [`AtomicBool`], [`AtomicIsize`], [`AtomicUsize`],
9//! [`AtomicI8`], [`AtomicU16`], etc.
10//! Atomic types present operations that, when used correctly, synchronize
11//! updates between threads.
12//!
13//! Atomic variables are safe to share between threads (they implement [`Sync`])
14//! but they do not themselves provide the mechanism for sharing and follow the
15//! [threading model](../../../std/thread/index.html#the-threading-model) of Rust.
16//! The most common way to share an atomic variable is to put it into an [`Arc`][arc] (an
17//! atomically-reference-counted shared pointer).
18//!
19//! [arc]: ../../../std/sync/struct.Arc.html
20//!
21//! Atomic types may be stored in static variables, initialized using
22//! the constant initializers like [`AtomicBool::new`]. Atomic statics
23//! are often used for lazy global initialization.
24//!
25//! ## Memory model for atomic accesses
26//!
27//! Rust atomics currently follow the same rules as [C++20 atomics][cpp], specifically the rules
28//! from the [`intro.races`][cpp-intro.races] section, without the "consume" memory ordering. Since
29//! C++ uses an object-based memory model whereas Rust is access-based, a bit of translation work
30//! has to be done to apply the C++ rules to Rust: whenever C++ talks about "the value of an
31//! object", we understand that to mean the resulting bytes obtained when doing a read. When the C++
32//! standard talks about "the value of an atomic object", this refers to the result of doing an
33//! atomic load (via the operations provided in this module). A "modification of an atomic object"
34//! refers to an atomic store.
35//!
36//! The end result is *almost* equivalent to saying that creating a *shared reference* to one of the
37//! Rust atomic types corresponds to creating an `atomic_ref` in C++, with the `atomic_ref` being
38//! destroyed when the lifetime of the shared reference ends. The main difference is that Rust
39//! permits concurrent atomic and non-atomic reads to the same memory as those cause no issue in the
40//! C++ memory model, they are just forbidden in C++ because memory is partitioned into "atomic
41//! objects" and "non-atomic objects" (with `atomic_ref` temporarily converting a non-atomic object
42//! into an atomic object).
43//!
44//! The most important aspect of this model is that *data races* are undefined behavior. A data race
45//! is defined as conflicting non-synchronized accesses where at least one of the accesses is
46//! non-atomic. Here, accesses are *conflicting* if they affect overlapping regions of memory and at
47//! least one of them is a write. (A `compare_exchange` or `compare_exchange_weak` that does not
48//! succeed is not considered a write.) They are *non-synchronized* if neither of them
49//! *happens-before* the other, according to the happens-before order of the memory model.
50//!
51//! The other possible cause of undefined behavior in the memory model are mixed-size accesses: Rust
52//! inherits the C++ limitation that non-synchronized conflicting atomic accesses may not partially
53//! overlap. In other words, every pair of non-synchronized atomic accesses must be either disjoint,
54//! access the exact same memory (including using the same access size), or both be reads.
55//!
56//! Each atomic access takes an [`Ordering`] which defines how the operation interacts with the
57//! happens-before order. These orderings behave the same as the corresponding [C++20 atomic
58//! orderings][cpp_memory_order]. For more information, see the [nomicon].
59//!
60//! [cpp]: https://en.cppreference.com/w/cpp/atomic
61//! [cpp-intro.races]: https://timsong-cpp.github.io/cppwp/n4868/intro.multithread#intro.races
62//! [cpp_memory_order]: https://en.cppreference.com/w/cpp/atomic/memory_order
63//! [nomicon]: ../../../nomicon/atomics.html
64//!
65//! ```rust,no_run undefined_behavior
66//! use std::sync::atomic::{AtomicU16, AtomicU8, Ordering};
67//! use std::mem::transmute;
68//! use std::thread;
69//!
70//! let atomic = AtomicU16::new(0);
71//!
72//! thread::scope(|s| {
73//! // This is UB: conflicting non-synchronized accesses, at least one of which is non-atomic.
74//! s.spawn(|| atomic.store(1, Ordering::Relaxed)); // atomic store
75//! s.spawn(|| unsafe { atomic.as_ptr().write(2) }); // non-atomic write
76//! });
77//!
78//! thread::scope(|s| {
79//! // This is fine: the accesses do not conflict (as none of them performs any modification).
80//! // In C++ this would be disallowed since creating an `atomic_ref` precludes
81//! // further non-atomic accesses, but Rust does not have that limitation.
82//! s.spawn(|| atomic.load(Ordering::Relaxed)); // atomic load
83//! s.spawn(|| unsafe { atomic.as_ptr().read() }); // non-atomic read
84//! });
85//!
86//! thread::scope(|s| {
87//! // This is fine: `join` synchronizes the code in a way such that the atomic
88//! // store happens-before the non-atomic write.
89//! let handle = s.spawn(|| atomic.store(1, Ordering::Relaxed)); // atomic store
90//! handle.join().expect("thread won't panic"); // synchronize
91//! s.spawn(|| unsafe { atomic.as_ptr().write(2) }); // non-atomic write
92//! });
93//!
94//! thread::scope(|s| {
95//! // This is UB: non-synchronized conflicting differently-sized atomic accesses.
96//! s.spawn(|| atomic.store(1, Ordering::Relaxed));
97//! s.spawn(|| unsafe {
98//! let differently_sized = transmute::<&AtomicU16, &AtomicU8>(&atomic);
99//! differently_sized.store(2, Ordering::Relaxed);
100//! });
101//! });
102//!
103//! thread::scope(|s| {
104//! // This is fine: `join` synchronizes the code in a way such that
105//! // the 1-byte store happens-before the 2-byte store.
106//! let handle = s.spawn(|| atomic.store(1, Ordering::Relaxed));
107//! handle.join().expect("thread won't panic");
108//! s.spawn(|| unsafe {
109//! let differently_sized = transmute::<&AtomicU16, &AtomicU8>(&atomic);
110//! differently_sized.store(2, Ordering::Relaxed);
111//! });
112//! });
113//! ```
114//!
115//! # Portability
116//!
117//! All atomic types in this module are guaranteed to be [lock-free] if they're
118//! available. This means they don't internally acquire a global mutex. Atomic
119//! types and operations are not guaranteed to be wait-free. This means that
120//! operations like `fetch_or` may be implemented with a compare-and-swap loop.
121//!
122//! Atomic operations may be implemented at the instruction layer with
123//! larger-size atomics. For example some platforms use 4-byte atomic
124//! instructions to implement `AtomicI8`. Note that this emulation should not
125//! have an impact on correctness of code, it's just something to be aware of.
126//!
127//! The atomic types in this module might not be available on all platforms. The
128//! atomic types here are all widely available, however, and can generally be
129//! relied upon existing. Some notable exceptions are:
130//!
131//! * PowerPC and MIPS platforms with 32-bit pointers do not have `AtomicU64` or
132//! `AtomicI64` types.
133//! * ARM platforms like `armv5te` that aren't for Linux only provide `load`
134//! and `store` operations, and do not support Compare and Swap (CAS)
135//! operations, such as `swap`, `fetch_add`, etc. Additionally on Linux,
136//! these CAS operations are implemented via [operating system support], which
137//! may come with a performance penalty.
138//! * ARM targets with `thumbv6m` only provide `load` and `store` operations,
139//! and do not support Compare and Swap (CAS) operations, such as `swap`,
140//! `fetch_add`, etc.
141//!
142//! [operating system support]: https://www.kernel.org/doc/Documentation/arm/kernel_user_helpers.txt
143//!
144//! Note that future platforms may be added that also do not have support for
145//! some atomic operations. Maximally portable code will want to be careful
146//! about which atomic types are used. `AtomicUsize` and `AtomicIsize` are
147//! generally the most portable, but even then they're not available everywhere.
148//! For reference, the `std` library requires `AtomicBool`s and pointer-sized atomics, although
149//! `core` does not.
150//!
151//! The `#[cfg(target_has_atomic)]` attribute can be used to conditionally
152//! compile based on the target's supported bit widths. It is a key-value
153//! option set for each supported size, with values "8", "16", "32", "64",
154//! "128", and "ptr" for pointer-sized atomics.
155//!
156//! [lock-free]: https://en.wikipedia.org/wiki/Non-blocking_algorithm
157//!
158//! # Atomic accesses to read-only memory
159//!
160//! In general, *all* atomic accesses on read-only memory are undefined behavior. For instance, attempting
161//! to do a `compare_exchange` that will definitely fail (making it conceptually a read-only
162//! operation) can still cause a segmentation fault if the underlying memory page is mapped read-only. Since
163//! atomic `load`s might be implemented using compare-exchange operations, even a `load` can fault
164//! on read-only memory.
165//!
166//! For the purpose of this section, "read-only memory" is defined as memory that is read-only in
167//! the underlying target, i.e., the pages are mapped with a read-only flag and any attempt to write
168//! will cause a page fault. In particular, an `&u128` reference that points to memory that is
169//! read-write mapped is *not* considered to point to "read-only memory". In Rust, almost all memory
170//! is read-write; the only exceptions are memory created by `const` items or `static` items without
171//! interior mutability, and memory that was specifically marked as read-only by the operating
172//! system via platform-specific APIs.
173//!
174//! As an exception from the general rule stated above, "sufficiently small" atomic loads with
175//! `Ordering::Relaxed` are implemented in a way that works on read-only memory, and are hence not
176//! undefined behavior. The exact size limit for what makes a load "sufficiently small" varies
177//! depending on the target:
178//!
179//! | `target_arch` | Size limit |
180//! |---------------|---------|
181//! | `x86`, `arm`, `loongarch32`, `mips`, `mips32r6`, `powerpc`, `riscv32`, `sparc`, `hexagon` | 4 bytes |
182//! | `x86_64`, `aarch64`, `loongarch64`, `mips64`, `mips64r6`, `powerpc64`, `riscv64`, `sparc64`, `s390x` | 8 bytes |
183//!
184//! Atomics loads that are larger than this limit as well as atomic loads with ordering other
185//! than `Relaxed`, as well as *all* atomic loads on targets not listed in the table, might still be
186//! read-only under certain conditions, but that is not a stable guarantee and should not be relied
187//! upon.
188//!
189//! If you need to do an acquire load on read-only memory, you can do a relaxed load followed by an
190//! acquire fence instead.
191//!
192//! # Examples
193//!
194//! A simple spinlock:
195//!
196//! ```ignore-wasm
197//! use std::sync::Arc;
198//! use std::sync::atomic::{AtomicUsize, Ordering};
199//! use std::{hint, thread};
200//!
201//! fn main() {
202//! let spinlock = Arc::new(AtomicUsize::new(1));
203//!
204//! let spinlock_clone = Arc::clone(&spinlock);
205//!
206//! let thread = thread::spawn(move || {
207//! spinlock_clone.store(0, Ordering::Release);
208//! });
209//!
210//! // Wait for the other thread to release the lock
211//! while spinlock.load(Ordering::Acquire) != 0 {
212//! hint::spin_loop();
213//! }
214//!
215//! if let Err(panic) = thread.join() {
216//! println!("Thread had an error: {panic:?}");
217//! }
218//! }
219//! ```
220//!
221//! Keep a global count of live threads:
222//!
223//! ```
224//! use std::sync::atomic::{AtomicUsize, Ordering};
225//!
226//! static GLOBAL_THREAD_COUNT: AtomicUsize = AtomicUsize::new(0);
227//!
228//! // Note that Relaxed ordering doesn't synchronize anything
229//! // except the global thread counter itself.
230//! let old_thread_count = GLOBAL_THREAD_COUNT.fetch_add(1, Ordering::Relaxed);
231//! // Note that this number may not be true at the moment of printing
232//! // because some other thread may have changed static value already.
233//! println!("live threads: {}", old_thread_count + 1);
234//! ```
235
236#![stable(feature = "rust1", since = "1.0.0")]
237#![cfg_attr(not(target_has_atomic_load_store = "8"), allow(dead_code))]
238#![cfg_attr(not(target_has_atomic_load_store = "8"), allow(unused_imports))]
239#![rustc_diagnostic_item = "atomic_mod"]
240// Clippy complains about the pattern of "safe function calling unsafe function taking pointers".
241// This happens with AtomicPtr intrinsics but is fine, as the pointers clippy is concerned about
242// are just normal values that get loaded/stored, but not dereferenced.
243#![allow(clippy::not_unsafe_ptr_arg_deref)]
244
245use self::Ordering::*;
246use crate::cell::UnsafeCell;
247use crate::hint::spin_loop;
248use crate::intrinsics::AtomicOrdering as AO;
249use crate::{fmt, intrinsics};
250
251trait Sealed {}
252
253/// A marker trait for primitive types which can be modified atomically.
254///
255/// This is an implementation detail for <code>[Atomic]\<T></code> which may disappear or be replaced at any time.
256///
257/// # Safety
258///
259/// Types implementing this trait must be primitives that can be modified atomically.
260///
261/// The associated `Self::AtomicInner` type must have the same size and bit validity as `Self`,
262/// but may have a higher alignment requirement, so the following `transmute`s are sound:
263///
264/// - `&mut Self::AtomicInner` as `&mut Self`
265/// - `Self` as `Self::AtomicInner` or the reverse
266#[unstable(
267 feature = "atomic_internals",
268 reason = "implementation detail which may disappear or be replaced at any time",
269 issue = "none"
270)]
271#[expect(private_bounds)]
272pub unsafe trait AtomicPrimitive: Sized + Copy + Sealed {
273 /// Temporary implementation detail.
274 type AtomicInner: Sized;
275}
276
277macro impl_atomic_primitive(
278 $Atom:ident $(<$T:ident>)? ($Primitive:ty),
279 size($size:literal),
280 align($align:literal) $(,)?
281) {
282 impl $(<$T>)? Sealed for $Primitive {}
283
284 #[unstable(
285 feature = "atomic_internals",
286 reason = "implementation detail which may disappear or be replaced at any time",
287 issue = "none"
288 )]
289 #[cfg(target_has_atomic_load_store = $size)]
290 unsafe impl $(<$T>)? AtomicPrimitive for $Primitive {
291 type AtomicInner = $Atom $(<$T>)?;
292 }
293}
294
295impl_atomic_primitive!(AtomicBool(bool), size("8"), align(1));
296impl_atomic_primitive!(AtomicI8(i8), size("8"), align(1));
297impl_atomic_primitive!(AtomicU8(u8), size("8"), align(1));
298impl_atomic_primitive!(AtomicI16(i16), size("16"), align(2));
299impl_atomic_primitive!(AtomicU16(u16), size("16"), align(2));
300impl_atomic_primitive!(AtomicI32(i32), size("32"), align(4));
301impl_atomic_primitive!(AtomicU32(u32), size("32"), align(4));
302impl_atomic_primitive!(AtomicI64(i64), size("64"), align(8));
303impl_atomic_primitive!(AtomicU64(u64), size("64"), align(8));
304impl_atomic_primitive!(AtomicI128(i128), size("128"), align(16));
305impl_atomic_primitive!(AtomicU128(u128), size("128"), align(16));
306
307#[cfg(target_pointer_width = "16")]
308impl_atomic_primitive!(AtomicIsize(isize), size("ptr"), align(2));
309#[cfg(target_pointer_width = "32")]
310impl_atomic_primitive!(AtomicIsize(isize), size("ptr"), align(4));
311#[cfg(target_pointer_width = "64")]
312impl_atomic_primitive!(AtomicIsize(isize), size("ptr"), align(8));
313
314#[cfg(target_pointer_width = "16")]
315impl_atomic_primitive!(AtomicUsize(usize), size("ptr"), align(2));
316#[cfg(target_pointer_width = "32")]
317impl_atomic_primitive!(AtomicUsize(usize), size("ptr"), align(4));
318#[cfg(target_pointer_width = "64")]
319impl_atomic_primitive!(AtomicUsize(usize), size("ptr"), align(8));
320
321#[cfg(target_pointer_width = "16")]
322impl_atomic_primitive!(AtomicPtr<T>(*mut T), size("ptr"), align(2));
323#[cfg(target_pointer_width = "32")]
324impl_atomic_primitive!(AtomicPtr<T>(*mut T), size("ptr"), align(4));
325#[cfg(target_pointer_width = "64")]
326impl_atomic_primitive!(AtomicPtr<T>(*mut T), size("ptr"), align(8));
327
328/// A memory location which can be safely modified from multiple threads.
329///
330/// This has the same size and bit validity as the underlying type `T`. However,
331/// the alignment of this type is always equal to its size, even on targets where
332/// `T` has alignment less than its size.
333///
334/// For more about the differences between atomic types and non-atomic types as
335/// well as information about the portability of this type, please see the
336/// [module-level documentation].
337///
338/// **Note:** This type is only available on platforms that support atomic loads
339/// and stores of `T`.
340///
341/// [module-level documentation]: crate::sync::atomic
342#[unstable(feature = "generic_atomic", issue = "130539")]
343pub type Atomic<T> = <T as AtomicPrimitive>::AtomicInner;
344
345// Some architectures don't have byte-sized atomics, which results in LLVM
346// emulating them using a LL/SC loop. However for AtomicBool we can take
347// advantage of the fact that it only ever contains 0 or 1 and use atomic OR/AND
348// instead, which LLVM can emulate using a larger atomic OR/AND operation.
349//
350// This list should only contain architectures which have word-sized atomic-or/
351// atomic-and instructions but don't natively support byte-sized atomics.
352#[cfg(target_has_atomic = "8")]
353const EMULATE_ATOMIC_BOOL: bool = cfg!(any(
354 target_arch = "riscv32",
355 target_arch = "riscv64",
356 target_arch = "loongarch32",
357 target_arch = "loongarch64"
358));
359
360/// A boolean type which can be safely shared between threads.
361///
362/// This type has the same size, alignment, and bit validity as a [`bool`].
363///
364/// **Note**: This type is only available on platforms that support atomic
365/// loads and stores of `u8`.
366#[cfg(target_has_atomic_load_store = "8")]
367#[stable(feature = "rust1", since = "1.0.0")]
368#[rustc_diagnostic_item = "AtomicBool"]
369#[repr(C, align(1))]
370pub struct AtomicBool {
371 v: UnsafeCell<u8>,
372}
373
374#[cfg(target_has_atomic_load_store = "8")]
375#[stable(feature = "rust1", since = "1.0.0")]
376impl Default for AtomicBool {
377 /// Creates an `AtomicBool` initialized to `false`.
378 #[inline]
379 fn default() -> Self {
380 Self::new(false)
381 }
382}
383
384// Send is implicitly implemented for AtomicBool.
385#[cfg(target_has_atomic_load_store = "8")]
386#[stable(feature = "rust1", since = "1.0.0")]
387unsafe impl Sync for AtomicBool {}
388
389/// A raw pointer type which can be safely shared between threads.
390///
391/// This type has the same size and bit validity as a `*mut T`.
392///
393/// **Note**: This type is only available on platforms that support atomic
394/// loads and stores of pointers. Its size depends on the target pointer's size.
395#[cfg(target_has_atomic_load_store = "ptr")]
396#[stable(feature = "rust1", since = "1.0.0")]
397#[rustc_diagnostic_item = "AtomicPtr"]
398#[cfg_attr(target_pointer_width = "16", repr(C, align(2)))]
399#[cfg_attr(target_pointer_width = "32", repr(C, align(4)))]
400#[cfg_attr(target_pointer_width = "64", repr(C, align(8)))]
401pub struct AtomicPtr<T> {
402 p: UnsafeCell<*mut T>,
403}
404
405#[cfg(target_has_atomic_load_store = "ptr")]
406#[stable(feature = "rust1", since = "1.0.0")]
407impl<T> Default for AtomicPtr<T> {
408 /// Creates a null `AtomicPtr<T>`.
409 fn default() -> AtomicPtr<T> {
410 AtomicPtr::new(crate::ptr::null_mut())
411 }
412}
413
414#[cfg(target_has_atomic_load_store = "ptr")]
415#[stable(feature = "rust1", since = "1.0.0")]
416unsafe impl<T> Send for AtomicPtr<T> {}
417#[cfg(target_has_atomic_load_store = "ptr")]
418#[stable(feature = "rust1", since = "1.0.0")]
419unsafe impl<T> Sync for AtomicPtr<T> {}
420
421/// Atomic memory orderings
422///
423/// Memory orderings specify the way atomic operations synchronize memory.
424/// In its weakest [`Ordering::Relaxed`], only the memory directly touched by the
425/// operation is synchronized. On the other hand, a store-load pair of [`Ordering::SeqCst`]
426/// operations synchronize other memory while additionally preserving a total order of such
427/// operations across all threads.
428///
429/// Rust's memory orderings are [the same as those of
430/// C++20](https://en.cppreference.com/w/cpp/atomic/memory_order).
431///
432/// For more information see the [nomicon].
433///
434/// [nomicon]: ../../../nomicon/atomics.html
435#[stable(feature = "rust1", since = "1.0.0")]
436#[derive(Copy, Clone, Debug, Eq, PartialEq, Hash)]
437#[non_exhaustive]
438#[rustc_diagnostic_item = "Ordering"]
439pub enum Ordering {
440 /// No ordering constraints, only atomic operations.
441 ///
442 /// Corresponds to [`memory_order_relaxed`] in C++20.
443 ///
444 /// [`memory_order_relaxed`]: https://en.cppreference.com/w/cpp/atomic/memory_order#Relaxed_ordering
445 #[stable(feature = "rust1", since = "1.0.0")]
446 Relaxed,
447 /// When coupled with a store, all previous operations become ordered
448 /// before any load of this value with [`Acquire`] (or stronger) ordering.
449 /// In particular, all previous writes become visible to all threads
450 /// that perform an [`Acquire`] (or stronger) load of this value.
451 ///
452 /// Notice that using this ordering for an operation that combines loads
453 /// and stores leads to a [`Relaxed`] load operation!
454 ///
455 /// This ordering is only applicable for operations that can perform a store.
456 ///
457 /// Corresponds to [`memory_order_release`] in C++20.
458 ///
459 /// [`memory_order_release`]: https://en.cppreference.com/w/cpp/atomic/memory_order#Release-Acquire_ordering
460 #[stable(feature = "rust1", since = "1.0.0")]
461 Release,
462 /// When coupled with a load, if the loaded value was written by a store operation with
463 /// [`Release`] (or stronger) ordering, then all subsequent operations
464 /// become ordered after that store. In particular, all subsequent loads will see data
465 /// written before the store.
466 ///
467 /// Notice that using this ordering for an operation that combines loads
468 /// and stores leads to a [`Relaxed`] store operation!
469 ///
470 /// This ordering is only applicable for operations that can perform a load.
471 ///
472 /// Corresponds to [`memory_order_acquire`] in C++20.
473 ///
474 /// [`memory_order_acquire`]: https://en.cppreference.com/w/cpp/atomic/memory_order#Release-Acquire_ordering
475 #[stable(feature = "rust1", since = "1.0.0")]
476 Acquire,
477 /// Has the effects of both [`Acquire`] and [`Release`] together:
478 /// For loads it uses [`Acquire`] ordering. For stores it uses the [`Release`] ordering.
479 ///
480 /// Notice that in the case of `compare_and_swap`, it is possible that the operation ends up
481 /// not performing any store and hence it has just [`Acquire`] ordering. However,
482 /// `AcqRel` will never perform [`Relaxed`] accesses.
483 ///
484 /// This ordering is only applicable for operations that combine both loads and stores.
485 ///
486 /// Corresponds to [`memory_order_acq_rel`] in C++20.
487 ///
488 /// [`memory_order_acq_rel`]: https://en.cppreference.com/w/cpp/atomic/memory_order#Release-Acquire_ordering
489 #[stable(feature = "rust1", since = "1.0.0")]
490 AcqRel,
491 /// Like [`Acquire`]/[`Release`]/[`AcqRel`] (for load, store, and load-with-store
492 /// operations, respectively) with the additional guarantee that all threads see all
493 /// sequentially consistent operations in the same order.
494 ///
495 /// Corresponds to [`memory_order_seq_cst`] in C++20.
496 ///
497 /// [`memory_order_seq_cst`]: https://en.cppreference.com/w/cpp/atomic/memory_order#Sequentially-consistent_ordering
498 #[stable(feature = "rust1", since = "1.0.0")]
499 SeqCst,
500}
501
502/// An [`AtomicBool`] initialized to `false`.
503#[cfg(target_has_atomic_load_store = "8")]
504#[stable(feature = "rust1", since = "1.0.0")]
505#[deprecated(
506 since = "1.34.0",
507 note = "the `new` function is now preferred",
508 suggestion = "AtomicBool::new(false)"
509)]
510pub const ATOMIC_BOOL_INIT: AtomicBool = AtomicBool::new(false);
511
512#[cfg(target_has_atomic_load_store = "8")]
513impl AtomicBool {
514 /// Creates a new `AtomicBool`.
515 ///
516 /// # Examples
517 ///
518 /// ```
519 /// use std::sync::atomic::AtomicBool;
520 ///
521 /// let atomic_true = AtomicBool::new(true);
522 /// let atomic_false = AtomicBool::new(false);
523 /// ```
524 #[inline]
525 #[stable(feature = "rust1", since = "1.0.0")]
526 #[rustc_const_stable(feature = "const_atomic_new", since = "1.24.0")]
527 #[must_use]
528 pub const fn new(v: bool) -> AtomicBool {
529 AtomicBool { v: UnsafeCell::new(v as u8) }
530 }
531
532 /// Creates a new `AtomicBool` from a pointer.
533 ///
534 /// # Examples
535 ///
536 /// ```
537 /// use std::sync::atomic::{self, AtomicBool};
538 ///
539 /// // Get a pointer to an allocated value
540 /// let ptr: *mut bool = Box::into_raw(Box::new(false));
541 ///
542 /// assert!(ptr.cast::<AtomicBool>().is_aligned());
543 ///
544 /// {
545 /// // Create an atomic view of the allocated value
546 /// let atomic = unsafe { AtomicBool::from_ptr(ptr) };
547 ///
548 /// // Use `atomic` for atomic operations, possibly share it with other threads
549 /// atomic.store(true, atomic::Ordering::Relaxed);
550 /// }
551 ///
552 /// // It's ok to non-atomically access the value behind `ptr`,
553 /// // since the reference to the atomic ended its lifetime in the block above
554 /// assert_eq!(unsafe { *ptr }, true);
555 ///
556 /// // Deallocate the value
557 /// unsafe { drop(Box::from_raw(ptr)) }
558 /// ```
559 ///
560 /// # Safety
561 ///
562 /// * `ptr` must be aligned to `align_of::<AtomicBool>()` (note that this is always true, since
563 /// `align_of::<AtomicBool>() == 1`).
564 /// * `ptr` must be [valid] for both reads and writes for the whole lifetime `'a`.
565 /// * You must adhere to the [Memory model for atomic accesses]. In particular, it is not
566 /// allowed to mix conflicting atomic and non-atomic accesses, or atomic accesses of different
567 /// sizes, without synchronization.
568 ///
569 /// [valid]: crate::ptr#safety
570 /// [Memory model for atomic accesses]: self#memory-model-for-atomic-accesses
571 #[inline]
572 #[stable(feature = "atomic_from_ptr", since = "1.75.0")]
573 #[rustc_const_stable(feature = "const_atomic_from_ptr", since = "1.84.0")]
574 pub const unsafe fn from_ptr<'a>(ptr: *mut bool) -> &'a AtomicBool {
575 // SAFETY: guaranteed by the caller
576 unsafe { &*ptr.cast() }
577 }
578
579 /// Returns a mutable reference to the underlying [`bool`].
580 ///
581 /// This is safe because the mutable reference guarantees that no other threads are
582 /// concurrently accessing the atomic data.
583 ///
584 /// # Examples
585 ///
586 /// ```
587 /// use std::sync::atomic::{AtomicBool, Ordering};
588 ///
589 /// let mut some_bool = AtomicBool::new(true);
590 /// assert_eq!(*some_bool.get_mut(), true);
591 /// *some_bool.get_mut() = false;
592 /// assert_eq!(some_bool.load(Ordering::SeqCst), false);
593 /// ```
594 #[inline]
595 #[stable(feature = "atomic_access", since = "1.15.0")]
596 pub fn get_mut(&mut self) -> &mut bool {
597 // SAFETY: the mutable reference guarantees unique ownership.
598 unsafe { &mut *(self.v.get() as *mut bool) }
599 }
600
601 /// Gets atomic access to a `&mut bool`.
602 ///
603 /// # Examples
604 ///
605 /// ```
606 /// #![feature(atomic_from_mut)]
607 /// use std::sync::atomic::{AtomicBool, Ordering};
608 ///
609 /// let mut some_bool = true;
610 /// let a = AtomicBool::from_mut(&mut some_bool);
611 /// a.store(false, Ordering::Relaxed);
612 /// assert_eq!(some_bool, false);
613 /// ```
614 #[inline]
615 #[cfg(target_has_atomic_equal_alignment = "8")]
616 #[unstable(feature = "atomic_from_mut", issue = "76314")]
617 pub fn from_mut(v: &mut bool) -> &mut Self {
618 // SAFETY: the mutable reference guarantees unique ownership, and
619 // alignment of both `bool` and `Self` is 1.
620 unsafe { &mut *(v as *mut bool as *mut Self) }
621 }
622
623 /// Gets non-atomic access to a `&mut [AtomicBool]` slice.
624 ///
625 /// This is safe because the mutable reference guarantees that no other threads are
626 /// concurrently accessing the atomic data.
627 ///
628 /// # Examples
629 ///
630 /// ```ignore-wasm
631 /// #![feature(atomic_from_mut)]
632 /// use std::sync::atomic::{AtomicBool, Ordering};
633 ///
634 /// let mut some_bools = [const { AtomicBool::new(false) }; 10];
635 ///
636 /// let view: &mut [bool] = AtomicBool::get_mut_slice(&mut some_bools);
637 /// assert_eq!(view, [false; 10]);
638 /// view[..5].copy_from_slice(&[true; 5]);
639 ///
640 /// std::thread::scope(|s| {
641 /// for t in &some_bools[..5] {
642 /// s.spawn(move || assert_eq!(t.load(Ordering::Relaxed), true));
643 /// }
644 ///
645 /// for f in &some_bools[5..] {
646 /// s.spawn(move || assert_eq!(f.load(Ordering::Relaxed), false));
647 /// }
648 /// });
649 /// ```
650 #[inline]
651 #[unstable(feature = "atomic_from_mut", issue = "76314")]
652 pub fn get_mut_slice(this: &mut [Self]) -> &mut [bool] {
653 // SAFETY: the mutable reference guarantees unique ownership.
654 unsafe { &mut *(this as *mut [Self] as *mut [bool]) }
655 }
656
657 /// Gets atomic access to a `&mut [bool]` slice.
658 ///
659 /// # Examples
660 ///
661 /// ```rust,ignore-wasm
662 /// #![feature(atomic_from_mut)]
663 /// use std::sync::atomic::{AtomicBool, Ordering};
664 ///
665 /// let mut some_bools = [false; 10];
666 /// let a = &*AtomicBool::from_mut_slice(&mut some_bools);
667 /// std::thread::scope(|s| {
668 /// for i in 0..a.len() {
669 /// s.spawn(move || a[i].store(true, Ordering::Relaxed));
670 /// }
671 /// });
672 /// assert_eq!(some_bools, [true; 10]);
673 /// ```
674 #[inline]
675 #[cfg(target_has_atomic_equal_alignment = "8")]
676 #[unstable(feature = "atomic_from_mut", issue = "76314")]
677 pub fn from_mut_slice(v: &mut [bool]) -> &mut [Self] {
678 // SAFETY: the mutable reference guarantees unique ownership, and
679 // alignment of both `bool` and `Self` is 1.
680 unsafe { &mut *(v as *mut [bool] as *mut [Self]) }
681 }
682
683 /// Consumes the atomic and returns the contained value.
684 ///
685 /// This is safe because passing `self` by value guarantees that no other threads are
686 /// concurrently accessing the atomic data.
687 ///
688 /// # Examples
689 ///
690 /// ```
691 /// use std::sync::atomic::AtomicBool;
692 ///
693 /// let some_bool = AtomicBool::new(true);
694 /// assert_eq!(some_bool.into_inner(), true);
695 /// ```
696 #[inline]
697 #[stable(feature = "atomic_access", since = "1.15.0")]
698 #[rustc_const_stable(feature = "const_atomic_into_inner", since = "1.79.0")]
699 pub const fn into_inner(self) -> bool {
700 self.v.into_inner() != 0
701 }
702
703 /// Loads a value from the bool.
704 ///
705 /// `load` takes an [`Ordering`] argument which describes the memory ordering
706 /// of this operation. Possible values are [`SeqCst`], [`Acquire`] and [`Relaxed`].
707 ///
708 /// # Panics
709 ///
710 /// Panics if `order` is [`Release`] or [`AcqRel`].
711 ///
712 /// # Examples
713 ///
714 /// ```
715 /// use std::sync::atomic::{AtomicBool, Ordering};
716 ///
717 /// let some_bool = AtomicBool::new(true);
718 ///
719 /// assert_eq!(some_bool.load(Ordering::Relaxed), true);
720 /// ```
721 #[inline]
722 #[stable(feature = "rust1", since = "1.0.0")]
723 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
724 pub fn load(&self, order: Ordering) -> bool {
725 // SAFETY: any data races are prevented by atomic intrinsics and the raw
726 // pointer passed in is valid because we got it from a reference.
727 unsafe { atomic_load(self.v.get(), order) != 0 }
728 }
729
730 /// Stores a value into the bool.
731 ///
732 /// `store` takes an [`Ordering`] argument which describes the memory ordering
733 /// of this operation. Possible values are [`SeqCst`], [`Release`] and [`Relaxed`].
734 ///
735 /// # Panics
736 ///
737 /// Panics if `order` is [`Acquire`] or [`AcqRel`].
738 ///
739 /// # Examples
740 ///
741 /// ```
742 /// use std::sync::atomic::{AtomicBool, Ordering};
743 ///
744 /// let some_bool = AtomicBool::new(true);
745 ///
746 /// some_bool.store(false, Ordering::Relaxed);
747 /// assert_eq!(some_bool.load(Ordering::Relaxed), false);
748 /// ```
749 #[inline]
750 #[stable(feature = "rust1", since = "1.0.0")]
751 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
752 pub fn store(&self, val: bool, order: Ordering) {
753 // SAFETY: any data races are prevented by atomic intrinsics and the raw
754 // pointer passed in is valid because we got it from a reference.
755 unsafe {
756 atomic_store(self.v.get(), val as u8, order);
757 }
758 }
759
760 /// Stores a value into the bool, returning the previous value.
761 ///
762 /// `swap` takes an [`Ordering`] argument which describes the memory ordering
763 /// of this operation. All ordering modes are possible. Note that using
764 /// [`Acquire`] makes the store part of this operation [`Relaxed`], and
765 /// using [`Release`] makes the load part [`Relaxed`].
766 ///
767 /// **Note:** This method is only available on platforms that support atomic
768 /// operations on `u8`.
769 ///
770 /// # Examples
771 ///
772 /// ```
773 /// use std::sync::atomic::{AtomicBool, Ordering};
774 ///
775 /// let some_bool = AtomicBool::new(true);
776 ///
777 /// assert_eq!(some_bool.swap(false, Ordering::Relaxed), true);
778 /// assert_eq!(some_bool.load(Ordering::Relaxed), false);
779 /// ```
780 #[inline]
781 #[stable(feature = "rust1", since = "1.0.0")]
782 #[cfg(target_has_atomic = "8")]
783 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
784 pub fn swap(&self, val: bool, order: Ordering) -> bool {
785 if EMULATE_ATOMIC_BOOL {
786 if val { self.fetch_or(true, order) } else { self.fetch_and(false, order) }
787 } else {
788 // SAFETY: data races are prevented by atomic intrinsics.
789 unsafe { atomic_swap(self.v.get(), val as u8, order) != 0 }
790 }
791 }
792
793 /// Stores a value into the [`bool`] if the current value is the same as the `current` value.
794 ///
795 /// The return value is always the previous value. If it is equal to `current`, then the value
796 /// was updated.
797 ///
798 /// `compare_and_swap` also takes an [`Ordering`] argument which describes the memory
799 /// ordering of this operation. Notice that even when using [`AcqRel`], the operation
800 /// might fail and hence just perform an `Acquire` load, but not have `Release` semantics.
801 /// Using [`Acquire`] makes the store part of this operation [`Relaxed`] if it
802 /// happens, and using [`Release`] makes the load part [`Relaxed`].
803 ///
804 /// **Note:** This method is only available on platforms that support atomic
805 /// operations on `u8`.
806 ///
807 /// # Migrating to `compare_exchange` and `compare_exchange_weak`
808 ///
809 /// `compare_and_swap` is equivalent to `compare_exchange` with the following mapping for
810 /// memory orderings:
811 ///
812 /// Original | Success | Failure
813 /// -------- | ------- | -------
814 /// Relaxed | Relaxed | Relaxed
815 /// Acquire | Acquire | Acquire
816 /// Release | Release | Relaxed
817 /// AcqRel | AcqRel | Acquire
818 /// SeqCst | SeqCst | SeqCst
819 ///
820 /// `compare_and_swap` and `compare_exchange` also differ in their return type. You can use
821 /// `compare_exchange(...).unwrap_or_else(|x| x)` to recover the behavior of `compare_and_swap`,
822 /// but in most cases it is more idiomatic to check whether the return value is `Ok` or `Err`
823 /// rather than to infer success vs failure based on the value that was read.
824 ///
825 /// During migration, consider whether it makes sense to use `compare_exchange_weak` instead.
826 /// `compare_exchange_weak` is allowed to fail spuriously even when the comparison succeeds,
827 /// which allows the compiler to generate better assembly code when the compare and swap
828 /// is used in a loop.
829 ///
830 /// # Examples
831 ///
832 /// ```
833 /// use std::sync::atomic::{AtomicBool, Ordering};
834 ///
835 /// let some_bool = AtomicBool::new(true);
836 ///
837 /// assert_eq!(some_bool.compare_and_swap(true, false, Ordering::Relaxed), true);
838 /// assert_eq!(some_bool.load(Ordering::Relaxed), false);
839 ///
840 /// assert_eq!(some_bool.compare_and_swap(true, true, Ordering::Relaxed), false);
841 /// assert_eq!(some_bool.load(Ordering::Relaxed), false);
842 /// ```
843 #[inline]
844 #[stable(feature = "rust1", since = "1.0.0")]
845 #[deprecated(
846 since = "1.50.0",
847 note = "Use `compare_exchange` or `compare_exchange_weak` instead"
848 )]
849 #[cfg(target_has_atomic = "8")]
850 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
851 pub fn compare_and_swap(&self, current: bool, new: bool, order: Ordering) -> bool {
852 match self.compare_exchange(current, new, order, strongest_failure_ordering(order)) {
853 Ok(x) => x,
854 Err(x) => x,
855 }
856 }
857
858 /// Stores a value into the [`bool`] if the current value is the same as the `current` value.
859 ///
860 /// The return value is a result indicating whether the new value was written and containing
861 /// the previous value. On success this value is guaranteed to be equal to `current`.
862 ///
863 /// `compare_exchange` takes two [`Ordering`] arguments to describe the memory
864 /// ordering of this operation. `success` describes the required ordering for the
865 /// read-modify-write operation that takes place if the comparison with `current` succeeds.
866 /// `failure` describes the required ordering for the load operation that takes place when
867 /// the comparison fails. Using [`Acquire`] as success ordering makes the store part
868 /// of this operation [`Relaxed`], and using [`Release`] makes the successful load
869 /// [`Relaxed`]. The failure ordering can only be [`SeqCst`], [`Acquire`] or [`Relaxed`].
870 ///
871 /// **Note:** This method is only available on platforms that support atomic
872 /// operations on `u8`.
873 ///
874 /// # Examples
875 ///
876 /// ```
877 /// use std::sync::atomic::{AtomicBool, Ordering};
878 ///
879 /// let some_bool = AtomicBool::new(true);
880 ///
881 /// assert_eq!(some_bool.compare_exchange(true,
882 /// false,
883 /// Ordering::Acquire,
884 /// Ordering::Relaxed),
885 /// Ok(true));
886 /// assert_eq!(some_bool.load(Ordering::Relaxed), false);
887 ///
888 /// assert_eq!(some_bool.compare_exchange(true, true,
889 /// Ordering::SeqCst,
890 /// Ordering::Acquire),
891 /// Err(false));
892 /// assert_eq!(some_bool.load(Ordering::Relaxed), false);
893 /// ```
894 ///
895 /// # Considerations
896 ///
897 /// `compare_exchange` is a [compare-and-swap operation] and thus exhibits the usual downsides
898 /// of CAS operations. In particular, a load of the value followed by a successful
899 /// `compare_exchange` with the previous load *does not ensure* that other threads have not
900 /// changed the value in the interim. This is usually important when the *equality* check in
901 /// the `compare_exchange` is being used to check the *identity* of a value, but equality
902 /// does not necessarily imply identity. In this case, `compare_exchange` can lead to the
903 /// [ABA problem].
904 ///
905 /// [ABA Problem]: https://en.wikipedia.org/wiki/ABA_problem
906 /// [compare-and-swap operation]: https://en.wikipedia.org/wiki/Compare-and-swap
907 #[inline]
908 #[stable(feature = "extended_compare_and_swap", since = "1.10.0")]
909 #[doc(alias = "compare_and_swap")]
910 #[cfg(target_has_atomic = "8")]
911 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
912 pub fn compare_exchange(
913 &self,
914 current: bool,
915 new: bool,
916 success: Ordering,
917 failure: Ordering,
918 ) -> Result<bool, bool> {
919 if EMULATE_ATOMIC_BOOL {
920 // Pick the strongest ordering from success and failure.
921 let order = match (success, failure) {
922 (SeqCst, _) => SeqCst,
923 (_, SeqCst) => SeqCst,
924 (AcqRel, _) => AcqRel,
925 (_, AcqRel) => {
926 panic!("there is no such thing as an acquire-release failure ordering")
927 }
928 (Release, Acquire) => AcqRel,
929 (Acquire, _) => Acquire,
930 (_, Acquire) => Acquire,
931 (Release, Relaxed) => Release,
932 (_, Release) => panic!("there is no such thing as a release failure ordering"),
933 (Relaxed, Relaxed) => Relaxed,
934 };
935 let old = if current == new {
936 // This is a no-op, but we still need to perform the operation
937 // for memory ordering reasons.
938 self.fetch_or(false, order)
939 } else {
940 // This sets the value to the new one and returns the old one.
941 self.swap(new, order)
942 };
943 if old == current { Ok(old) } else { Err(old) }
944 } else {
945 // SAFETY: data races are prevented by atomic intrinsics.
946 match unsafe {
947 atomic_compare_exchange(self.v.get(), current as u8, new as u8, success, failure)
948 } {
949 Ok(x) => Ok(x != 0),
950 Err(x) => Err(x != 0),
951 }
952 }
953 }
954
955 /// Stores a value into the [`bool`] if the current value is the same as the `current` value.
956 ///
957 /// Unlike [`AtomicBool::compare_exchange`], this function is allowed to spuriously fail even when the
958 /// comparison succeeds, which can result in more efficient code on some platforms. The
959 /// return value is a result indicating whether the new value was written and containing the
960 /// previous value.
961 ///
962 /// `compare_exchange_weak` takes two [`Ordering`] arguments to describe the memory
963 /// ordering of this operation. `success` describes the required ordering for the
964 /// read-modify-write operation that takes place if the comparison with `current` succeeds.
965 /// `failure` describes the required ordering for the load operation that takes place when
966 /// the comparison fails. Using [`Acquire`] as success ordering makes the store part
967 /// of this operation [`Relaxed`], and using [`Release`] makes the successful load
968 /// [`Relaxed`]. The failure ordering can only be [`SeqCst`], [`Acquire`] or [`Relaxed`].
969 ///
970 /// **Note:** This method is only available on platforms that support atomic
971 /// operations on `u8`.
972 ///
973 /// # Examples
974 ///
975 /// ```
976 /// use std::sync::atomic::{AtomicBool, Ordering};
977 ///
978 /// let val = AtomicBool::new(false);
979 ///
980 /// let new = true;
981 /// let mut old = val.load(Ordering::Relaxed);
982 /// loop {
983 /// match val.compare_exchange_weak(old, new, Ordering::SeqCst, Ordering::Relaxed) {
984 /// Ok(_) => break,
985 /// Err(x) => old = x,
986 /// }
987 /// }
988 /// ```
989 ///
990 /// # Considerations
991 ///
992 /// `compare_exchange` is a [compare-and-swap operation] and thus exhibits the usual downsides
993 /// of CAS operations. In particular, a load of the value followed by a successful
994 /// `compare_exchange` with the previous load *does not ensure* that other threads have not
995 /// changed the value in the interim. This is usually important when the *equality* check in
996 /// the `compare_exchange` is being used to check the *identity* of a value, but equality
997 /// does not necessarily imply identity. In this case, `compare_exchange` can lead to the
998 /// [ABA problem].
999 ///
1000 /// [ABA Problem]: https://en.wikipedia.org/wiki/ABA_problem
1001 /// [compare-and-swap operation]: https://en.wikipedia.org/wiki/Compare-and-swap
1002 #[inline]
1003 #[stable(feature = "extended_compare_and_swap", since = "1.10.0")]
1004 #[doc(alias = "compare_and_swap")]
1005 #[cfg(target_has_atomic = "8")]
1006 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
1007 pub fn compare_exchange_weak(
1008 &self,
1009 current: bool,
1010 new: bool,
1011 success: Ordering,
1012 failure: Ordering,
1013 ) -> Result<bool, bool> {
1014 if EMULATE_ATOMIC_BOOL {
1015 return self.compare_exchange(current, new, success, failure);
1016 }
1017
1018 // SAFETY: data races are prevented by atomic intrinsics.
1019 match unsafe {
1020 atomic_compare_exchange_weak(self.v.get(), current as u8, new as u8, success, failure)
1021 } {
1022 Ok(x) => Ok(x != 0),
1023 Err(x) => Err(x != 0),
1024 }
1025 }
1026
1027 /// Logical "and" with a boolean value.
1028 ///
1029 /// Performs a logical "and" operation on the current value and the argument `val`, and sets
1030 /// the new value to the result.
1031 ///
1032 /// Returns the previous value.
1033 ///
1034 /// `fetch_and` takes an [`Ordering`] argument which describes the memory ordering
1035 /// of this operation. All ordering modes are possible. Note that using
1036 /// [`Acquire`] makes the store part of this operation [`Relaxed`], and
1037 /// using [`Release`] makes the load part [`Relaxed`].
1038 ///
1039 /// **Note:** This method is only available on platforms that support atomic
1040 /// operations on `u8`.
1041 ///
1042 /// # Examples
1043 ///
1044 /// ```
1045 /// use std::sync::atomic::{AtomicBool, Ordering};
1046 ///
1047 /// let foo = AtomicBool::new(true);
1048 /// assert_eq!(foo.fetch_and(false, Ordering::SeqCst), true);
1049 /// assert_eq!(foo.load(Ordering::SeqCst), false);
1050 ///
1051 /// let foo = AtomicBool::new(true);
1052 /// assert_eq!(foo.fetch_and(true, Ordering::SeqCst), true);
1053 /// assert_eq!(foo.load(Ordering::SeqCst), true);
1054 ///
1055 /// let foo = AtomicBool::new(false);
1056 /// assert_eq!(foo.fetch_and(false, Ordering::SeqCst), false);
1057 /// assert_eq!(foo.load(Ordering::SeqCst), false);
1058 /// ```
1059 #[inline]
1060 #[stable(feature = "rust1", since = "1.0.0")]
1061 #[cfg(target_has_atomic = "8")]
1062 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
1063 pub fn fetch_and(&self, val: bool, order: Ordering) -> bool {
1064 // SAFETY: data races are prevented by atomic intrinsics.
1065 unsafe { atomic_and(self.v.get(), val as u8, order) != 0 }
1066 }
1067
1068 /// Logical "nand" with a boolean value.
1069 ///
1070 /// Performs a logical "nand" operation on the current value and the argument `val`, and sets
1071 /// the new value to the result.
1072 ///
1073 /// Returns the previous value.
1074 ///
1075 /// `fetch_nand` takes an [`Ordering`] argument which describes the memory ordering
1076 /// of this operation. All ordering modes are possible. Note that using
1077 /// [`Acquire`] makes the store part of this operation [`Relaxed`], and
1078 /// using [`Release`] makes the load part [`Relaxed`].
1079 ///
1080 /// **Note:** This method is only available on platforms that support atomic
1081 /// operations on `u8`.
1082 ///
1083 /// # Examples
1084 ///
1085 /// ```
1086 /// use std::sync::atomic::{AtomicBool, Ordering};
1087 ///
1088 /// let foo = AtomicBool::new(true);
1089 /// assert_eq!(foo.fetch_nand(false, Ordering::SeqCst), true);
1090 /// assert_eq!(foo.load(Ordering::SeqCst), true);
1091 ///
1092 /// let foo = AtomicBool::new(true);
1093 /// assert_eq!(foo.fetch_nand(true, Ordering::SeqCst), true);
1094 /// assert_eq!(foo.load(Ordering::SeqCst) as usize, 0);
1095 /// assert_eq!(foo.load(Ordering::SeqCst), false);
1096 ///
1097 /// let foo = AtomicBool::new(false);
1098 /// assert_eq!(foo.fetch_nand(false, Ordering::SeqCst), false);
1099 /// assert_eq!(foo.load(Ordering::SeqCst), true);
1100 /// ```
1101 #[inline]
1102 #[stable(feature = "rust1", since = "1.0.0")]
1103 #[cfg(target_has_atomic = "8")]
1104 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
1105 pub fn fetch_nand(&self, val: bool, order: Ordering) -> bool {
1106 // We can't use atomic_nand here because it can result in a bool with
1107 // an invalid value. This happens because the atomic operation is done
1108 // with an 8-bit integer internally, which would set the upper 7 bits.
1109 // So we just use fetch_xor or swap instead.
1110 if val {
1111 // !(x & true) == !x
1112 // We must invert the bool.
1113 self.fetch_xor(true, order)
1114 } else {
1115 // !(x & false) == true
1116 // We must set the bool to true.
1117 self.swap(true, order)
1118 }
1119 }
1120
1121 /// Logical "or" with a boolean value.
1122 ///
1123 /// Performs a logical "or" operation on the current value and the argument `val`, and sets the
1124 /// new value to the result.
1125 ///
1126 /// Returns the previous value.
1127 ///
1128 /// `fetch_or` takes an [`Ordering`] argument which describes the memory ordering
1129 /// of this operation. All ordering modes are possible. Note that using
1130 /// [`Acquire`] makes the store part of this operation [`Relaxed`], and
1131 /// using [`Release`] makes the load part [`Relaxed`].
1132 ///
1133 /// **Note:** This method is only available on platforms that support atomic
1134 /// operations on `u8`.
1135 ///
1136 /// # Examples
1137 ///
1138 /// ```
1139 /// use std::sync::atomic::{AtomicBool, Ordering};
1140 ///
1141 /// let foo = AtomicBool::new(true);
1142 /// assert_eq!(foo.fetch_or(false, Ordering::SeqCst), true);
1143 /// assert_eq!(foo.load(Ordering::SeqCst), true);
1144 ///
1145 /// let foo = AtomicBool::new(true);
1146 /// assert_eq!(foo.fetch_or(true, Ordering::SeqCst), true);
1147 /// assert_eq!(foo.load(Ordering::SeqCst), true);
1148 ///
1149 /// let foo = AtomicBool::new(false);
1150 /// assert_eq!(foo.fetch_or(false, Ordering::SeqCst), false);
1151 /// assert_eq!(foo.load(Ordering::SeqCst), false);
1152 /// ```
1153 #[inline]
1154 #[stable(feature = "rust1", since = "1.0.0")]
1155 #[cfg(target_has_atomic = "8")]
1156 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
1157 pub fn fetch_or(&self, val: bool, order: Ordering) -> bool {
1158 // SAFETY: data races are prevented by atomic intrinsics.
1159 unsafe { atomic_or(self.v.get(), val as u8, order) != 0 }
1160 }
1161
1162 /// Logical "xor" with a boolean value.
1163 ///
1164 /// Performs a logical "xor" operation on the current value and the argument `val`, and sets
1165 /// the new value to the result.
1166 ///
1167 /// Returns the previous value.
1168 ///
1169 /// `fetch_xor` takes an [`Ordering`] argument which describes the memory ordering
1170 /// of this operation. All ordering modes are possible. Note that using
1171 /// [`Acquire`] makes the store part of this operation [`Relaxed`], and
1172 /// using [`Release`] makes the load part [`Relaxed`].
1173 ///
1174 /// **Note:** This method is only available on platforms that support atomic
1175 /// operations on `u8`.
1176 ///
1177 /// # Examples
1178 ///
1179 /// ```
1180 /// use std::sync::atomic::{AtomicBool, Ordering};
1181 ///
1182 /// let foo = AtomicBool::new(true);
1183 /// assert_eq!(foo.fetch_xor(false, Ordering::SeqCst), true);
1184 /// assert_eq!(foo.load(Ordering::SeqCst), true);
1185 ///
1186 /// let foo = AtomicBool::new(true);
1187 /// assert_eq!(foo.fetch_xor(true, Ordering::SeqCst), true);
1188 /// assert_eq!(foo.load(Ordering::SeqCst), false);
1189 ///
1190 /// let foo = AtomicBool::new(false);
1191 /// assert_eq!(foo.fetch_xor(false, Ordering::SeqCst), false);
1192 /// assert_eq!(foo.load(Ordering::SeqCst), false);
1193 /// ```
1194 #[inline]
1195 #[stable(feature = "rust1", since = "1.0.0")]
1196 #[cfg(target_has_atomic = "8")]
1197 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
1198 pub fn fetch_xor(&self, val: bool, order: Ordering) -> bool {
1199 // SAFETY: data races are prevented by atomic intrinsics.
1200 unsafe { atomic_xor(self.v.get(), val as u8, order) != 0 }
1201 }
1202
1203 /// Logical "not" with a boolean value.
1204 ///
1205 /// Performs a logical "not" operation on the current value, and sets
1206 /// the new value to the result.
1207 ///
1208 /// Returns the previous value.
1209 ///
1210 /// `fetch_not` takes an [`Ordering`] argument which describes the memory ordering
1211 /// of this operation. All ordering modes are possible. Note that using
1212 /// [`Acquire`] makes the store part of this operation [`Relaxed`], and
1213 /// using [`Release`] makes the load part [`Relaxed`].
1214 ///
1215 /// **Note:** This method is only available on platforms that support atomic
1216 /// operations on `u8`.
1217 ///
1218 /// # Examples
1219 ///
1220 /// ```
1221 /// use std::sync::atomic::{AtomicBool, Ordering};
1222 ///
1223 /// let foo = AtomicBool::new(true);
1224 /// assert_eq!(foo.fetch_not(Ordering::SeqCst), true);
1225 /// assert_eq!(foo.load(Ordering::SeqCst), false);
1226 ///
1227 /// let foo = AtomicBool::new(false);
1228 /// assert_eq!(foo.fetch_not(Ordering::SeqCst), false);
1229 /// assert_eq!(foo.load(Ordering::SeqCst), true);
1230 /// ```
1231 #[inline]
1232 #[stable(feature = "atomic_bool_fetch_not", since = "1.81.0")]
1233 #[cfg(target_has_atomic = "8")]
1234 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
1235 pub fn fetch_not(&self, order: Ordering) -> bool {
1236 self.fetch_xor(true, order)
1237 }
1238
1239 /// Returns a mutable pointer to the underlying [`bool`].
1240 ///
1241 /// Doing non-atomic reads and writes on the resulting boolean can be a data race.
1242 /// This method is mostly useful for FFI, where the function signature may use
1243 /// `*mut bool` instead of `&AtomicBool`.
1244 ///
1245 /// Returning an `*mut` pointer from a shared reference to this atomic is safe because the
1246 /// atomic types work with interior mutability. All modifications of an atomic change the value
1247 /// through a shared reference, and can do so safely as long as they use atomic operations. Any
1248 /// use of the returned raw pointer requires an `unsafe` block and still has to uphold the
1249 /// requirements of the [memory model].
1250 ///
1251 /// # Examples
1252 ///
1253 /// ```ignore (extern-declaration)
1254 /// # fn main() {
1255 /// use std::sync::atomic::AtomicBool;
1256 ///
1257 /// extern "C" {
1258 /// fn my_atomic_op(arg: *mut bool);
1259 /// }
1260 ///
1261 /// let mut atomic = AtomicBool::new(true);
1262 /// unsafe {
1263 /// my_atomic_op(atomic.as_ptr());
1264 /// }
1265 /// # }
1266 /// ```
1267 ///
1268 /// [memory model]: self#memory-model-for-atomic-accesses
1269 #[inline]
1270 #[stable(feature = "atomic_as_ptr", since = "1.70.0")]
1271 #[rustc_const_stable(feature = "atomic_as_ptr", since = "1.70.0")]
1272 #[rustc_never_returns_null_ptr]
1273 pub const fn as_ptr(&self) -> *mut bool {
1274 self.v.get().cast()
1275 }
1276
1277 /// Fetches the value, and applies a function to it that returns an optional
1278 /// new value. Returns a `Result` of `Ok(previous_value)` if the function
1279 /// returned `Some(_)`, else `Err(previous_value)`.
1280 ///
1281 /// Note: This may call the function multiple times if the value has been
1282 /// changed from other threads in the meantime, as long as the function
1283 /// returns `Some(_)`, but the function will have been applied only once to
1284 /// the stored value.
1285 ///
1286 /// `fetch_update` takes two [`Ordering`] arguments to describe the memory
1287 /// ordering of this operation. The first describes the required ordering for
1288 /// when the operation finally succeeds while the second describes the
1289 /// required ordering for loads. These correspond to the success and failure
1290 /// orderings of [`AtomicBool::compare_exchange`] respectively.
1291 ///
1292 /// Using [`Acquire`] as success ordering makes the store part of this
1293 /// operation [`Relaxed`], and using [`Release`] makes the final successful
1294 /// load [`Relaxed`]. The (failed) load ordering can only be [`SeqCst`],
1295 /// [`Acquire`] or [`Relaxed`].
1296 ///
1297 /// **Note:** This method is only available on platforms that support atomic
1298 /// operations on `u8`.
1299 ///
1300 /// # Considerations
1301 ///
1302 /// This method is not magic; it is not provided by the hardware, and does not act like a
1303 /// critical section or mutex.
1304 ///
1305 /// It is implemented on top of an atomic [compare-and-swap operation], and thus is subject to
1306 /// the usual drawbacks of CAS operations. In particular, be careful of the [ABA problem].
1307 ///
1308 /// [ABA Problem]: https://en.wikipedia.org/wiki/ABA_problem
1309 /// [compare-and-swap operation]: https://en.wikipedia.org/wiki/Compare-and-swap
1310 ///
1311 /// # Examples
1312 ///
1313 /// ```rust
1314 /// use std::sync::atomic::{AtomicBool, Ordering};
1315 ///
1316 /// let x = AtomicBool::new(false);
1317 /// assert_eq!(x.fetch_update(Ordering::SeqCst, Ordering::SeqCst, |_| None), Err(false));
1318 /// assert_eq!(x.fetch_update(Ordering::SeqCst, Ordering::SeqCst, |x| Some(!x)), Ok(false));
1319 /// assert_eq!(x.fetch_update(Ordering::SeqCst, Ordering::SeqCst, |x| Some(!x)), Ok(true));
1320 /// assert_eq!(x.load(Ordering::SeqCst), false);
1321 /// ```
1322 #[inline]
1323 #[stable(feature = "atomic_fetch_update", since = "1.53.0")]
1324 #[cfg(target_has_atomic = "8")]
1325 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
1326 pub fn fetch_update<F>(
1327 &self,
1328 set_order: Ordering,
1329 fetch_order: Ordering,
1330 mut f: F,
1331 ) -> Result<bool, bool>
1332 where
1333 F: FnMut(bool) -> Option<bool>,
1334 {
1335 let mut prev = self.load(fetch_order);
1336 while let Some(next) = f(prev) {
1337 match self.compare_exchange_weak(prev, next, set_order, fetch_order) {
1338 x @ Ok(_) => return x,
1339 Err(next_prev) => prev = next_prev,
1340 }
1341 }
1342 Err(prev)
1343 }
1344
1345 /// Fetches the value, and applies a function to it that returns an optional
1346 /// new value. Returns a `Result` of `Ok(previous_value)` if the function
1347 /// returned `Some(_)`, else `Err(previous_value)`.
1348 ///
1349 /// See also: [`update`](`AtomicBool::update`).
1350 ///
1351 /// Note: This may call the function multiple times if the value has been
1352 /// changed from other threads in the meantime, as long as the function
1353 /// returns `Some(_)`, but the function will have been applied only once to
1354 /// the stored value.
1355 ///
1356 /// `try_update` takes two [`Ordering`] arguments to describe the memory
1357 /// ordering of this operation. The first describes the required ordering for
1358 /// when the operation finally succeeds while the second describes the
1359 /// required ordering for loads. These correspond to the success and failure
1360 /// orderings of [`AtomicBool::compare_exchange`] respectively.
1361 ///
1362 /// Using [`Acquire`] as success ordering makes the store part of this
1363 /// operation [`Relaxed`], and using [`Release`] makes the final successful
1364 /// load [`Relaxed`]. The (failed) load ordering can only be [`SeqCst`],
1365 /// [`Acquire`] or [`Relaxed`].
1366 ///
1367 /// **Note:** This method is only available on platforms that support atomic
1368 /// operations on `u8`.
1369 ///
1370 /// # Considerations
1371 ///
1372 /// This method is not magic; it is not provided by the hardware, and does not act like a
1373 /// critical section or mutex.
1374 ///
1375 /// It is implemented on top of an atomic [compare-and-swap operation], and thus is subject to
1376 /// the usual drawbacks of CAS operations. In particular, be careful of the [ABA problem].
1377 ///
1378 /// [ABA Problem]: https://en.wikipedia.org/wiki/ABA_problem
1379 /// [compare-and-swap operation]: https://en.wikipedia.org/wiki/Compare-and-swap
1380 ///
1381 /// # Examples
1382 ///
1383 /// ```rust
1384 /// #![feature(atomic_try_update)]
1385 /// use std::sync::atomic::{AtomicBool, Ordering};
1386 ///
1387 /// let x = AtomicBool::new(false);
1388 /// assert_eq!(x.try_update(Ordering::SeqCst, Ordering::SeqCst, |_| None), Err(false));
1389 /// assert_eq!(x.try_update(Ordering::SeqCst, Ordering::SeqCst, |x| Some(!x)), Ok(false));
1390 /// assert_eq!(x.try_update(Ordering::SeqCst, Ordering::SeqCst, |x| Some(!x)), Ok(true));
1391 /// assert_eq!(x.load(Ordering::SeqCst), false);
1392 /// ```
1393 #[inline]
1394 #[unstable(feature = "atomic_try_update", issue = "135894")]
1395 #[cfg(target_has_atomic = "8")]
1396 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
1397 pub fn try_update(
1398 &self,
1399 set_order: Ordering,
1400 fetch_order: Ordering,
1401 f: impl FnMut(bool) -> Option<bool>,
1402 ) -> Result<bool, bool> {
1403 // FIXME(atomic_try_update): this is currently an unstable alias to `fetch_update`;
1404 // when stabilizing, turn `fetch_update` into a deprecated alias to `try_update`.
1405 self.fetch_update(set_order, fetch_order, f)
1406 }
1407
1408 /// Fetches the value, applies a function to it that it return a new value.
1409 /// The new value is stored and the old value is returned.
1410 ///
1411 /// See also: [`try_update`](`AtomicBool::try_update`).
1412 ///
1413 /// Note: This may call the function multiple times if the value has been changed from other threads in
1414 /// the meantime, but the function will have been applied only once to the stored value.
1415 ///
1416 /// `update` takes two [`Ordering`] arguments to describe the memory
1417 /// ordering of this operation. The first describes the required ordering for
1418 /// when the operation finally succeeds while the second describes the
1419 /// required ordering for loads. These correspond to the success and failure
1420 /// orderings of [`AtomicBool::compare_exchange`] respectively.
1421 ///
1422 /// Using [`Acquire`] as success ordering makes the store part
1423 /// of this operation [`Relaxed`], and using [`Release`] makes the final successful load
1424 /// [`Relaxed`]. The (failed) load ordering can only be [`SeqCst`], [`Acquire`] or [`Relaxed`].
1425 ///
1426 /// **Note:** This method is only available on platforms that support atomic operations on `u8`.
1427 ///
1428 /// # Considerations
1429 ///
1430 /// This method is not magic; it is not provided by the hardware, and does not act like a
1431 /// critical section or mutex.
1432 ///
1433 /// It is implemented on top of an atomic [compare-and-swap operation], and thus is subject to
1434 /// the usual drawbacks of CAS operations. In particular, be careful of the [ABA problem].
1435 ///
1436 /// [ABA Problem]: https://en.wikipedia.org/wiki/ABA_problem
1437 /// [compare-and-swap operation]: https://en.wikipedia.org/wiki/Compare-and-swap
1438 ///
1439 /// # Examples
1440 ///
1441 /// ```rust
1442 /// #![feature(atomic_try_update)]
1443 ///
1444 /// use std::sync::atomic::{AtomicBool, Ordering};
1445 ///
1446 /// let x = AtomicBool::new(false);
1447 /// assert_eq!(x.update(Ordering::SeqCst, Ordering::SeqCst, |x| !x), false);
1448 /// assert_eq!(x.update(Ordering::SeqCst, Ordering::SeqCst, |x| !x), true);
1449 /// assert_eq!(x.load(Ordering::SeqCst), false);
1450 /// ```
1451 #[inline]
1452 #[unstable(feature = "atomic_try_update", issue = "135894")]
1453 #[cfg(target_has_atomic = "8")]
1454 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
1455 pub fn update(
1456 &self,
1457 set_order: Ordering,
1458 fetch_order: Ordering,
1459 mut f: impl FnMut(bool) -> bool,
1460 ) -> bool {
1461 let mut prev = self.load(fetch_order);
1462 loop {
1463 match self.compare_exchange_weak(prev, f(prev), set_order, fetch_order) {
1464 Ok(x) => break x,
1465 Err(next_prev) => prev = next_prev,
1466 }
1467 }
1468 }
1469}
1470
1471#[cfg(target_has_atomic_load_store = "ptr")]
1472impl<T> AtomicPtr<T> {
1473 /// Creates a new `AtomicPtr`.
1474 ///
1475 /// # Examples
1476 ///
1477 /// ```
1478 /// use std::sync::atomic::AtomicPtr;
1479 ///
1480 /// let ptr = &mut 5;
1481 /// let atomic_ptr = AtomicPtr::new(ptr);
1482 /// ```
1483 #[inline]
1484 #[stable(feature = "rust1", since = "1.0.0")]
1485 #[rustc_const_stable(feature = "const_atomic_new", since = "1.24.0")]
1486 pub const fn new(p: *mut T) -> AtomicPtr<T> {
1487 AtomicPtr { p: UnsafeCell::new(p) }
1488 }
1489
1490 /// Creates a new `AtomicPtr` from a pointer.
1491 ///
1492 /// # Examples
1493 ///
1494 /// ```
1495 /// use std::sync::atomic::{self, AtomicPtr};
1496 ///
1497 /// // Get a pointer to an allocated value
1498 /// let ptr: *mut *mut u8 = Box::into_raw(Box::new(std::ptr::null_mut()));
1499 ///
1500 /// assert!(ptr.cast::<AtomicPtr<u8>>().is_aligned());
1501 ///
1502 /// {
1503 /// // Create an atomic view of the allocated value
1504 /// let atomic = unsafe { AtomicPtr::from_ptr(ptr) };
1505 ///
1506 /// // Use `atomic` for atomic operations, possibly share it with other threads
1507 /// atomic.store(std::ptr::NonNull::dangling().as_ptr(), atomic::Ordering::Relaxed);
1508 /// }
1509 ///
1510 /// // It's ok to non-atomically access the value behind `ptr`,
1511 /// // since the reference to the atomic ended its lifetime in the block above
1512 /// assert!(!unsafe { *ptr }.is_null());
1513 ///
1514 /// // Deallocate the value
1515 /// unsafe { drop(Box::from_raw(ptr)) }
1516 /// ```
1517 ///
1518 /// # Safety
1519 ///
1520 /// * `ptr` must be aligned to `align_of::<AtomicPtr<T>>()` (note that on some platforms this
1521 /// can be bigger than `align_of::<*mut T>()`).
1522 /// * `ptr` must be [valid] for both reads and writes for the whole lifetime `'a`.
1523 /// * You must adhere to the [Memory model for atomic accesses]. In particular, it is not
1524 /// allowed to mix conflicting atomic and non-atomic accesses, or atomic accesses of different
1525 /// sizes, without synchronization.
1526 ///
1527 /// [valid]: crate::ptr#safety
1528 /// [Memory model for atomic accesses]: self#memory-model-for-atomic-accesses
1529 #[inline]
1530 #[stable(feature = "atomic_from_ptr", since = "1.75.0")]
1531 #[rustc_const_stable(feature = "const_atomic_from_ptr", since = "1.84.0")]
1532 pub const unsafe fn from_ptr<'a>(ptr: *mut *mut T) -> &'a AtomicPtr<T> {
1533 // SAFETY: guaranteed by the caller
1534 unsafe { &*ptr.cast() }
1535 }
1536
1537 /// Returns a mutable reference to the underlying pointer.
1538 ///
1539 /// This is safe because the mutable reference guarantees that no other threads are
1540 /// concurrently accessing the atomic data.
1541 ///
1542 /// # Examples
1543 ///
1544 /// ```
1545 /// use std::sync::atomic::{AtomicPtr, Ordering};
1546 ///
1547 /// let mut data = 10;
1548 /// let mut atomic_ptr = AtomicPtr::new(&mut data);
1549 /// let mut other_data = 5;
1550 /// *atomic_ptr.get_mut() = &mut other_data;
1551 /// assert_eq!(unsafe { *atomic_ptr.load(Ordering::SeqCst) }, 5);
1552 /// ```
1553 #[inline]
1554 #[stable(feature = "atomic_access", since = "1.15.0")]
1555 pub fn get_mut(&mut self) -> &mut *mut T {
1556 self.p.get_mut()
1557 }
1558
1559 /// Gets atomic access to a pointer.
1560 ///
1561 /// # Examples
1562 ///
1563 /// ```
1564 /// #![feature(atomic_from_mut)]
1565 /// use std::sync::atomic::{AtomicPtr, Ordering};
1566 ///
1567 /// let mut data = 123;
1568 /// let mut some_ptr = &mut data as *mut i32;
1569 /// let a = AtomicPtr::from_mut(&mut some_ptr);
1570 /// let mut other_data = 456;
1571 /// a.store(&mut other_data, Ordering::Relaxed);
1572 /// assert_eq!(unsafe { *some_ptr }, 456);
1573 /// ```
1574 #[inline]
1575 #[cfg(target_has_atomic_equal_alignment = "ptr")]
1576 #[unstable(feature = "atomic_from_mut", issue = "76314")]
1577 pub fn from_mut(v: &mut *mut T) -> &mut Self {
1578 let [] = [(); align_of::<AtomicPtr<()>>() - align_of::<*mut ()>()];
1579 // SAFETY:
1580 // - the mutable reference guarantees unique ownership.
1581 // - the alignment of `*mut T` and `Self` is the same on all platforms
1582 // supported by rust, as verified above.
1583 unsafe { &mut *(v as *mut *mut T as *mut Self) }
1584 }
1585
1586 /// Gets non-atomic access to a `&mut [AtomicPtr]` slice.
1587 ///
1588 /// This is safe because the mutable reference guarantees that no other threads are
1589 /// concurrently accessing the atomic data.
1590 ///
1591 /// # Examples
1592 ///
1593 /// ```ignore-wasm
1594 /// #![feature(atomic_from_mut)]
1595 /// use std::ptr::null_mut;
1596 /// use std::sync::atomic::{AtomicPtr, Ordering};
1597 ///
1598 /// let mut some_ptrs = [const { AtomicPtr::new(null_mut::<String>()) }; 10];
1599 ///
1600 /// let view: &mut [*mut String] = AtomicPtr::get_mut_slice(&mut some_ptrs);
1601 /// assert_eq!(view, [null_mut::<String>(); 10]);
1602 /// view
1603 /// .iter_mut()
1604 /// .enumerate()
1605 /// .for_each(|(i, ptr)| *ptr = Box::into_raw(Box::new(format!("iteration#{i}"))));
1606 ///
1607 /// std::thread::scope(|s| {
1608 /// for ptr in &some_ptrs {
1609 /// s.spawn(move || {
1610 /// let ptr = ptr.load(Ordering::Relaxed);
1611 /// assert!(!ptr.is_null());
1612 ///
1613 /// let name = unsafe { Box::from_raw(ptr) };
1614 /// println!("Hello, {name}!");
1615 /// });
1616 /// }
1617 /// });
1618 /// ```
1619 #[inline]
1620 #[unstable(feature = "atomic_from_mut", issue = "76314")]
1621 pub fn get_mut_slice(this: &mut [Self]) -> &mut [*mut T] {
1622 // SAFETY: the mutable reference guarantees unique ownership.
1623 unsafe { &mut *(this as *mut [Self] as *mut [*mut T]) }
1624 }
1625
1626 /// Gets atomic access to a slice of pointers.
1627 ///
1628 /// # Examples
1629 ///
1630 /// ```ignore-wasm
1631 /// #![feature(atomic_from_mut)]
1632 /// use std::ptr::null_mut;
1633 /// use std::sync::atomic::{AtomicPtr, Ordering};
1634 ///
1635 /// let mut some_ptrs = [null_mut::<String>(); 10];
1636 /// let a = &*AtomicPtr::from_mut_slice(&mut some_ptrs);
1637 /// std::thread::scope(|s| {
1638 /// for i in 0..a.len() {
1639 /// s.spawn(move || {
1640 /// let name = Box::new(format!("thread{i}"));
1641 /// a[i].store(Box::into_raw(name), Ordering::Relaxed);
1642 /// });
1643 /// }
1644 /// });
1645 /// for p in some_ptrs {
1646 /// assert!(!p.is_null());
1647 /// let name = unsafe { Box::from_raw(p) };
1648 /// println!("Hello, {name}!");
1649 /// }
1650 /// ```
1651 #[inline]
1652 #[cfg(target_has_atomic_equal_alignment = "ptr")]
1653 #[unstable(feature = "atomic_from_mut", issue = "76314")]
1654 pub fn from_mut_slice(v: &mut [*mut T]) -> &mut [Self] {
1655 // SAFETY:
1656 // - the mutable reference guarantees unique ownership.
1657 // - the alignment of `*mut T` and `Self` is the same on all platforms
1658 // supported by rust, as verified above.
1659 unsafe { &mut *(v as *mut [*mut T] as *mut [Self]) }
1660 }
1661
1662 /// Consumes the atomic and returns the contained value.
1663 ///
1664 /// This is safe because passing `self` by value guarantees that no other threads are
1665 /// concurrently accessing the atomic data.
1666 ///
1667 /// # Examples
1668 ///
1669 /// ```
1670 /// use std::sync::atomic::AtomicPtr;
1671 ///
1672 /// let mut data = 5;
1673 /// let atomic_ptr = AtomicPtr::new(&mut data);
1674 /// assert_eq!(unsafe { *atomic_ptr.into_inner() }, 5);
1675 /// ```
1676 #[inline]
1677 #[stable(feature = "atomic_access", since = "1.15.0")]
1678 #[rustc_const_stable(feature = "const_atomic_into_inner", since = "1.79.0")]
1679 pub const fn into_inner(self) -> *mut T {
1680 self.p.into_inner()
1681 }
1682
1683 /// Loads a value from the pointer.
1684 ///
1685 /// `load` takes an [`Ordering`] argument which describes the memory ordering
1686 /// of this operation. Possible values are [`SeqCst`], [`Acquire`] and [`Relaxed`].
1687 ///
1688 /// # Panics
1689 ///
1690 /// Panics if `order` is [`Release`] or [`AcqRel`].
1691 ///
1692 /// # Examples
1693 ///
1694 /// ```
1695 /// use std::sync::atomic::{AtomicPtr, Ordering};
1696 ///
1697 /// let ptr = &mut 5;
1698 /// let some_ptr = AtomicPtr::new(ptr);
1699 ///
1700 /// let value = some_ptr.load(Ordering::Relaxed);
1701 /// ```
1702 #[inline]
1703 #[stable(feature = "rust1", since = "1.0.0")]
1704 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
1705 pub fn load(&self, order: Ordering) -> *mut T {
1706 // SAFETY: data races are prevented by atomic intrinsics.
1707 unsafe { atomic_load(self.p.get(), order) }
1708 }
1709
1710 /// Stores a value into the pointer.
1711 ///
1712 /// `store` takes an [`Ordering`] argument which describes the memory ordering
1713 /// of this operation. Possible values are [`SeqCst`], [`Release`] and [`Relaxed`].
1714 ///
1715 /// # Panics
1716 ///
1717 /// Panics if `order` is [`Acquire`] or [`AcqRel`].
1718 ///
1719 /// # Examples
1720 ///
1721 /// ```
1722 /// use std::sync::atomic::{AtomicPtr, Ordering};
1723 ///
1724 /// let ptr = &mut 5;
1725 /// let some_ptr = AtomicPtr::new(ptr);
1726 ///
1727 /// let other_ptr = &mut 10;
1728 ///
1729 /// some_ptr.store(other_ptr, Ordering::Relaxed);
1730 /// ```
1731 #[inline]
1732 #[stable(feature = "rust1", since = "1.0.0")]
1733 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
1734 pub fn store(&self, ptr: *mut T, order: Ordering) {
1735 // SAFETY: data races are prevented by atomic intrinsics.
1736 unsafe {
1737 atomic_store(self.p.get(), ptr, order);
1738 }
1739 }
1740
1741 /// Stores a value into the pointer, returning the previous value.
1742 ///
1743 /// `swap` takes an [`Ordering`] argument which describes the memory ordering
1744 /// of this operation. All ordering modes are possible. Note that using
1745 /// [`Acquire`] makes the store part of this operation [`Relaxed`], and
1746 /// using [`Release`] makes the load part [`Relaxed`].
1747 ///
1748 /// **Note:** This method is only available on platforms that support atomic
1749 /// operations on pointers.
1750 ///
1751 /// # Examples
1752 ///
1753 /// ```
1754 /// use std::sync::atomic::{AtomicPtr, Ordering};
1755 ///
1756 /// let ptr = &mut 5;
1757 /// let some_ptr = AtomicPtr::new(ptr);
1758 ///
1759 /// let other_ptr = &mut 10;
1760 ///
1761 /// let value = some_ptr.swap(other_ptr, Ordering::Relaxed);
1762 /// ```
1763 #[inline]
1764 #[stable(feature = "rust1", since = "1.0.0")]
1765 #[cfg(target_has_atomic = "ptr")]
1766 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
1767 pub fn swap(&self, ptr: *mut T, order: Ordering) -> *mut T {
1768 // SAFETY: data races are prevented by atomic intrinsics.
1769 unsafe { atomic_swap(self.p.get(), ptr, order) }
1770 }
1771
1772 /// Stores a value into the pointer if the current value is the same as the `current` value.
1773 ///
1774 /// The return value is always the previous value. If it is equal to `current`, then the value
1775 /// was updated.
1776 ///
1777 /// `compare_and_swap` also takes an [`Ordering`] argument which describes the memory
1778 /// ordering of this operation. Notice that even when using [`AcqRel`], the operation
1779 /// might fail and hence just perform an `Acquire` load, but not have `Release` semantics.
1780 /// Using [`Acquire`] makes the store part of this operation [`Relaxed`] if it
1781 /// happens, and using [`Release`] makes the load part [`Relaxed`].
1782 ///
1783 /// **Note:** This method is only available on platforms that support atomic
1784 /// operations on pointers.
1785 ///
1786 /// # Migrating to `compare_exchange` and `compare_exchange_weak`
1787 ///
1788 /// `compare_and_swap` is equivalent to `compare_exchange` with the following mapping for
1789 /// memory orderings:
1790 ///
1791 /// Original | Success | Failure
1792 /// -------- | ------- | -------
1793 /// Relaxed | Relaxed | Relaxed
1794 /// Acquire | Acquire | Acquire
1795 /// Release | Release | Relaxed
1796 /// AcqRel | AcqRel | Acquire
1797 /// SeqCst | SeqCst | SeqCst
1798 ///
1799 /// `compare_and_swap` and `compare_exchange` also differ in their return type. You can use
1800 /// `compare_exchange(...).unwrap_or_else(|x| x)` to recover the behavior of `compare_and_swap`,
1801 /// but in most cases it is more idiomatic to check whether the return value is `Ok` or `Err`
1802 /// rather than to infer success vs failure based on the value that was read.
1803 ///
1804 /// During migration, consider whether it makes sense to use `compare_exchange_weak` instead.
1805 /// `compare_exchange_weak` is allowed to fail spuriously even when the comparison succeeds,
1806 /// which allows the compiler to generate better assembly code when the compare and swap
1807 /// is used in a loop.
1808 ///
1809 /// # Examples
1810 ///
1811 /// ```
1812 /// use std::sync::atomic::{AtomicPtr, Ordering};
1813 ///
1814 /// let ptr = &mut 5;
1815 /// let some_ptr = AtomicPtr::new(ptr);
1816 ///
1817 /// let other_ptr = &mut 10;
1818 ///
1819 /// let value = some_ptr.compare_and_swap(ptr, other_ptr, Ordering::Relaxed);
1820 /// ```
1821 #[inline]
1822 #[stable(feature = "rust1", since = "1.0.0")]
1823 #[deprecated(
1824 since = "1.50.0",
1825 note = "Use `compare_exchange` or `compare_exchange_weak` instead"
1826 )]
1827 #[cfg(target_has_atomic = "ptr")]
1828 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
1829 pub fn compare_and_swap(&self, current: *mut T, new: *mut T, order: Ordering) -> *mut T {
1830 match self.compare_exchange(current, new, order, strongest_failure_ordering(order)) {
1831 Ok(x) => x,
1832 Err(x) => x,
1833 }
1834 }
1835
1836 /// Stores a value into the pointer if the current value is the same as the `current` value.
1837 ///
1838 /// The return value is a result indicating whether the new value was written and containing
1839 /// the previous value. On success this value is guaranteed to be equal to `current`.
1840 ///
1841 /// `compare_exchange` takes two [`Ordering`] arguments to describe the memory
1842 /// ordering of this operation. `success` describes the required ordering for the
1843 /// read-modify-write operation that takes place if the comparison with `current` succeeds.
1844 /// `failure` describes the required ordering for the load operation that takes place when
1845 /// the comparison fails. Using [`Acquire`] as success ordering makes the store part
1846 /// of this operation [`Relaxed`], and using [`Release`] makes the successful load
1847 /// [`Relaxed`]. The failure ordering can only be [`SeqCst`], [`Acquire`] or [`Relaxed`].
1848 ///
1849 /// **Note:** This method is only available on platforms that support atomic
1850 /// operations on pointers.
1851 ///
1852 /// # Examples
1853 ///
1854 /// ```
1855 /// use std::sync::atomic::{AtomicPtr, Ordering};
1856 ///
1857 /// let ptr = &mut 5;
1858 /// let some_ptr = AtomicPtr::new(ptr);
1859 ///
1860 /// let other_ptr = &mut 10;
1861 ///
1862 /// let value = some_ptr.compare_exchange(ptr, other_ptr,
1863 /// Ordering::SeqCst, Ordering::Relaxed);
1864 /// ```
1865 ///
1866 /// # Considerations
1867 ///
1868 /// `compare_exchange` is a [compare-and-swap operation] and thus exhibits the usual downsides
1869 /// of CAS operations. In particular, a load of the value followed by a successful
1870 /// `compare_exchange` with the previous load *does not ensure* that other threads have not
1871 /// changed the value in the interim. This is usually important when the *equality* check in
1872 /// the `compare_exchange` is being used to check the *identity* of a value, but equality
1873 /// does not necessarily imply identity. This is a particularly common case for pointers, as
1874 /// a pointer holding the same address does not imply that the same object exists at that
1875 /// address! In this case, `compare_exchange` can lead to the [ABA problem].
1876 ///
1877 /// [ABA Problem]: https://en.wikipedia.org/wiki/ABA_problem
1878 /// [compare-and-swap operation]: https://en.wikipedia.org/wiki/Compare-and-swap
1879 #[inline]
1880 #[stable(feature = "extended_compare_and_swap", since = "1.10.0")]
1881 #[cfg(target_has_atomic = "ptr")]
1882 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
1883 pub fn compare_exchange(
1884 &self,
1885 current: *mut T,
1886 new: *mut T,
1887 success: Ordering,
1888 failure: Ordering,
1889 ) -> Result<*mut T, *mut T> {
1890 // SAFETY: data races are prevented by atomic intrinsics.
1891 unsafe { atomic_compare_exchange(self.p.get(), current, new, success, failure) }
1892 }
1893
1894 /// Stores a value into the pointer if the current value is the same as the `current` value.
1895 ///
1896 /// Unlike [`AtomicPtr::compare_exchange`], this function is allowed to spuriously fail even when the
1897 /// comparison succeeds, which can result in more efficient code on some platforms. The
1898 /// return value is a result indicating whether the new value was written and containing the
1899 /// previous value.
1900 ///
1901 /// `compare_exchange_weak` takes two [`Ordering`] arguments to describe the memory
1902 /// ordering of this operation. `success` describes the required ordering for the
1903 /// read-modify-write operation that takes place if the comparison with `current` succeeds.
1904 /// `failure` describes the required ordering for the load operation that takes place when
1905 /// the comparison fails. Using [`Acquire`] as success ordering makes the store part
1906 /// of this operation [`Relaxed`], and using [`Release`] makes the successful load
1907 /// [`Relaxed`]. The failure ordering can only be [`SeqCst`], [`Acquire`] or [`Relaxed`].
1908 ///
1909 /// **Note:** This method is only available on platforms that support atomic
1910 /// operations on pointers.
1911 ///
1912 /// # Examples
1913 ///
1914 /// ```
1915 /// use std::sync::atomic::{AtomicPtr, Ordering};
1916 ///
1917 /// let some_ptr = AtomicPtr::new(&mut 5);
1918 ///
1919 /// let new = &mut 10;
1920 /// let mut old = some_ptr.load(Ordering::Relaxed);
1921 /// loop {
1922 /// match some_ptr.compare_exchange_weak(old, new, Ordering::SeqCst, Ordering::Relaxed) {
1923 /// Ok(_) => break,
1924 /// Err(x) => old = x,
1925 /// }
1926 /// }
1927 /// ```
1928 ///
1929 /// # Considerations
1930 ///
1931 /// `compare_exchange` is a [compare-and-swap operation] and thus exhibits the usual downsides
1932 /// of CAS operations. In particular, a load of the value followed by a successful
1933 /// `compare_exchange` with the previous load *does not ensure* that other threads have not
1934 /// changed the value in the interim. This is usually important when the *equality* check in
1935 /// the `compare_exchange` is being used to check the *identity* of a value, but equality
1936 /// does not necessarily imply identity. This is a particularly common case for pointers, as
1937 /// a pointer holding the same address does not imply that the same object exists at that
1938 /// address! In this case, `compare_exchange` can lead to the [ABA problem].
1939 ///
1940 /// [ABA Problem]: https://en.wikipedia.org/wiki/ABA_problem
1941 /// [compare-and-swap operation]: https://en.wikipedia.org/wiki/Compare-and-swap
1942 #[inline]
1943 #[stable(feature = "extended_compare_and_swap", since = "1.10.0")]
1944 #[cfg(target_has_atomic = "ptr")]
1945 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
1946 pub fn compare_exchange_weak(
1947 &self,
1948 current: *mut T,
1949 new: *mut T,
1950 success: Ordering,
1951 failure: Ordering,
1952 ) -> Result<*mut T, *mut T> {
1953 // SAFETY: This intrinsic is unsafe because it operates on a raw pointer
1954 // but we know for sure that the pointer is valid (we just got it from
1955 // an `UnsafeCell` that we have by reference) and the atomic operation
1956 // itself allows us to safely mutate the `UnsafeCell` contents.
1957 unsafe { atomic_compare_exchange_weak(self.p.get(), current, new, success, failure) }
1958 }
1959
1960 /// Fetches the value, and applies a function to it that returns an optional
1961 /// new value. Returns a `Result` of `Ok(previous_value)` if the function
1962 /// returned `Some(_)`, else `Err(previous_value)`.
1963 ///
1964 /// Note: This may call the function multiple times if the value has been
1965 /// changed from other threads in the meantime, as long as the function
1966 /// returns `Some(_)`, but the function will have been applied only once to
1967 /// the stored value.
1968 ///
1969 /// `fetch_update` takes two [`Ordering`] arguments to describe the memory
1970 /// ordering of this operation. The first describes the required ordering for
1971 /// when the operation finally succeeds while the second describes the
1972 /// required ordering for loads. These correspond to the success and failure
1973 /// orderings of [`AtomicPtr::compare_exchange`] respectively.
1974 ///
1975 /// Using [`Acquire`] as success ordering makes the store part of this
1976 /// operation [`Relaxed`], and using [`Release`] makes the final successful
1977 /// load [`Relaxed`]. The (failed) load ordering can only be [`SeqCst`],
1978 /// [`Acquire`] or [`Relaxed`].
1979 ///
1980 /// **Note:** This method is only available on platforms that support atomic
1981 /// operations on pointers.
1982 ///
1983 /// # Considerations
1984 ///
1985 /// This method is not magic; it is not provided by the hardware, and does not act like a
1986 /// critical section or mutex.
1987 ///
1988 /// It is implemented on top of an atomic [compare-and-swap operation], and thus is subject to
1989 /// the usual drawbacks of CAS operations. In particular, be careful of the [ABA problem],
1990 /// which is a particularly common pitfall for pointers!
1991 ///
1992 /// [ABA Problem]: https://en.wikipedia.org/wiki/ABA_problem
1993 /// [compare-and-swap operation]: https://en.wikipedia.org/wiki/Compare-and-swap
1994 ///
1995 /// # Examples
1996 ///
1997 /// ```rust
1998 /// use std::sync::atomic::{AtomicPtr, Ordering};
1999 ///
2000 /// let ptr: *mut _ = &mut 5;
2001 /// let some_ptr = AtomicPtr::new(ptr);
2002 ///
2003 /// let new: *mut _ = &mut 10;
2004 /// assert_eq!(some_ptr.fetch_update(Ordering::SeqCst, Ordering::SeqCst, |_| None), Err(ptr));
2005 /// let result = some_ptr.fetch_update(Ordering::SeqCst, Ordering::SeqCst, |x| {
2006 /// if x == ptr {
2007 /// Some(new)
2008 /// } else {
2009 /// None
2010 /// }
2011 /// });
2012 /// assert_eq!(result, Ok(ptr));
2013 /// assert_eq!(some_ptr.load(Ordering::SeqCst), new);
2014 /// ```
2015 #[inline]
2016 #[stable(feature = "atomic_fetch_update", since = "1.53.0")]
2017 #[cfg(target_has_atomic = "ptr")]
2018 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
2019 pub fn fetch_update<F>(
2020 &self,
2021 set_order: Ordering,
2022 fetch_order: Ordering,
2023 mut f: F,
2024 ) -> Result<*mut T, *mut T>
2025 where
2026 F: FnMut(*mut T) -> Option<*mut T>,
2027 {
2028 let mut prev = self.load(fetch_order);
2029 while let Some(next) = f(prev) {
2030 match self.compare_exchange_weak(prev, next, set_order, fetch_order) {
2031 x @ Ok(_) => return x,
2032 Err(next_prev) => prev = next_prev,
2033 }
2034 }
2035 Err(prev)
2036 }
2037 /// Fetches the value, and applies a function to it that returns an optional
2038 /// new value. Returns a `Result` of `Ok(previous_value)` if the function
2039 /// returned `Some(_)`, else `Err(previous_value)`.
2040 ///
2041 /// See also: [`update`](`AtomicPtr::update`).
2042 ///
2043 /// Note: This may call the function multiple times if the value has been
2044 /// changed from other threads in the meantime, as long as the function
2045 /// returns `Some(_)`, but the function will have been applied only once to
2046 /// the stored value.
2047 ///
2048 /// `try_update` takes two [`Ordering`] arguments to describe the memory
2049 /// ordering of this operation. The first describes the required ordering for
2050 /// when the operation finally succeeds while the second describes the
2051 /// required ordering for loads. These correspond to the success and failure
2052 /// orderings of [`AtomicPtr::compare_exchange`] respectively.
2053 ///
2054 /// Using [`Acquire`] as success ordering makes the store part of this
2055 /// operation [`Relaxed`], and using [`Release`] makes the final successful
2056 /// load [`Relaxed`]. The (failed) load ordering can only be [`SeqCst`],
2057 /// [`Acquire`] or [`Relaxed`].
2058 ///
2059 /// **Note:** This method is only available on platforms that support atomic
2060 /// operations on pointers.
2061 ///
2062 /// # Considerations
2063 ///
2064 /// This method is not magic; it is not provided by the hardware, and does not act like a
2065 /// critical section or mutex.
2066 ///
2067 /// It is implemented on top of an atomic [compare-and-swap operation], and thus is subject to
2068 /// the usual drawbacks of CAS operations. In particular, be careful of the [ABA problem],
2069 /// which is a particularly common pitfall for pointers!
2070 ///
2071 /// [ABA Problem]: https://en.wikipedia.org/wiki/ABA_problem
2072 /// [compare-and-swap operation]: https://en.wikipedia.org/wiki/Compare-and-swap
2073 ///
2074 /// # Examples
2075 ///
2076 /// ```rust
2077 /// #![feature(atomic_try_update)]
2078 /// use std::sync::atomic::{AtomicPtr, Ordering};
2079 ///
2080 /// let ptr: *mut _ = &mut 5;
2081 /// let some_ptr = AtomicPtr::new(ptr);
2082 ///
2083 /// let new: *mut _ = &mut 10;
2084 /// assert_eq!(some_ptr.try_update(Ordering::SeqCst, Ordering::SeqCst, |_| None), Err(ptr));
2085 /// let result = some_ptr.try_update(Ordering::SeqCst, Ordering::SeqCst, |x| {
2086 /// if x == ptr {
2087 /// Some(new)
2088 /// } else {
2089 /// None
2090 /// }
2091 /// });
2092 /// assert_eq!(result, Ok(ptr));
2093 /// assert_eq!(some_ptr.load(Ordering::SeqCst), new);
2094 /// ```
2095 #[inline]
2096 #[unstable(feature = "atomic_try_update", issue = "135894")]
2097 #[cfg(target_has_atomic = "ptr")]
2098 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
2099 pub fn try_update(
2100 &self,
2101 set_order: Ordering,
2102 fetch_order: Ordering,
2103 f: impl FnMut(*mut T) -> Option<*mut T>,
2104 ) -> Result<*mut T, *mut T> {
2105 // FIXME(atomic_try_update): this is currently an unstable alias to `fetch_update`;
2106 // when stabilizing, turn `fetch_update` into a deprecated alias to `try_update`.
2107 self.fetch_update(set_order, fetch_order, f)
2108 }
2109
2110 /// Fetches the value, applies a function to it that it return a new value.
2111 /// The new value is stored and the old value is returned.
2112 ///
2113 /// See also: [`try_update`](`AtomicPtr::try_update`).
2114 ///
2115 /// Note: This may call the function multiple times if the value has been changed from other threads in
2116 /// the meantime, but the function will have been applied only once to the stored value.
2117 ///
2118 /// `update` takes two [`Ordering`] arguments to describe the memory
2119 /// ordering of this operation. The first describes the required ordering for
2120 /// when the operation finally succeeds while the second describes the
2121 /// required ordering for loads. These correspond to the success and failure
2122 /// orderings of [`AtomicPtr::compare_exchange`] respectively.
2123 ///
2124 /// Using [`Acquire`] as success ordering makes the store part
2125 /// of this operation [`Relaxed`], and using [`Release`] makes the final successful load
2126 /// [`Relaxed`]. The (failed) load ordering can only be [`SeqCst`], [`Acquire`] or [`Relaxed`].
2127 ///
2128 /// **Note:** This method is only available on platforms that support atomic
2129 /// operations on pointers.
2130 ///
2131 /// # Considerations
2132 ///
2133 /// This method is not magic; it is not provided by the hardware, and does not act like a
2134 /// critical section or mutex.
2135 ///
2136 /// It is implemented on top of an atomic [compare-and-swap operation], and thus is subject to
2137 /// the usual drawbacks of CAS operations. In particular, be careful of the [ABA problem],
2138 /// which is a particularly common pitfall for pointers!
2139 ///
2140 /// [ABA Problem]: https://en.wikipedia.org/wiki/ABA_problem
2141 /// [compare-and-swap operation]: https://en.wikipedia.org/wiki/Compare-and-swap
2142 ///
2143 /// # Examples
2144 ///
2145 /// ```rust
2146 /// #![feature(atomic_try_update)]
2147 ///
2148 /// use std::sync::atomic::{AtomicPtr, Ordering};
2149 ///
2150 /// let ptr: *mut _ = &mut 5;
2151 /// let some_ptr = AtomicPtr::new(ptr);
2152 ///
2153 /// let new: *mut _ = &mut 10;
2154 /// let result = some_ptr.update(Ordering::SeqCst, Ordering::SeqCst, |_| new);
2155 /// assert_eq!(result, ptr);
2156 /// assert_eq!(some_ptr.load(Ordering::SeqCst), new);
2157 /// ```
2158 #[inline]
2159 #[unstable(feature = "atomic_try_update", issue = "135894")]
2160 #[cfg(target_has_atomic = "8")]
2161 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
2162 pub fn update(
2163 &self,
2164 set_order: Ordering,
2165 fetch_order: Ordering,
2166 mut f: impl FnMut(*mut T) -> *mut T,
2167 ) -> *mut T {
2168 let mut prev = self.load(fetch_order);
2169 loop {
2170 match self.compare_exchange_weak(prev, f(prev), set_order, fetch_order) {
2171 Ok(x) => break x,
2172 Err(next_prev) => prev = next_prev,
2173 }
2174 }
2175 }
2176
2177 /// Offsets the pointer's address by adding `val` (in units of `T`),
2178 /// returning the previous pointer.
2179 ///
2180 /// This is equivalent to using [`wrapping_add`] to atomically perform the
2181 /// equivalent of `ptr = ptr.wrapping_add(val);`.
2182 ///
2183 /// This method operates in units of `T`, which means that it cannot be used
2184 /// to offset the pointer by an amount which is not a multiple of
2185 /// `size_of::<T>()`. This can sometimes be inconvenient, as you may want to
2186 /// work with a deliberately misaligned pointer. In such cases, you may use
2187 /// the [`fetch_byte_add`](Self::fetch_byte_add) method instead.
2188 ///
2189 /// `fetch_ptr_add` takes an [`Ordering`] argument which describes the
2190 /// memory ordering of this operation. All ordering modes are possible. Note
2191 /// that using [`Acquire`] makes the store part of this operation
2192 /// [`Relaxed`], and using [`Release`] makes the load part [`Relaxed`].
2193 ///
2194 /// **Note**: This method is only available on platforms that support atomic
2195 /// operations on [`AtomicPtr`].
2196 ///
2197 /// [`wrapping_add`]: pointer::wrapping_add
2198 ///
2199 /// # Examples
2200 ///
2201 /// ```
2202 /// use core::sync::atomic::{AtomicPtr, Ordering};
2203 ///
2204 /// let atom = AtomicPtr::<i64>::new(core::ptr::null_mut());
2205 /// assert_eq!(atom.fetch_ptr_add(1, Ordering::Relaxed).addr(), 0);
2206 /// // Note: units of `size_of::<i64>()`.
2207 /// assert_eq!(atom.load(Ordering::Relaxed).addr(), 8);
2208 /// ```
2209 #[inline]
2210 #[cfg(target_has_atomic = "ptr")]
2211 #[stable(feature = "strict_provenance_atomic_ptr", since = "CURRENT_RUSTC_VERSION")]
2212 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
2213 pub fn fetch_ptr_add(&self, val: usize, order: Ordering) -> *mut T {
2214 self.fetch_byte_add(val.wrapping_mul(size_of::<T>()), order)
2215 }
2216
2217 /// Offsets the pointer's address by subtracting `val` (in units of `T`),
2218 /// returning the previous pointer.
2219 ///
2220 /// This is equivalent to using [`wrapping_sub`] to atomically perform the
2221 /// equivalent of `ptr = ptr.wrapping_sub(val);`.
2222 ///
2223 /// This method operates in units of `T`, which means that it cannot be used
2224 /// to offset the pointer by an amount which is not a multiple of
2225 /// `size_of::<T>()`. This can sometimes be inconvenient, as you may want to
2226 /// work with a deliberately misaligned pointer. In such cases, you may use
2227 /// the [`fetch_byte_sub`](Self::fetch_byte_sub) method instead.
2228 ///
2229 /// `fetch_ptr_sub` takes an [`Ordering`] argument which describes the memory
2230 /// ordering of this operation. All ordering modes are possible. Note that
2231 /// using [`Acquire`] makes the store part of this operation [`Relaxed`],
2232 /// and using [`Release`] makes the load part [`Relaxed`].
2233 ///
2234 /// **Note**: This method is only available on platforms that support atomic
2235 /// operations on [`AtomicPtr`].
2236 ///
2237 /// [`wrapping_sub`]: pointer::wrapping_sub
2238 ///
2239 /// # Examples
2240 ///
2241 /// ```
2242 /// use core::sync::atomic::{AtomicPtr, Ordering};
2243 ///
2244 /// let array = [1i32, 2i32];
2245 /// let atom = AtomicPtr::new(array.as_ptr().wrapping_add(1) as *mut _);
2246 ///
2247 /// assert!(core::ptr::eq(
2248 /// atom.fetch_ptr_sub(1, Ordering::Relaxed),
2249 /// &array[1],
2250 /// ));
2251 /// assert!(core::ptr::eq(atom.load(Ordering::Relaxed), &array[0]));
2252 /// ```
2253 #[inline]
2254 #[cfg(target_has_atomic = "ptr")]
2255 #[stable(feature = "strict_provenance_atomic_ptr", since = "CURRENT_RUSTC_VERSION")]
2256 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
2257 pub fn fetch_ptr_sub(&self, val: usize, order: Ordering) -> *mut T {
2258 self.fetch_byte_sub(val.wrapping_mul(size_of::<T>()), order)
2259 }
2260
2261 /// Offsets the pointer's address by adding `val` *bytes*, returning the
2262 /// previous pointer.
2263 ///
2264 /// This is equivalent to using [`wrapping_byte_add`] to atomically
2265 /// perform `ptr = ptr.wrapping_byte_add(val)`.
2266 ///
2267 /// `fetch_byte_add` takes an [`Ordering`] argument which describes the
2268 /// memory ordering of this operation. All ordering modes are possible. Note
2269 /// that using [`Acquire`] makes the store part of this operation
2270 /// [`Relaxed`], and using [`Release`] makes the load part [`Relaxed`].
2271 ///
2272 /// **Note**: This method is only available on platforms that support atomic
2273 /// operations on [`AtomicPtr`].
2274 ///
2275 /// [`wrapping_byte_add`]: pointer::wrapping_byte_add
2276 ///
2277 /// # Examples
2278 ///
2279 /// ```
2280 /// use core::sync::atomic::{AtomicPtr, Ordering};
2281 ///
2282 /// let atom = AtomicPtr::<i64>::new(core::ptr::null_mut());
2283 /// assert_eq!(atom.fetch_byte_add(1, Ordering::Relaxed).addr(), 0);
2284 /// // Note: in units of bytes, not `size_of::<i64>()`.
2285 /// assert_eq!(atom.load(Ordering::Relaxed).addr(), 1);
2286 /// ```
2287 #[inline]
2288 #[cfg(target_has_atomic = "ptr")]
2289 #[stable(feature = "strict_provenance_atomic_ptr", since = "CURRENT_RUSTC_VERSION")]
2290 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
2291 pub fn fetch_byte_add(&self, val: usize, order: Ordering) -> *mut T {
2292 // SAFETY: data races are prevented by atomic intrinsics.
2293 unsafe { atomic_add(self.p.get(), val, order).cast() }
2294 }
2295
2296 /// Offsets the pointer's address by subtracting `val` *bytes*, returning the
2297 /// previous pointer.
2298 ///
2299 /// This is equivalent to using [`wrapping_byte_sub`] to atomically
2300 /// perform `ptr = ptr.wrapping_byte_sub(val)`.
2301 ///
2302 /// `fetch_byte_sub` takes an [`Ordering`] argument which describes the
2303 /// memory ordering of this operation. All ordering modes are possible. Note
2304 /// that using [`Acquire`] makes the store part of this operation
2305 /// [`Relaxed`], and using [`Release`] makes the load part [`Relaxed`].
2306 ///
2307 /// **Note**: This method is only available on platforms that support atomic
2308 /// operations on [`AtomicPtr`].
2309 ///
2310 /// [`wrapping_byte_sub`]: pointer::wrapping_byte_sub
2311 ///
2312 /// # Examples
2313 ///
2314 /// ```
2315 /// use core::sync::atomic::{AtomicPtr, Ordering};
2316 ///
2317 /// let mut arr = [0i64, 1];
2318 /// let atom = AtomicPtr::<i64>::new(&raw mut arr[1]);
2319 /// assert_eq!(atom.fetch_byte_sub(8, Ordering::Relaxed).addr(), (&raw const arr[1]).addr());
2320 /// assert_eq!(atom.load(Ordering::Relaxed).addr(), (&raw const arr[0]).addr());
2321 /// ```
2322 #[inline]
2323 #[cfg(target_has_atomic = "ptr")]
2324 #[stable(feature = "strict_provenance_atomic_ptr", since = "CURRENT_RUSTC_VERSION")]
2325 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
2326 pub fn fetch_byte_sub(&self, val: usize, order: Ordering) -> *mut T {
2327 // SAFETY: data races are prevented by atomic intrinsics.
2328 unsafe { atomic_sub(self.p.get(), val, order).cast() }
2329 }
2330
2331 /// Performs a bitwise "or" operation on the address of the current pointer,
2332 /// and the argument `val`, and stores a pointer with provenance of the
2333 /// current pointer and the resulting address.
2334 ///
2335 /// This is equivalent to using [`map_addr`] to atomically perform
2336 /// `ptr = ptr.map_addr(|a| a | val)`. This can be used in tagged
2337 /// pointer schemes to atomically set tag bits.
2338 ///
2339 /// **Caveat**: This operation returns the previous value. To compute the
2340 /// stored value without losing provenance, you may use [`map_addr`]. For
2341 /// example: `a.fetch_or(val).map_addr(|a| a | val)`.
2342 ///
2343 /// `fetch_or` takes an [`Ordering`] argument which describes the memory
2344 /// ordering of this operation. All ordering modes are possible. Note that
2345 /// using [`Acquire`] makes the store part of this operation [`Relaxed`],
2346 /// and using [`Release`] makes the load part [`Relaxed`].
2347 ///
2348 /// **Note**: This method is only available on platforms that support atomic
2349 /// operations on [`AtomicPtr`].
2350 ///
2351 /// This API and its claimed semantics are part of the Strict Provenance
2352 /// experiment, see the [module documentation for `ptr`][crate::ptr] for
2353 /// details.
2354 ///
2355 /// [`map_addr`]: pointer::map_addr
2356 ///
2357 /// # Examples
2358 ///
2359 /// ```
2360 /// use core::sync::atomic::{AtomicPtr, Ordering};
2361 ///
2362 /// let pointer = &mut 3i64 as *mut i64;
2363 ///
2364 /// let atom = AtomicPtr::<i64>::new(pointer);
2365 /// // Tag the bottom bit of the pointer.
2366 /// assert_eq!(atom.fetch_or(1, Ordering::Relaxed).addr() & 1, 0);
2367 /// // Extract and untag.
2368 /// let tagged = atom.load(Ordering::Relaxed);
2369 /// assert_eq!(tagged.addr() & 1, 1);
2370 /// assert_eq!(tagged.map_addr(|p| p & !1), pointer);
2371 /// ```
2372 #[inline]
2373 #[cfg(target_has_atomic = "ptr")]
2374 #[stable(feature = "strict_provenance_atomic_ptr", since = "CURRENT_RUSTC_VERSION")]
2375 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
2376 pub fn fetch_or(&self, val: usize, order: Ordering) -> *mut T {
2377 // SAFETY: data races are prevented by atomic intrinsics.
2378 unsafe { atomic_or(self.p.get(), val, order).cast() }
2379 }
2380
2381 /// Performs a bitwise "and" operation on the address of the current
2382 /// pointer, and the argument `val`, and stores a pointer with provenance of
2383 /// the current pointer and the resulting address.
2384 ///
2385 /// This is equivalent to using [`map_addr`] to atomically perform
2386 /// `ptr = ptr.map_addr(|a| a & val)`. This can be used in tagged
2387 /// pointer schemes to atomically unset tag bits.
2388 ///
2389 /// **Caveat**: This operation returns the previous value. To compute the
2390 /// stored value without losing provenance, you may use [`map_addr`]. For
2391 /// example: `a.fetch_and(val).map_addr(|a| a & val)`.
2392 ///
2393 /// `fetch_and` takes an [`Ordering`] argument which describes the memory
2394 /// ordering of this operation. All ordering modes are possible. Note that
2395 /// using [`Acquire`] makes the store part of this operation [`Relaxed`],
2396 /// and using [`Release`] makes the load part [`Relaxed`].
2397 ///
2398 /// **Note**: This method is only available on platforms that support atomic
2399 /// operations on [`AtomicPtr`].
2400 ///
2401 /// This API and its claimed semantics are part of the Strict Provenance
2402 /// experiment, see the [module documentation for `ptr`][crate::ptr] for
2403 /// details.
2404 ///
2405 /// [`map_addr`]: pointer::map_addr
2406 ///
2407 /// # Examples
2408 ///
2409 /// ```
2410 /// use core::sync::atomic::{AtomicPtr, Ordering};
2411 ///
2412 /// let pointer = &mut 3i64 as *mut i64;
2413 /// // A tagged pointer
2414 /// let atom = AtomicPtr::<i64>::new(pointer.map_addr(|a| a | 1));
2415 /// assert_eq!(atom.fetch_or(1, Ordering::Relaxed).addr() & 1, 1);
2416 /// // Untag, and extract the previously tagged pointer.
2417 /// let untagged = atom.fetch_and(!1, Ordering::Relaxed)
2418 /// .map_addr(|a| a & !1);
2419 /// assert_eq!(untagged, pointer);
2420 /// ```
2421 #[inline]
2422 #[cfg(target_has_atomic = "ptr")]
2423 #[stable(feature = "strict_provenance_atomic_ptr", since = "CURRENT_RUSTC_VERSION")]
2424 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
2425 pub fn fetch_and(&self, val: usize, order: Ordering) -> *mut T {
2426 // SAFETY: data races are prevented by atomic intrinsics.
2427 unsafe { atomic_and(self.p.get(), val, order).cast() }
2428 }
2429
2430 /// Performs a bitwise "xor" operation on the address of the current
2431 /// pointer, and the argument `val`, and stores a pointer with provenance of
2432 /// the current pointer and the resulting address.
2433 ///
2434 /// This is equivalent to using [`map_addr`] to atomically perform
2435 /// `ptr = ptr.map_addr(|a| a ^ val)`. This can be used in tagged
2436 /// pointer schemes to atomically toggle tag bits.
2437 ///
2438 /// **Caveat**: This operation returns the previous value. To compute the
2439 /// stored value without losing provenance, you may use [`map_addr`]. For
2440 /// example: `a.fetch_xor(val).map_addr(|a| a ^ val)`.
2441 ///
2442 /// `fetch_xor` takes an [`Ordering`] argument which describes the memory
2443 /// ordering of this operation. All ordering modes are possible. Note that
2444 /// using [`Acquire`] makes the store part of this operation [`Relaxed`],
2445 /// and using [`Release`] makes the load part [`Relaxed`].
2446 ///
2447 /// **Note**: This method is only available on platforms that support atomic
2448 /// operations on [`AtomicPtr`].
2449 ///
2450 /// This API and its claimed semantics are part of the Strict Provenance
2451 /// experiment, see the [module documentation for `ptr`][crate::ptr] for
2452 /// details.
2453 ///
2454 /// [`map_addr`]: pointer::map_addr
2455 ///
2456 /// # Examples
2457 ///
2458 /// ```
2459 /// use core::sync::atomic::{AtomicPtr, Ordering};
2460 ///
2461 /// let pointer = &mut 3i64 as *mut i64;
2462 /// let atom = AtomicPtr::<i64>::new(pointer);
2463 ///
2464 /// // Toggle a tag bit on the pointer.
2465 /// atom.fetch_xor(1, Ordering::Relaxed);
2466 /// assert_eq!(atom.load(Ordering::Relaxed).addr() & 1, 1);
2467 /// ```
2468 #[inline]
2469 #[cfg(target_has_atomic = "ptr")]
2470 #[stable(feature = "strict_provenance_atomic_ptr", since = "CURRENT_RUSTC_VERSION")]
2471 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
2472 pub fn fetch_xor(&self, val: usize, order: Ordering) -> *mut T {
2473 // SAFETY: data races are prevented by atomic intrinsics.
2474 unsafe { atomic_xor(self.p.get(), val, order).cast() }
2475 }
2476
2477 /// Returns a mutable pointer to the underlying pointer.
2478 ///
2479 /// Doing non-atomic reads and writes on the resulting pointer can be a data race.
2480 /// This method is mostly useful for FFI, where the function signature may use
2481 /// `*mut *mut T` instead of `&AtomicPtr<T>`.
2482 ///
2483 /// Returning an `*mut` pointer from a shared reference to this atomic is safe because the
2484 /// atomic types work with interior mutability. All modifications of an atomic change the value
2485 /// through a shared reference, and can do so safely as long as they use atomic operations. Any
2486 /// use of the returned raw pointer requires an `unsafe` block and still has to uphold the
2487 /// requirements of the [memory model].
2488 ///
2489 /// # Examples
2490 ///
2491 /// ```ignore (extern-declaration)
2492 /// use std::sync::atomic::AtomicPtr;
2493 ///
2494 /// extern "C" {
2495 /// fn my_atomic_op(arg: *mut *mut u32);
2496 /// }
2497 ///
2498 /// let mut value = 17;
2499 /// let atomic = AtomicPtr::new(&mut value);
2500 ///
2501 /// // SAFETY: Safe as long as `my_atomic_op` is atomic.
2502 /// unsafe {
2503 /// my_atomic_op(atomic.as_ptr());
2504 /// }
2505 /// ```
2506 ///
2507 /// [memory model]: self#memory-model-for-atomic-accesses
2508 #[inline]
2509 #[stable(feature = "atomic_as_ptr", since = "1.70.0")]
2510 #[rustc_const_stable(feature = "atomic_as_ptr", since = "1.70.0")]
2511 #[rustc_never_returns_null_ptr]
2512 pub const fn as_ptr(&self) -> *mut *mut T {
2513 self.p.get()
2514 }
2515}
2516
2517#[cfg(target_has_atomic_load_store = "8")]
2518#[stable(feature = "atomic_bool_from", since = "1.24.0")]
2519#[rustc_const_unstable(feature = "const_try", issue = "74935")]
2520impl const From<bool> for AtomicBool {
2521 /// Converts a `bool` into an `AtomicBool`.
2522 ///
2523 /// # Examples
2524 ///
2525 /// ```
2526 /// use std::sync::atomic::AtomicBool;
2527 /// let atomic_bool = AtomicBool::from(true);
2528 /// assert_eq!(format!("{atomic_bool:?}"), "true")
2529 /// ```
2530 #[inline]
2531 fn from(b: bool) -> Self {
2532 Self::new(b)
2533 }
2534}
2535
2536#[cfg(target_has_atomic_load_store = "ptr")]
2537#[stable(feature = "atomic_from", since = "1.23.0")]
2538impl<T> From<*mut T> for AtomicPtr<T> {
2539 /// Converts a `*mut T` into an `AtomicPtr<T>`.
2540 #[inline]
2541 fn from(p: *mut T) -> Self {
2542 Self::new(p)
2543 }
2544}
2545
2546#[allow(unused_macros)] // This macro ends up being unused on some architectures.
2547macro_rules! if_8_bit {
2548 (u8, $( yes = [$($yes:tt)*], )? $( no = [$($no:tt)*], )? ) => { concat!("", $($($yes)*)?) };
2549 (i8, $( yes = [$($yes:tt)*], )? $( no = [$($no:tt)*], )? ) => { concat!("", $($($yes)*)?) };
2550 ($_:ident, $( yes = [$($yes:tt)*], )? $( no = [$($no:tt)*], )? ) => { concat!("", $($($no)*)?) };
2551}
2552
2553#[cfg(target_has_atomic_load_store)]
2554macro_rules! atomic_int {
2555 ($cfg_cas:meta,
2556 $cfg_align:meta,
2557 $stable:meta,
2558 $stable_cxchg:meta,
2559 $stable_debug:meta,
2560 $stable_access:meta,
2561 $stable_from:meta,
2562 $stable_nand:meta,
2563 $const_stable_new:meta,
2564 $const_stable_into_inner:meta,
2565 $diagnostic_item:meta,
2566 $s_int_type:literal,
2567 $extra_feature:expr,
2568 $min_fn:ident, $max_fn:ident,
2569 $align:expr,
2570 $int_type:ident $atomic_type:ident) => {
2571 /// An integer type which can be safely shared between threads.
2572 ///
2573 /// This type has the same
2574 #[doc = if_8_bit!(
2575 $int_type,
2576 yes = ["size, alignment, and bit validity"],
2577 no = ["size and bit validity"],
2578 )]
2579 /// as the underlying integer type, [`
2580 #[doc = $s_int_type]
2581 /// `].
2582 #[doc = if_8_bit! {
2583 $int_type,
2584 no = [
2585 "However, the alignment of this type is always equal to its ",
2586 "size, even on targets where [`", $s_int_type, "`] has a ",
2587 "lesser alignment."
2588 ],
2589 }]
2590 ///
2591 /// For more about the differences between atomic types and
2592 /// non-atomic types as well as information about the portability of
2593 /// this type, please see the [module-level documentation].
2594 ///
2595 /// **Note:** This type is only available on platforms that support
2596 /// atomic loads and stores of [`
2597 #[doc = $s_int_type]
2598 /// `].
2599 ///
2600 /// [module-level documentation]: crate::sync::atomic
2601 #[$stable]
2602 #[$diagnostic_item]
2603 #[repr(C, align($align))]
2604 pub struct $atomic_type {
2605 v: UnsafeCell<$int_type>,
2606 }
2607
2608 #[$stable]
2609 impl Default for $atomic_type {
2610 #[inline]
2611 fn default() -> Self {
2612 Self::new(Default::default())
2613 }
2614 }
2615
2616 #[$stable_from]
2617 #[rustc_const_unstable(feature = "const_try", issue = "74935")]
2618 impl const From<$int_type> for $atomic_type {
2619 #[doc = concat!("Converts an `", stringify!($int_type), "` into an `", stringify!($atomic_type), "`.")]
2620 #[inline]
2621 fn from(v: $int_type) -> Self { Self::new(v) }
2622 }
2623
2624 #[$stable_debug]
2625 impl fmt::Debug for $atomic_type {
2626 fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
2627 fmt::Debug::fmt(&self.load(Ordering::Relaxed), f)
2628 }
2629 }
2630
2631 // Send is implicitly implemented.
2632 #[$stable]
2633 unsafe impl Sync for $atomic_type {}
2634
2635 impl $atomic_type {
2636 /// Creates a new atomic integer.
2637 ///
2638 /// # Examples
2639 ///
2640 /// ```
2641 #[doc = concat!($extra_feature, "use std::sync::atomic::", stringify!($atomic_type), ";")]
2642 ///
2643 #[doc = concat!("let atomic_forty_two = ", stringify!($atomic_type), "::new(42);")]
2644 /// ```
2645 #[inline]
2646 #[$stable]
2647 #[$const_stable_new]
2648 #[must_use]
2649 pub const fn new(v: $int_type) -> Self {
2650 Self {v: UnsafeCell::new(v)}
2651 }
2652
2653 /// Creates a new reference to an atomic integer from a pointer.
2654 ///
2655 /// # Examples
2656 ///
2657 /// ```
2658 #[doc = concat!($extra_feature, "use std::sync::atomic::{self, ", stringify!($atomic_type), "};")]
2659 ///
2660 /// // Get a pointer to an allocated value
2661 #[doc = concat!("let ptr: *mut ", stringify!($int_type), " = Box::into_raw(Box::new(0));")]
2662 ///
2663 #[doc = concat!("assert!(ptr.cast::<", stringify!($atomic_type), ">().is_aligned());")]
2664 ///
2665 /// {
2666 /// // Create an atomic view of the allocated value
2667 // SAFETY: this is a doc comment, tidy, it can't hurt you (also guaranteed by the construction of `ptr` and the assert above)
2668 #[doc = concat!(" let atomic = unsafe {", stringify!($atomic_type), "::from_ptr(ptr) };")]
2669 ///
2670 /// // Use `atomic` for atomic operations, possibly share it with other threads
2671 /// atomic.store(1, atomic::Ordering::Relaxed);
2672 /// }
2673 ///
2674 /// // It's ok to non-atomically access the value behind `ptr`,
2675 /// // since the reference to the atomic ended its lifetime in the block above
2676 /// assert_eq!(unsafe { *ptr }, 1);
2677 ///
2678 /// // Deallocate the value
2679 /// unsafe { drop(Box::from_raw(ptr)) }
2680 /// ```
2681 ///
2682 /// # Safety
2683 ///
2684 /// * `ptr` must be aligned to
2685 #[doc = concat!(" `align_of::<", stringify!($atomic_type), ">()`")]
2686 #[doc = if_8_bit!{
2687 $int_type,
2688 yes = [
2689 " (note that this is always true, since `align_of::<",
2690 stringify!($atomic_type), ">() == 1`)."
2691 ],
2692 no = [
2693 " (note that on some platforms this can be bigger than `align_of::<",
2694 stringify!($int_type), ">()`)."
2695 ],
2696 }]
2697 /// * `ptr` must be [valid] for both reads and writes for the whole lifetime `'a`.
2698 /// * You must adhere to the [Memory model for atomic accesses]. In particular, it is not
2699 /// allowed to mix conflicting atomic and non-atomic accesses, or atomic accesses of different
2700 /// sizes, without synchronization.
2701 ///
2702 /// [valid]: crate::ptr#safety
2703 /// [Memory model for atomic accesses]: self#memory-model-for-atomic-accesses
2704 #[inline]
2705 #[stable(feature = "atomic_from_ptr", since = "1.75.0")]
2706 #[rustc_const_stable(feature = "const_atomic_from_ptr", since = "1.84.0")]
2707 pub const unsafe fn from_ptr<'a>(ptr: *mut $int_type) -> &'a $atomic_type {
2708 // SAFETY: guaranteed by the caller
2709 unsafe { &*ptr.cast() }
2710 }
2711
2712
2713 /// Returns a mutable reference to the underlying integer.
2714 ///
2715 /// This is safe because the mutable reference guarantees that no other threads are
2716 /// concurrently accessing the atomic data.
2717 ///
2718 /// # Examples
2719 ///
2720 /// ```
2721 #[doc = concat!($extra_feature, "use std::sync::atomic::{", stringify!($atomic_type), ", Ordering};")]
2722 ///
2723 #[doc = concat!("let mut some_var = ", stringify!($atomic_type), "::new(10);")]
2724 /// assert_eq!(*some_var.get_mut(), 10);
2725 /// *some_var.get_mut() = 5;
2726 /// assert_eq!(some_var.load(Ordering::SeqCst), 5);
2727 /// ```
2728 #[inline]
2729 #[$stable_access]
2730 pub fn get_mut(&mut self) -> &mut $int_type {
2731 self.v.get_mut()
2732 }
2733
2734 #[doc = concat!("Get atomic access to a `&mut ", stringify!($int_type), "`.")]
2735 ///
2736 #[doc = if_8_bit! {
2737 $int_type,
2738 no = [
2739 "**Note:** This function is only available on targets where `",
2740 stringify!($atomic_type), "` has the same alignment as `", stringify!($int_type), "`."
2741 ],
2742 }]
2743 ///
2744 /// # Examples
2745 ///
2746 /// ```
2747 /// #![feature(atomic_from_mut)]
2748 #[doc = concat!($extra_feature, "use std::sync::atomic::{", stringify!($atomic_type), ", Ordering};")]
2749 ///
2750 /// let mut some_int = 123;
2751 #[doc = concat!("let a = ", stringify!($atomic_type), "::from_mut(&mut some_int);")]
2752 /// a.store(100, Ordering::Relaxed);
2753 /// assert_eq!(some_int, 100);
2754 /// ```
2755 ///
2756 #[inline]
2757 #[$cfg_align]
2758 #[unstable(feature = "atomic_from_mut", issue = "76314")]
2759 pub fn from_mut(v: &mut $int_type) -> &mut Self {
2760 let [] = [(); align_of::<Self>() - align_of::<$int_type>()];
2761 // SAFETY:
2762 // - the mutable reference guarantees unique ownership.
2763 // - the alignment of `$int_type` and `Self` is the
2764 // same, as promised by $cfg_align and verified above.
2765 unsafe { &mut *(v as *mut $int_type as *mut Self) }
2766 }
2767
2768 #[doc = concat!("Get non-atomic access to a `&mut [", stringify!($atomic_type), "]` slice")]
2769 ///
2770 /// This is safe because the mutable reference guarantees that no other threads are
2771 /// concurrently accessing the atomic data.
2772 ///
2773 /// # Examples
2774 ///
2775 /// ```ignore-wasm
2776 /// #![feature(atomic_from_mut)]
2777 #[doc = concat!($extra_feature, "use std::sync::atomic::{", stringify!($atomic_type), ", Ordering};")]
2778 ///
2779 #[doc = concat!("let mut some_ints = [const { ", stringify!($atomic_type), "::new(0) }; 10];")]
2780 ///
2781 #[doc = concat!("let view: &mut [", stringify!($int_type), "] = ", stringify!($atomic_type), "::get_mut_slice(&mut some_ints);")]
2782 /// assert_eq!(view, [0; 10]);
2783 /// view
2784 /// .iter_mut()
2785 /// .enumerate()
2786 /// .for_each(|(idx, int)| *int = idx as _);
2787 ///
2788 /// std::thread::scope(|s| {
2789 /// some_ints
2790 /// .iter()
2791 /// .enumerate()
2792 /// .for_each(|(idx, int)| {
2793 /// s.spawn(move || assert_eq!(int.load(Ordering::Relaxed), idx as _));
2794 /// })
2795 /// });
2796 /// ```
2797 #[inline]
2798 #[unstable(feature = "atomic_from_mut", issue = "76314")]
2799 pub fn get_mut_slice(this: &mut [Self]) -> &mut [$int_type] {
2800 // SAFETY: the mutable reference guarantees unique ownership.
2801 unsafe { &mut *(this as *mut [Self] as *mut [$int_type]) }
2802 }
2803
2804 #[doc = concat!("Get atomic access to a `&mut [", stringify!($int_type), "]` slice.")]
2805 ///
2806 /// # Examples
2807 ///
2808 /// ```ignore-wasm
2809 /// #![feature(atomic_from_mut)]
2810 #[doc = concat!($extra_feature, "use std::sync::atomic::{", stringify!($atomic_type), ", Ordering};")]
2811 ///
2812 /// let mut some_ints = [0; 10];
2813 #[doc = concat!("let a = &*", stringify!($atomic_type), "::from_mut_slice(&mut some_ints);")]
2814 /// std::thread::scope(|s| {
2815 /// for i in 0..a.len() {
2816 /// s.spawn(move || a[i].store(i as _, Ordering::Relaxed));
2817 /// }
2818 /// });
2819 /// for (i, n) in some_ints.into_iter().enumerate() {
2820 /// assert_eq!(i, n as usize);
2821 /// }
2822 /// ```
2823 #[inline]
2824 #[$cfg_align]
2825 #[unstable(feature = "atomic_from_mut", issue = "76314")]
2826 pub fn from_mut_slice(v: &mut [$int_type]) -> &mut [Self] {
2827 let [] = [(); align_of::<Self>() - align_of::<$int_type>()];
2828 // SAFETY:
2829 // - the mutable reference guarantees unique ownership.
2830 // - the alignment of `$int_type` and `Self` is the
2831 // same, as promised by $cfg_align and verified above.
2832 unsafe { &mut *(v as *mut [$int_type] as *mut [Self]) }
2833 }
2834
2835 /// Consumes the atomic and returns the contained value.
2836 ///
2837 /// This is safe because passing `self` by value guarantees that no other threads are
2838 /// concurrently accessing the atomic data.
2839 ///
2840 /// # Examples
2841 ///
2842 /// ```
2843 #[doc = concat!($extra_feature, "use std::sync::atomic::", stringify!($atomic_type), ";")]
2844 ///
2845 #[doc = concat!("let some_var = ", stringify!($atomic_type), "::new(5);")]
2846 /// assert_eq!(some_var.into_inner(), 5);
2847 /// ```
2848 #[inline]
2849 #[$stable_access]
2850 #[$const_stable_into_inner]
2851 pub const fn into_inner(self) -> $int_type {
2852 self.v.into_inner()
2853 }
2854
2855 /// Loads a value from the atomic integer.
2856 ///
2857 /// `load` takes an [`Ordering`] argument which describes the memory ordering of this operation.
2858 /// Possible values are [`SeqCst`], [`Acquire`] and [`Relaxed`].
2859 ///
2860 /// # Panics
2861 ///
2862 /// Panics if `order` is [`Release`] or [`AcqRel`].
2863 ///
2864 /// # Examples
2865 ///
2866 /// ```
2867 #[doc = concat!($extra_feature, "use std::sync::atomic::{", stringify!($atomic_type), ", Ordering};")]
2868 ///
2869 #[doc = concat!("let some_var = ", stringify!($atomic_type), "::new(5);")]
2870 ///
2871 /// assert_eq!(some_var.load(Ordering::Relaxed), 5);
2872 /// ```
2873 #[inline]
2874 #[$stable]
2875 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
2876 pub fn load(&self, order: Ordering) -> $int_type {
2877 // SAFETY: data races are prevented by atomic intrinsics.
2878 unsafe { atomic_load(self.v.get(), order) }
2879 }
2880
2881 /// Stores a value into the atomic integer.
2882 ///
2883 /// `store` takes an [`Ordering`] argument which describes the memory ordering of this operation.
2884 /// Possible values are [`SeqCst`], [`Release`] and [`Relaxed`].
2885 ///
2886 /// # Panics
2887 ///
2888 /// Panics if `order` is [`Acquire`] or [`AcqRel`].
2889 ///
2890 /// # Examples
2891 ///
2892 /// ```
2893 #[doc = concat!($extra_feature, "use std::sync::atomic::{", stringify!($atomic_type), ", Ordering};")]
2894 ///
2895 #[doc = concat!("let some_var = ", stringify!($atomic_type), "::new(5);")]
2896 ///
2897 /// some_var.store(10, Ordering::Relaxed);
2898 /// assert_eq!(some_var.load(Ordering::Relaxed), 10);
2899 /// ```
2900 #[inline]
2901 #[$stable]
2902 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
2903 pub fn store(&self, val: $int_type, order: Ordering) {
2904 // SAFETY: data races are prevented by atomic intrinsics.
2905 unsafe { atomic_store(self.v.get(), val, order); }
2906 }
2907
2908 /// Stores a value into the atomic integer, returning the previous value.
2909 ///
2910 /// `swap` takes an [`Ordering`] argument which describes the memory ordering
2911 /// of this operation. All ordering modes are possible. Note that using
2912 /// [`Acquire`] makes the store part of this operation [`Relaxed`], and
2913 /// using [`Release`] makes the load part [`Relaxed`].
2914 ///
2915 /// **Note**: This method is only available on platforms that support atomic operations on
2916 #[doc = concat!("[`", $s_int_type, "`].")]
2917 ///
2918 /// # Examples
2919 ///
2920 /// ```
2921 #[doc = concat!($extra_feature, "use std::sync::atomic::{", stringify!($atomic_type), ", Ordering};")]
2922 ///
2923 #[doc = concat!("let some_var = ", stringify!($atomic_type), "::new(5);")]
2924 ///
2925 /// assert_eq!(some_var.swap(10, Ordering::Relaxed), 5);
2926 /// ```
2927 #[inline]
2928 #[$stable]
2929 #[$cfg_cas]
2930 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
2931 pub fn swap(&self, val: $int_type, order: Ordering) -> $int_type {
2932 // SAFETY: data races are prevented by atomic intrinsics.
2933 unsafe { atomic_swap(self.v.get(), val, order) }
2934 }
2935
2936 /// Stores a value into the atomic integer if the current value is the same as
2937 /// the `current` value.
2938 ///
2939 /// The return value is always the previous value. If it is equal to `current`, then the
2940 /// value was updated.
2941 ///
2942 /// `compare_and_swap` also takes an [`Ordering`] argument which describes the memory
2943 /// ordering of this operation. Notice that even when using [`AcqRel`], the operation
2944 /// might fail and hence just perform an `Acquire` load, but not have `Release` semantics.
2945 /// Using [`Acquire`] makes the store part of this operation [`Relaxed`] if it
2946 /// happens, and using [`Release`] makes the load part [`Relaxed`].
2947 ///
2948 /// **Note**: This method is only available on platforms that support atomic operations on
2949 #[doc = concat!("[`", $s_int_type, "`].")]
2950 ///
2951 /// # Migrating to `compare_exchange` and `compare_exchange_weak`
2952 ///
2953 /// `compare_and_swap` is equivalent to `compare_exchange` with the following mapping for
2954 /// memory orderings:
2955 ///
2956 /// Original | Success | Failure
2957 /// -------- | ------- | -------
2958 /// Relaxed | Relaxed | Relaxed
2959 /// Acquire | Acquire | Acquire
2960 /// Release | Release | Relaxed
2961 /// AcqRel | AcqRel | Acquire
2962 /// SeqCst | SeqCst | SeqCst
2963 ///
2964 /// `compare_and_swap` and `compare_exchange` also differ in their return type. You can use
2965 /// `compare_exchange(...).unwrap_or_else(|x| x)` to recover the behavior of `compare_and_swap`,
2966 /// but in most cases it is more idiomatic to check whether the return value is `Ok` or `Err`
2967 /// rather than to infer success vs failure based on the value that was read.
2968 ///
2969 /// During migration, consider whether it makes sense to use `compare_exchange_weak` instead.
2970 /// `compare_exchange_weak` is allowed to fail spuriously even when the comparison succeeds,
2971 /// which allows the compiler to generate better assembly code when the compare and swap
2972 /// is used in a loop.
2973 ///
2974 /// # Examples
2975 ///
2976 /// ```
2977 #[doc = concat!($extra_feature, "use std::sync::atomic::{", stringify!($atomic_type), ", Ordering};")]
2978 ///
2979 #[doc = concat!("let some_var = ", stringify!($atomic_type), "::new(5);")]
2980 ///
2981 /// assert_eq!(some_var.compare_and_swap(5, 10, Ordering::Relaxed), 5);
2982 /// assert_eq!(some_var.load(Ordering::Relaxed), 10);
2983 ///
2984 /// assert_eq!(some_var.compare_and_swap(6, 12, Ordering::Relaxed), 10);
2985 /// assert_eq!(some_var.load(Ordering::Relaxed), 10);
2986 /// ```
2987 #[inline]
2988 #[$stable]
2989 #[deprecated(
2990 since = "1.50.0",
2991 note = "Use `compare_exchange` or `compare_exchange_weak` instead")
2992 ]
2993 #[$cfg_cas]
2994 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
2995 pub fn compare_and_swap(&self,
2996 current: $int_type,
2997 new: $int_type,
2998 order: Ordering) -> $int_type {
2999 match self.compare_exchange(current,
3000 new,
3001 order,
3002 strongest_failure_ordering(order)) {
3003 Ok(x) => x,
3004 Err(x) => x,
3005 }
3006 }
3007
3008 /// Stores a value into the atomic integer if the current value is the same as
3009 /// the `current` value.
3010 ///
3011 /// The return value is a result indicating whether the new value was written and
3012 /// containing the previous value. On success this value is guaranteed to be equal to
3013 /// `current`.
3014 ///
3015 /// `compare_exchange` takes two [`Ordering`] arguments to describe the memory
3016 /// ordering of this operation. `success` describes the required ordering for the
3017 /// read-modify-write operation that takes place if the comparison with `current` succeeds.
3018 /// `failure` describes the required ordering for the load operation that takes place when
3019 /// the comparison fails. Using [`Acquire`] as success ordering makes the store part
3020 /// of this operation [`Relaxed`], and using [`Release`] makes the successful load
3021 /// [`Relaxed`]. The failure ordering can only be [`SeqCst`], [`Acquire`] or [`Relaxed`].
3022 ///
3023 /// **Note**: This method is only available on platforms that support atomic operations on
3024 #[doc = concat!("[`", $s_int_type, "`].")]
3025 ///
3026 /// # Examples
3027 ///
3028 /// ```
3029 #[doc = concat!($extra_feature, "use std::sync::atomic::{", stringify!($atomic_type), ", Ordering};")]
3030 ///
3031 #[doc = concat!("let some_var = ", stringify!($atomic_type), "::new(5);")]
3032 ///
3033 /// assert_eq!(some_var.compare_exchange(5, 10,
3034 /// Ordering::Acquire,
3035 /// Ordering::Relaxed),
3036 /// Ok(5));
3037 /// assert_eq!(some_var.load(Ordering::Relaxed), 10);
3038 ///
3039 /// assert_eq!(some_var.compare_exchange(6, 12,
3040 /// Ordering::SeqCst,
3041 /// Ordering::Acquire),
3042 /// Err(10));
3043 /// assert_eq!(some_var.load(Ordering::Relaxed), 10);
3044 /// ```
3045 ///
3046 /// # Considerations
3047 ///
3048 /// `compare_exchange` is a [compare-and-swap operation] and thus exhibits the usual downsides
3049 /// of CAS operations. In particular, a load of the value followed by a successful
3050 /// `compare_exchange` with the previous load *does not ensure* that other threads have not
3051 /// changed the value in the interim! This is usually important when the *equality* check in
3052 /// the `compare_exchange` is being used to check the *identity* of a value, but equality
3053 /// does not necessarily imply identity. This is a particularly common case for pointers, as
3054 /// a pointer holding the same address does not imply that the same object exists at that
3055 /// address! In this case, `compare_exchange` can lead to the [ABA problem].
3056 ///
3057 /// [ABA Problem]: https://en.wikipedia.org/wiki/ABA_problem
3058 /// [compare-and-swap operation]: https://en.wikipedia.org/wiki/Compare-and-swap
3059 #[inline]
3060 #[$stable_cxchg]
3061 #[$cfg_cas]
3062 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
3063 pub fn compare_exchange(&self,
3064 current: $int_type,
3065 new: $int_type,
3066 success: Ordering,
3067 failure: Ordering) -> Result<$int_type, $int_type> {
3068 // SAFETY: data races are prevented by atomic intrinsics.
3069 unsafe { atomic_compare_exchange(self.v.get(), current, new, success, failure) }
3070 }
3071
3072 /// Stores a value into the atomic integer if the current value is the same as
3073 /// the `current` value.
3074 ///
3075 #[doc = concat!("Unlike [`", stringify!($atomic_type), "::compare_exchange`],")]
3076 /// this function is allowed to spuriously fail even
3077 /// when the comparison succeeds, which can result in more efficient code on some
3078 /// platforms. The return value is a result indicating whether the new value was
3079 /// written and containing the previous value.
3080 ///
3081 /// `compare_exchange_weak` takes two [`Ordering`] arguments to describe the memory
3082 /// ordering of this operation. `success` describes the required ordering for the
3083 /// read-modify-write operation that takes place if the comparison with `current` succeeds.
3084 /// `failure` describes the required ordering for the load operation that takes place when
3085 /// the comparison fails. Using [`Acquire`] as success ordering makes the store part
3086 /// of this operation [`Relaxed`], and using [`Release`] makes the successful load
3087 /// [`Relaxed`]. The failure ordering can only be [`SeqCst`], [`Acquire`] or [`Relaxed`].
3088 ///
3089 /// **Note**: This method is only available on platforms that support atomic operations on
3090 #[doc = concat!("[`", $s_int_type, "`].")]
3091 ///
3092 /// # Examples
3093 ///
3094 /// ```
3095 #[doc = concat!($extra_feature, "use std::sync::atomic::{", stringify!($atomic_type), ", Ordering};")]
3096 ///
3097 #[doc = concat!("let val = ", stringify!($atomic_type), "::new(4);")]
3098 ///
3099 /// let mut old = val.load(Ordering::Relaxed);
3100 /// loop {
3101 /// let new = old * 2;
3102 /// match val.compare_exchange_weak(old, new, Ordering::SeqCst, Ordering::Relaxed) {
3103 /// Ok(_) => break,
3104 /// Err(x) => old = x,
3105 /// }
3106 /// }
3107 /// ```
3108 ///
3109 /// # Considerations
3110 ///
3111 /// `compare_exchange` is a [compare-and-swap operation] and thus exhibits the usual downsides
3112 /// of CAS operations. In particular, a load of the value followed by a successful
3113 /// `compare_exchange` with the previous load *does not ensure* that other threads have not
3114 /// changed the value in the interim. This is usually important when the *equality* check in
3115 /// the `compare_exchange` is being used to check the *identity* of a value, but equality
3116 /// does not necessarily imply identity. This is a particularly common case for pointers, as
3117 /// a pointer holding the same address does not imply that the same object exists at that
3118 /// address! In this case, `compare_exchange` can lead to the [ABA problem].
3119 ///
3120 /// [ABA Problem]: https://en.wikipedia.org/wiki/ABA_problem
3121 /// [compare-and-swap operation]: https://en.wikipedia.org/wiki/Compare-and-swap
3122 #[inline]
3123 #[$stable_cxchg]
3124 #[$cfg_cas]
3125 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
3126 pub fn compare_exchange_weak(&self,
3127 current: $int_type,
3128 new: $int_type,
3129 success: Ordering,
3130 failure: Ordering) -> Result<$int_type, $int_type> {
3131 // SAFETY: data races are prevented by atomic intrinsics.
3132 unsafe {
3133 atomic_compare_exchange_weak(self.v.get(), current, new, success, failure)
3134 }
3135 }
3136
3137 /// Adds to the current value, returning the previous value.
3138 ///
3139 /// This operation wraps around on overflow.
3140 ///
3141 /// `fetch_add` takes an [`Ordering`] argument which describes the memory ordering
3142 /// of this operation. All ordering modes are possible. Note that using
3143 /// [`Acquire`] makes the store part of this operation [`Relaxed`], and
3144 /// using [`Release`] makes the load part [`Relaxed`].
3145 ///
3146 /// **Note**: This method is only available on platforms that support atomic operations on
3147 #[doc = concat!("[`", $s_int_type, "`].")]
3148 ///
3149 /// # Examples
3150 ///
3151 /// ```
3152 #[doc = concat!($extra_feature, "use std::sync::atomic::{", stringify!($atomic_type), ", Ordering};")]
3153 ///
3154 #[doc = concat!("let foo = ", stringify!($atomic_type), "::new(0);")]
3155 /// assert_eq!(foo.fetch_add(10, Ordering::SeqCst), 0);
3156 /// assert_eq!(foo.load(Ordering::SeqCst), 10);
3157 /// ```
3158 #[inline]
3159 #[$stable]
3160 #[$cfg_cas]
3161 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
3162 pub fn fetch_add(&self, val: $int_type, order: Ordering) -> $int_type {
3163 // SAFETY: data races are prevented by atomic intrinsics.
3164 unsafe { atomic_add(self.v.get(), val, order) }
3165 }
3166
3167 /// Subtracts from the current value, returning the previous value.
3168 ///
3169 /// This operation wraps around on overflow.
3170 ///
3171 /// `fetch_sub` takes an [`Ordering`] argument which describes the memory ordering
3172 /// of this operation. All ordering modes are possible. Note that using
3173 /// [`Acquire`] makes the store part of this operation [`Relaxed`], and
3174 /// using [`Release`] makes the load part [`Relaxed`].
3175 ///
3176 /// **Note**: This method is only available on platforms that support atomic operations on
3177 #[doc = concat!("[`", $s_int_type, "`].")]
3178 ///
3179 /// # Examples
3180 ///
3181 /// ```
3182 #[doc = concat!($extra_feature, "use std::sync::atomic::{", stringify!($atomic_type), ", Ordering};")]
3183 ///
3184 #[doc = concat!("let foo = ", stringify!($atomic_type), "::new(20);")]
3185 /// assert_eq!(foo.fetch_sub(10, Ordering::SeqCst), 20);
3186 /// assert_eq!(foo.load(Ordering::SeqCst), 10);
3187 /// ```
3188 #[inline]
3189 #[$stable]
3190 #[$cfg_cas]
3191 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
3192 pub fn fetch_sub(&self, val: $int_type, order: Ordering) -> $int_type {
3193 // SAFETY: data races are prevented by atomic intrinsics.
3194 unsafe { atomic_sub(self.v.get(), val, order) }
3195 }
3196
3197 /// Bitwise "and" with the current value.
3198 ///
3199 /// Performs a bitwise "and" operation on the current value and the argument `val`, and
3200 /// sets the new value to the result.
3201 ///
3202 /// Returns the previous value.
3203 ///
3204 /// `fetch_and` takes an [`Ordering`] argument which describes the memory ordering
3205 /// of this operation. All ordering modes are possible. Note that using
3206 /// [`Acquire`] makes the store part of this operation [`Relaxed`], and
3207 /// using [`Release`] makes the load part [`Relaxed`].
3208 ///
3209 /// **Note**: This method is only available on platforms that support atomic operations on
3210 #[doc = concat!("[`", $s_int_type, "`].")]
3211 ///
3212 /// # Examples
3213 ///
3214 /// ```
3215 #[doc = concat!($extra_feature, "use std::sync::atomic::{", stringify!($atomic_type), ", Ordering};")]
3216 ///
3217 #[doc = concat!("let foo = ", stringify!($atomic_type), "::new(0b101101);")]
3218 /// assert_eq!(foo.fetch_and(0b110011, Ordering::SeqCst), 0b101101);
3219 /// assert_eq!(foo.load(Ordering::SeqCst), 0b100001);
3220 /// ```
3221 #[inline]
3222 #[$stable]
3223 #[$cfg_cas]
3224 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
3225 pub fn fetch_and(&self, val: $int_type, order: Ordering) -> $int_type {
3226 // SAFETY: data races are prevented by atomic intrinsics.
3227 unsafe { atomic_and(self.v.get(), val, order) }
3228 }
3229
3230 /// Bitwise "nand" with the current value.
3231 ///
3232 /// Performs a bitwise "nand" operation on the current value and the argument `val`, and
3233 /// sets the new value to the result.
3234 ///
3235 /// Returns the previous value.
3236 ///
3237 /// `fetch_nand` takes an [`Ordering`] argument which describes the memory ordering
3238 /// of this operation. All ordering modes are possible. Note that using
3239 /// [`Acquire`] makes the store part of this operation [`Relaxed`], and
3240 /// using [`Release`] makes the load part [`Relaxed`].
3241 ///
3242 /// **Note**: This method is only available on platforms that support atomic operations on
3243 #[doc = concat!("[`", $s_int_type, "`].")]
3244 ///
3245 /// # Examples
3246 ///
3247 /// ```
3248 #[doc = concat!($extra_feature, "use std::sync::atomic::{", stringify!($atomic_type), ", Ordering};")]
3249 ///
3250 #[doc = concat!("let foo = ", stringify!($atomic_type), "::new(0x13);")]
3251 /// assert_eq!(foo.fetch_nand(0x31, Ordering::SeqCst), 0x13);
3252 /// assert_eq!(foo.load(Ordering::SeqCst), !(0x13 & 0x31));
3253 /// ```
3254 #[inline]
3255 #[$stable_nand]
3256 #[$cfg_cas]
3257 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
3258 pub fn fetch_nand(&self, val: $int_type, order: Ordering) -> $int_type {
3259 // SAFETY: data races are prevented by atomic intrinsics.
3260 unsafe { atomic_nand(self.v.get(), val, order) }
3261 }
3262
3263 /// Bitwise "or" with the current value.
3264 ///
3265 /// Performs a bitwise "or" operation on the current value and the argument `val`, and
3266 /// sets the new value to the result.
3267 ///
3268 /// Returns the previous value.
3269 ///
3270 /// `fetch_or` takes an [`Ordering`] argument which describes the memory ordering
3271 /// of this operation. All ordering modes are possible. Note that using
3272 /// [`Acquire`] makes the store part of this operation [`Relaxed`], and
3273 /// using [`Release`] makes the load part [`Relaxed`].
3274 ///
3275 /// **Note**: This method is only available on platforms that support atomic operations on
3276 #[doc = concat!("[`", $s_int_type, "`].")]
3277 ///
3278 /// # Examples
3279 ///
3280 /// ```
3281 #[doc = concat!($extra_feature, "use std::sync::atomic::{", stringify!($atomic_type), ", Ordering};")]
3282 ///
3283 #[doc = concat!("let foo = ", stringify!($atomic_type), "::new(0b101101);")]
3284 /// assert_eq!(foo.fetch_or(0b110011, Ordering::SeqCst), 0b101101);
3285 /// assert_eq!(foo.load(Ordering::SeqCst), 0b111111);
3286 /// ```
3287 #[inline]
3288 #[$stable]
3289 #[$cfg_cas]
3290 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
3291 pub fn fetch_or(&self, val: $int_type, order: Ordering) -> $int_type {
3292 // SAFETY: data races are prevented by atomic intrinsics.
3293 unsafe { atomic_or(self.v.get(), val, order) }
3294 }
3295
3296 /// Bitwise "xor" with the current value.
3297 ///
3298 /// Performs a bitwise "xor" operation on the current value and the argument `val`, and
3299 /// sets the new value to the result.
3300 ///
3301 /// Returns the previous value.
3302 ///
3303 /// `fetch_xor` takes an [`Ordering`] argument which describes the memory ordering
3304 /// of this operation. All ordering modes are possible. Note that using
3305 /// [`Acquire`] makes the store part of this operation [`Relaxed`], and
3306 /// using [`Release`] makes the load part [`Relaxed`].
3307 ///
3308 /// **Note**: This method is only available on platforms that support atomic operations on
3309 #[doc = concat!("[`", $s_int_type, "`].")]
3310 ///
3311 /// # Examples
3312 ///
3313 /// ```
3314 #[doc = concat!($extra_feature, "use std::sync::atomic::{", stringify!($atomic_type), ", Ordering};")]
3315 ///
3316 #[doc = concat!("let foo = ", stringify!($atomic_type), "::new(0b101101);")]
3317 /// assert_eq!(foo.fetch_xor(0b110011, Ordering::SeqCst), 0b101101);
3318 /// assert_eq!(foo.load(Ordering::SeqCst), 0b011110);
3319 /// ```
3320 #[inline]
3321 #[$stable]
3322 #[$cfg_cas]
3323 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
3324 pub fn fetch_xor(&self, val: $int_type, order: Ordering) -> $int_type {
3325 // SAFETY: data races are prevented by atomic intrinsics.
3326 unsafe { atomic_xor(self.v.get(), val, order) }
3327 }
3328
3329 /// Fetches the value, and applies a function to it that returns an optional
3330 /// new value. Returns a `Result` of `Ok(previous_value)` if the function returned `Some(_)`, else
3331 /// `Err(previous_value)`.
3332 ///
3333 /// Note: This may call the function multiple times if the value has been changed from other threads in
3334 /// the meantime, as long as the function returns `Some(_)`, but the function will have been applied
3335 /// only once to the stored value.
3336 ///
3337 /// `fetch_update` takes two [`Ordering`] arguments to describe the memory ordering of this operation.
3338 /// The first describes the required ordering for when the operation finally succeeds while the second
3339 /// describes the required ordering for loads. These correspond to the success and failure orderings of
3340 #[doc = concat!("[`", stringify!($atomic_type), "::compare_exchange`]")]
3341 /// respectively.
3342 ///
3343 /// Using [`Acquire`] as success ordering makes the store part
3344 /// of this operation [`Relaxed`], and using [`Release`] makes the final successful load
3345 /// [`Relaxed`]. The (failed) load ordering can only be [`SeqCst`], [`Acquire`] or [`Relaxed`].
3346 ///
3347 /// **Note**: This method is only available on platforms that support atomic operations on
3348 #[doc = concat!("[`", $s_int_type, "`].")]
3349 ///
3350 /// # Considerations
3351 ///
3352 /// This method is not magic; it is not provided by the hardware, and does not act like a
3353 /// critical section or mutex.
3354 ///
3355 /// It is implemented on top of an atomic [compare-and-swap operation], and thus is subject to
3356 /// the usual drawbacks of CAS operations. In particular, be careful of the [ABA problem]
3357 /// if this atomic integer is an index or more generally if knowledge of only the *bitwise value*
3358 /// of the atomic is not in and of itself sufficient to ensure any required preconditions.
3359 ///
3360 /// [ABA Problem]: https://en.wikipedia.org/wiki/ABA_problem
3361 /// [compare-and-swap operation]: https://en.wikipedia.org/wiki/Compare-and-swap
3362 ///
3363 /// # Examples
3364 ///
3365 /// ```rust
3366 #[doc = concat!($extra_feature, "use std::sync::atomic::{", stringify!($atomic_type), ", Ordering};")]
3367 ///
3368 #[doc = concat!("let x = ", stringify!($atomic_type), "::new(7);")]
3369 /// assert_eq!(x.fetch_update(Ordering::SeqCst, Ordering::SeqCst, |_| None), Err(7));
3370 /// assert_eq!(x.fetch_update(Ordering::SeqCst, Ordering::SeqCst, |x| Some(x + 1)), Ok(7));
3371 /// assert_eq!(x.fetch_update(Ordering::SeqCst, Ordering::SeqCst, |x| Some(x + 1)), Ok(8));
3372 /// assert_eq!(x.load(Ordering::SeqCst), 9);
3373 /// ```
3374 #[inline]
3375 #[stable(feature = "no_more_cas", since = "1.45.0")]
3376 #[$cfg_cas]
3377 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
3378 pub fn fetch_update<F>(&self,
3379 set_order: Ordering,
3380 fetch_order: Ordering,
3381 mut f: F) -> Result<$int_type, $int_type>
3382 where F: FnMut($int_type) -> Option<$int_type> {
3383 let mut prev = self.load(fetch_order);
3384 while let Some(next) = f(prev) {
3385 match self.compare_exchange_weak(prev, next, set_order, fetch_order) {
3386 x @ Ok(_) => return x,
3387 Err(next_prev) => prev = next_prev
3388 }
3389 }
3390 Err(prev)
3391 }
3392
3393 /// Fetches the value, and applies a function to it that returns an optional
3394 /// new value. Returns a `Result` of `Ok(previous_value)` if the function returned `Some(_)`, else
3395 /// `Err(previous_value)`.
3396 ///
3397 #[doc = concat!("See also: [`update`](`", stringify!($atomic_type), "::update`).")]
3398 ///
3399 /// Note: This may call the function multiple times if the value has been changed from other threads in
3400 /// the meantime, as long as the function returns `Some(_)`, but the function will have been applied
3401 /// only once to the stored value.
3402 ///
3403 /// `try_update` takes two [`Ordering`] arguments to describe the memory ordering of this operation.
3404 /// The first describes the required ordering for when the operation finally succeeds while the second
3405 /// describes the required ordering for loads. These correspond to the success and failure orderings of
3406 #[doc = concat!("[`", stringify!($atomic_type), "::compare_exchange`]")]
3407 /// respectively.
3408 ///
3409 /// Using [`Acquire`] as success ordering makes the store part
3410 /// of this operation [`Relaxed`], and using [`Release`] makes the final successful load
3411 /// [`Relaxed`]. The (failed) load ordering can only be [`SeqCst`], [`Acquire`] or [`Relaxed`].
3412 ///
3413 /// **Note**: This method is only available on platforms that support atomic operations on
3414 #[doc = concat!("[`", $s_int_type, "`].")]
3415 ///
3416 /// # Considerations
3417 ///
3418 /// This method is not magic; it is not provided by the hardware, and does not act like a
3419 /// critical section or mutex.
3420 ///
3421 /// It is implemented on top of an atomic [compare-and-swap operation], and thus is subject to
3422 /// the usual drawbacks of CAS operations. In particular, be careful of the [ABA problem]
3423 /// if this atomic integer is an index or more generally if knowledge of only the *bitwise value*
3424 /// of the atomic is not in and of itself sufficient to ensure any required preconditions.
3425 ///
3426 /// [ABA Problem]: https://en.wikipedia.org/wiki/ABA_problem
3427 /// [compare-and-swap operation]: https://en.wikipedia.org/wiki/Compare-and-swap
3428 ///
3429 /// # Examples
3430 ///
3431 /// ```rust
3432 /// #![feature(atomic_try_update)]
3433 #[doc = concat!($extra_feature, "use std::sync::atomic::{", stringify!($atomic_type), ", Ordering};")]
3434 ///
3435 #[doc = concat!("let x = ", stringify!($atomic_type), "::new(7);")]
3436 /// assert_eq!(x.try_update(Ordering::SeqCst, Ordering::SeqCst, |_| None), Err(7));
3437 /// assert_eq!(x.try_update(Ordering::SeqCst, Ordering::SeqCst, |x| Some(x + 1)), Ok(7));
3438 /// assert_eq!(x.try_update(Ordering::SeqCst, Ordering::SeqCst, |x| Some(x + 1)), Ok(8));
3439 /// assert_eq!(x.load(Ordering::SeqCst), 9);
3440 /// ```
3441 #[inline]
3442 #[unstable(feature = "atomic_try_update", issue = "135894")]
3443 #[$cfg_cas]
3444 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
3445 pub fn try_update(
3446 &self,
3447 set_order: Ordering,
3448 fetch_order: Ordering,
3449 f: impl FnMut($int_type) -> Option<$int_type>,
3450 ) -> Result<$int_type, $int_type> {
3451 // FIXME(atomic_try_update): this is currently an unstable alias to `fetch_update`;
3452 // when stabilizing, turn `fetch_update` into a deprecated alias to `try_update`.
3453 self.fetch_update(set_order, fetch_order, f)
3454 }
3455
3456 /// Fetches the value, applies a function to it that it return a new value.
3457 /// The new value is stored and the old value is returned.
3458 ///
3459 #[doc = concat!("See also: [`try_update`](`", stringify!($atomic_type), "::try_update`).")]
3460 ///
3461 /// Note: This may call the function multiple times if the value has been changed from other threads in
3462 /// the meantime, but the function will have been applied only once to the stored value.
3463 ///
3464 /// `update` takes two [`Ordering`] arguments to describe the memory ordering of this operation.
3465 /// The first describes the required ordering for when the operation finally succeeds while the second
3466 /// describes the required ordering for loads. These correspond to the success and failure orderings of
3467 #[doc = concat!("[`", stringify!($atomic_type), "::compare_exchange`]")]
3468 /// respectively.
3469 ///
3470 /// Using [`Acquire`] as success ordering makes the store part
3471 /// of this operation [`Relaxed`], and using [`Release`] makes the final successful load
3472 /// [`Relaxed`]. The (failed) load ordering can only be [`SeqCst`], [`Acquire`] or [`Relaxed`].
3473 ///
3474 /// **Note**: This method is only available on platforms that support atomic operations on
3475 #[doc = concat!("[`", $s_int_type, "`].")]
3476 ///
3477 /// # Considerations
3478 ///
3479 /// [CAS operation]: https://en.wikipedia.org/wiki/Compare-and-swap
3480 /// This method is not magic; it is not provided by the hardware, and does not act like a
3481 /// critical section or mutex.
3482 ///
3483 /// It is implemented on top of an atomic [compare-and-swap operation], and thus is subject to
3484 /// the usual drawbacks of CAS operations. In particular, be careful of the [ABA problem]
3485 /// if this atomic integer is an index or more generally if knowledge of only the *bitwise value*
3486 /// of the atomic is not in and of itself sufficient to ensure any required preconditions.
3487 ///
3488 /// [ABA Problem]: https://en.wikipedia.org/wiki/ABA_problem
3489 /// [compare-and-swap operation]: https://en.wikipedia.org/wiki/Compare-and-swap
3490 ///
3491 /// # Examples
3492 ///
3493 /// ```rust
3494 /// #![feature(atomic_try_update)]
3495 #[doc = concat!($extra_feature, "use std::sync::atomic::{", stringify!($atomic_type), ", Ordering};")]
3496 ///
3497 #[doc = concat!("let x = ", stringify!($atomic_type), "::new(7);")]
3498 /// assert_eq!(x.update(Ordering::SeqCst, Ordering::SeqCst, |x| x + 1), 7);
3499 /// assert_eq!(x.update(Ordering::SeqCst, Ordering::SeqCst, |x| x + 1), 8);
3500 /// assert_eq!(x.load(Ordering::SeqCst), 9);
3501 /// ```
3502 #[inline]
3503 #[unstable(feature = "atomic_try_update", issue = "135894")]
3504 #[$cfg_cas]
3505 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
3506 pub fn update(
3507 &self,
3508 set_order: Ordering,
3509 fetch_order: Ordering,
3510 mut f: impl FnMut($int_type) -> $int_type,
3511 ) -> $int_type {
3512 let mut prev = self.load(fetch_order);
3513 loop {
3514 match self.compare_exchange_weak(prev, f(prev), set_order, fetch_order) {
3515 Ok(x) => break x,
3516 Err(next_prev) => prev = next_prev,
3517 }
3518 }
3519 }
3520
3521 /// Maximum with the current value.
3522 ///
3523 /// Finds the maximum of the current value and the argument `val`, and
3524 /// sets the new value to the result.
3525 ///
3526 /// Returns the previous value.
3527 ///
3528 /// `fetch_max` takes an [`Ordering`] argument which describes the memory ordering
3529 /// of this operation. All ordering modes are possible. Note that using
3530 /// [`Acquire`] makes the store part of this operation [`Relaxed`], and
3531 /// using [`Release`] makes the load part [`Relaxed`].
3532 ///
3533 /// **Note**: This method is only available on platforms that support atomic operations on
3534 #[doc = concat!("[`", $s_int_type, "`].")]
3535 ///
3536 /// # Examples
3537 ///
3538 /// ```
3539 #[doc = concat!($extra_feature, "use std::sync::atomic::{", stringify!($atomic_type), ", Ordering};")]
3540 ///
3541 #[doc = concat!("let foo = ", stringify!($atomic_type), "::new(23);")]
3542 /// assert_eq!(foo.fetch_max(42, Ordering::SeqCst), 23);
3543 /// assert_eq!(foo.load(Ordering::SeqCst), 42);
3544 /// ```
3545 ///
3546 /// If you want to obtain the maximum value in one step, you can use the following:
3547 ///
3548 /// ```
3549 #[doc = concat!($extra_feature, "use std::sync::atomic::{", stringify!($atomic_type), ", Ordering};")]
3550 ///
3551 #[doc = concat!("let foo = ", stringify!($atomic_type), "::new(23);")]
3552 /// let bar = 42;
3553 /// let max_foo = foo.fetch_max(bar, Ordering::SeqCst).max(bar);
3554 /// assert!(max_foo == 42);
3555 /// ```
3556 #[inline]
3557 #[stable(feature = "atomic_min_max", since = "1.45.0")]
3558 #[$cfg_cas]
3559 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
3560 pub fn fetch_max(&self, val: $int_type, order: Ordering) -> $int_type {
3561 // SAFETY: data races are prevented by atomic intrinsics.
3562 unsafe { $max_fn(self.v.get(), val, order) }
3563 }
3564
3565 /// Minimum with the current value.
3566 ///
3567 /// Finds the minimum of the current value and the argument `val`, and
3568 /// sets the new value to the result.
3569 ///
3570 /// Returns the previous value.
3571 ///
3572 /// `fetch_min` takes an [`Ordering`] argument which describes the memory ordering
3573 /// of this operation. All ordering modes are possible. Note that using
3574 /// [`Acquire`] makes the store part of this operation [`Relaxed`], and
3575 /// using [`Release`] makes the load part [`Relaxed`].
3576 ///
3577 /// **Note**: This method is only available on platforms that support atomic operations on
3578 #[doc = concat!("[`", $s_int_type, "`].")]
3579 ///
3580 /// # Examples
3581 ///
3582 /// ```
3583 #[doc = concat!($extra_feature, "use std::sync::atomic::{", stringify!($atomic_type), ", Ordering};")]
3584 ///
3585 #[doc = concat!("let foo = ", stringify!($atomic_type), "::new(23);")]
3586 /// assert_eq!(foo.fetch_min(42, Ordering::Relaxed), 23);
3587 /// assert_eq!(foo.load(Ordering::Relaxed), 23);
3588 /// assert_eq!(foo.fetch_min(22, Ordering::Relaxed), 23);
3589 /// assert_eq!(foo.load(Ordering::Relaxed), 22);
3590 /// ```
3591 ///
3592 /// If you want to obtain the minimum value in one step, you can use the following:
3593 ///
3594 /// ```
3595 #[doc = concat!($extra_feature, "use std::sync::atomic::{", stringify!($atomic_type), ", Ordering};")]
3596 ///
3597 #[doc = concat!("let foo = ", stringify!($atomic_type), "::new(23);")]
3598 /// let bar = 12;
3599 /// let min_foo = foo.fetch_min(bar, Ordering::SeqCst).min(bar);
3600 /// assert_eq!(min_foo, 12);
3601 /// ```
3602 #[inline]
3603 #[stable(feature = "atomic_min_max", since = "1.45.0")]
3604 #[$cfg_cas]
3605 #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
3606 pub fn fetch_min(&self, val: $int_type, order: Ordering) -> $int_type {
3607 // SAFETY: data races are prevented by atomic intrinsics.
3608 unsafe { $min_fn(self.v.get(), val, order) }
3609 }
3610
3611 /// Returns a mutable pointer to the underlying integer.
3612 ///
3613 /// Doing non-atomic reads and writes on the resulting integer can be a data race.
3614 /// This method is mostly useful for FFI, where the function signature may use
3615 #[doc = concat!("`*mut ", stringify!($int_type), "` instead of `&", stringify!($atomic_type), "`.")]
3616 ///
3617 /// Returning an `*mut` pointer from a shared reference to this atomic is safe because the
3618 /// atomic types work with interior mutability. All modifications of an atomic change the value
3619 /// through a shared reference, and can do so safely as long as they use atomic operations. Any
3620 /// use of the returned raw pointer requires an `unsafe` block and still has to uphold the
3621 /// requirements of the [memory model].
3622 ///
3623 /// # Examples
3624 ///
3625 /// ```ignore (extern-declaration)
3626 /// # fn main() {
3627 #[doc = concat!($extra_feature, "use std::sync::atomic::", stringify!($atomic_type), ";")]
3628 ///
3629 /// extern "C" {
3630 #[doc = concat!(" fn my_atomic_op(arg: *mut ", stringify!($int_type), ");")]
3631 /// }
3632 ///
3633 #[doc = concat!("let atomic = ", stringify!($atomic_type), "::new(1);")]
3634 ///
3635 /// // SAFETY: Safe as long as `my_atomic_op` is atomic.
3636 /// unsafe {
3637 /// my_atomic_op(atomic.as_ptr());
3638 /// }
3639 /// # }
3640 /// ```
3641 ///
3642 /// [memory model]: self#memory-model-for-atomic-accesses
3643 #[inline]
3644 #[stable(feature = "atomic_as_ptr", since = "1.70.0")]
3645 #[rustc_const_stable(feature = "atomic_as_ptr", since = "1.70.0")]
3646 #[rustc_never_returns_null_ptr]
3647 pub const fn as_ptr(&self) -> *mut $int_type {
3648 self.v.get()
3649 }
3650 }
3651 }
3652}
3653
3654#[cfg(target_has_atomic_load_store = "8")]
3655atomic_int! {
3656 cfg(target_has_atomic = "8"),
3657 cfg(target_has_atomic_equal_alignment = "8"),
3658 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3659 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3660 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3661 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3662 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3663 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3664 rustc_const_stable(feature = "const_integer_atomics", since = "1.34.0"),
3665 rustc_const_stable(feature = "const_atomic_into_inner", since = "1.79.0"),
3666 rustc_diagnostic_item = "AtomicI8",
3667 "i8",
3668 "",
3669 atomic_min, atomic_max,
3670 1,
3671 i8 AtomicI8
3672}
3673#[cfg(target_has_atomic_load_store = "8")]
3674atomic_int! {
3675 cfg(target_has_atomic = "8"),
3676 cfg(target_has_atomic_equal_alignment = "8"),
3677 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3678 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3679 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3680 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3681 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3682 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3683 rustc_const_stable(feature = "const_integer_atomics", since = "1.34.0"),
3684 rustc_const_stable(feature = "const_atomic_into_inner", since = "1.79.0"),
3685 rustc_diagnostic_item = "AtomicU8",
3686 "u8",
3687 "",
3688 atomic_umin, atomic_umax,
3689 1,
3690 u8 AtomicU8
3691}
3692#[cfg(target_has_atomic_load_store = "16")]
3693atomic_int! {
3694 cfg(target_has_atomic = "16"),
3695 cfg(target_has_atomic_equal_alignment = "16"),
3696 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3697 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3698 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3699 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3700 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3701 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3702 rustc_const_stable(feature = "const_integer_atomics", since = "1.34.0"),
3703 rustc_const_stable(feature = "const_atomic_into_inner", since = "1.79.0"),
3704 rustc_diagnostic_item = "AtomicI16",
3705 "i16",
3706 "",
3707 atomic_min, atomic_max,
3708 2,
3709 i16 AtomicI16
3710}
3711#[cfg(target_has_atomic_load_store = "16")]
3712atomic_int! {
3713 cfg(target_has_atomic = "16"),
3714 cfg(target_has_atomic_equal_alignment = "16"),
3715 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3716 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3717 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3718 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3719 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3720 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3721 rustc_const_stable(feature = "const_integer_atomics", since = "1.34.0"),
3722 rustc_const_stable(feature = "const_atomic_into_inner", since = "1.79.0"),
3723 rustc_diagnostic_item = "AtomicU16",
3724 "u16",
3725 "",
3726 atomic_umin, atomic_umax,
3727 2,
3728 u16 AtomicU16
3729}
3730#[cfg(target_has_atomic_load_store = "32")]
3731atomic_int! {
3732 cfg(target_has_atomic = "32"),
3733 cfg(target_has_atomic_equal_alignment = "32"),
3734 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3735 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3736 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3737 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3738 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3739 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3740 rustc_const_stable(feature = "const_integer_atomics", since = "1.34.0"),
3741 rustc_const_stable(feature = "const_atomic_into_inner", since = "1.79.0"),
3742 rustc_diagnostic_item = "AtomicI32",
3743 "i32",
3744 "",
3745 atomic_min, atomic_max,
3746 4,
3747 i32 AtomicI32
3748}
3749#[cfg(target_has_atomic_load_store = "32")]
3750atomic_int! {
3751 cfg(target_has_atomic = "32"),
3752 cfg(target_has_atomic_equal_alignment = "32"),
3753 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3754 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3755 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3756 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3757 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3758 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3759 rustc_const_stable(feature = "const_integer_atomics", since = "1.34.0"),
3760 rustc_const_stable(feature = "const_atomic_into_inner", since = "1.79.0"),
3761 rustc_diagnostic_item = "AtomicU32",
3762 "u32",
3763 "",
3764 atomic_umin, atomic_umax,
3765 4,
3766 u32 AtomicU32
3767}
3768#[cfg(target_has_atomic_load_store = "64")]
3769atomic_int! {
3770 cfg(target_has_atomic = "64"),
3771 cfg(target_has_atomic_equal_alignment = "64"),
3772 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3773 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3774 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3775 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3776 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3777 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3778 rustc_const_stable(feature = "const_integer_atomics", since = "1.34.0"),
3779 rustc_const_stable(feature = "const_atomic_into_inner", since = "1.79.0"),
3780 rustc_diagnostic_item = "AtomicI64",
3781 "i64",
3782 "",
3783 atomic_min, atomic_max,
3784 8,
3785 i64 AtomicI64
3786}
3787#[cfg(target_has_atomic_load_store = "64")]
3788atomic_int! {
3789 cfg(target_has_atomic = "64"),
3790 cfg(target_has_atomic_equal_alignment = "64"),
3791 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3792 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3793 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3794 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3795 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3796 stable(feature = "integer_atomics_stable", since = "1.34.0"),
3797 rustc_const_stable(feature = "const_integer_atomics", since = "1.34.0"),
3798 rustc_const_stable(feature = "const_atomic_into_inner", since = "1.79.0"),
3799 rustc_diagnostic_item = "AtomicU64",
3800 "u64",
3801 "",
3802 atomic_umin, atomic_umax,
3803 8,
3804 u64 AtomicU64
3805}
3806#[cfg(target_has_atomic_load_store = "128")]
3807atomic_int! {
3808 cfg(target_has_atomic = "128"),
3809 cfg(target_has_atomic_equal_alignment = "128"),
3810 unstable(feature = "integer_atomics", issue = "99069"),
3811 unstable(feature = "integer_atomics", issue = "99069"),
3812 unstable(feature = "integer_atomics", issue = "99069"),
3813 unstable(feature = "integer_atomics", issue = "99069"),
3814 unstable(feature = "integer_atomics", issue = "99069"),
3815 unstable(feature = "integer_atomics", issue = "99069"),
3816 rustc_const_unstable(feature = "integer_atomics", issue = "99069"),
3817 rustc_const_unstable(feature = "integer_atomics", issue = "99069"),
3818 rustc_diagnostic_item = "AtomicI128",
3819 "i128",
3820 "#![feature(integer_atomics)]\n\n",
3821 atomic_min, atomic_max,
3822 16,
3823 i128 AtomicI128
3824}
3825#[cfg(target_has_atomic_load_store = "128")]
3826atomic_int! {
3827 cfg(target_has_atomic = "128"),
3828 cfg(target_has_atomic_equal_alignment = "128"),
3829 unstable(feature = "integer_atomics", issue = "99069"),
3830 unstable(feature = "integer_atomics", issue = "99069"),
3831 unstable(feature = "integer_atomics", issue = "99069"),
3832 unstable(feature = "integer_atomics", issue = "99069"),
3833 unstable(feature = "integer_atomics", issue = "99069"),
3834 unstable(feature = "integer_atomics", issue = "99069"),
3835 rustc_const_unstable(feature = "integer_atomics", issue = "99069"),
3836 rustc_const_unstable(feature = "integer_atomics", issue = "99069"),
3837 rustc_diagnostic_item = "AtomicU128",
3838 "u128",
3839 "#![feature(integer_atomics)]\n\n",
3840 atomic_umin, atomic_umax,
3841 16,
3842 u128 AtomicU128
3843}
3844
3845#[cfg(target_has_atomic_load_store = "ptr")]
3846macro_rules! atomic_int_ptr_sized {
3847 ( $($target_pointer_width:literal $align:literal)* ) => { $(
3848 #[cfg(target_pointer_width = $target_pointer_width)]
3849 atomic_int! {
3850 cfg(target_has_atomic = "ptr"),
3851 cfg(target_has_atomic_equal_alignment = "ptr"),
3852 stable(feature = "rust1", since = "1.0.0"),
3853 stable(feature = "extended_compare_and_swap", since = "1.10.0"),
3854 stable(feature = "atomic_debug", since = "1.3.0"),
3855 stable(feature = "atomic_access", since = "1.15.0"),
3856 stable(feature = "atomic_from", since = "1.23.0"),
3857 stable(feature = "atomic_nand", since = "1.27.0"),
3858 rustc_const_stable(feature = "const_ptr_sized_atomics", since = "1.24.0"),
3859 rustc_const_stable(feature = "const_atomic_into_inner", since = "1.79.0"),
3860 rustc_diagnostic_item = "AtomicIsize",
3861 "isize",
3862 "",
3863 atomic_min, atomic_max,
3864 $align,
3865 isize AtomicIsize
3866 }
3867 #[cfg(target_pointer_width = $target_pointer_width)]
3868 atomic_int! {
3869 cfg(target_has_atomic = "ptr"),
3870 cfg(target_has_atomic_equal_alignment = "ptr"),
3871 stable(feature = "rust1", since = "1.0.0"),
3872 stable(feature = "extended_compare_and_swap", since = "1.10.0"),
3873 stable(feature = "atomic_debug", since = "1.3.0"),
3874 stable(feature = "atomic_access", since = "1.15.0"),
3875 stable(feature = "atomic_from", since = "1.23.0"),
3876 stable(feature = "atomic_nand", since = "1.27.0"),
3877 rustc_const_stable(feature = "const_ptr_sized_atomics", since = "1.24.0"),
3878 rustc_const_stable(feature = "const_atomic_into_inner", since = "1.79.0"),
3879 rustc_diagnostic_item = "AtomicUsize",
3880 "usize",
3881 "",
3882 atomic_umin, atomic_umax,
3883 $align,
3884 usize AtomicUsize
3885 }
3886
3887 /// An [`AtomicIsize`] initialized to `0`.
3888 #[cfg(target_pointer_width = $target_pointer_width)]
3889 #[stable(feature = "rust1", since = "1.0.0")]
3890 #[deprecated(
3891 since = "1.34.0",
3892 note = "the `new` function is now preferred",
3893 suggestion = "AtomicIsize::new(0)",
3894 )]
3895 pub const ATOMIC_ISIZE_INIT: AtomicIsize = AtomicIsize::new(0);
3896
3897 /// An [`AtomicUsize`] initialized to `0`.
3898 #[cfg(target_pointer_width = $target_pointer_width)]
3899 #[stable(feature = "rust1", since = "1.0.0")]
3900 #[deprecated(
3901 since = "1.34.0",
3902 note = "the `new` function is now preferred",
3903 suggestion = "AtomicUsize::new(0)",
3904 )]
3905 pub const ATOMIC_USIZE_INIT: AtomicUsize = AtomicUsize::new(0);
3906 )* };
3907}
3908
3909#[cfg(target_has_atomic_load_store = "ptr")]
3910atomic_int_ptr_sized! {
3911 "16" 2
3912 "32" 4
3913 "64" 8
3914}
3915
3916#[inline]
3917#[cfg(target_has_atomic)]
3918fn strongest_failure_ordering(order: Ordering) -> Ordering {
3919 match order {
3920 Release => Relaxed,
3921 Relaxed => Relaxed,
3922 SeqCst => SeqCst,
3923 Acquire => Acquire,
3924 AcqRel => Acquire,
3925 }
3926}
3927
3928#[inline]
3929#[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
3930unsafe fn atomic_store<T: Copy>(dst: *mut T, val: T, order: Ordering) {
3931 // SAFETY: the caller must uphold the safety contract for `atomic_store`.
3932 unsafe {
3933 match order {
3934 Relaxed => intrinsics::atomic_store::<T, { AO::Relaxed }>(dst, val),
3935 Release => intrinsics::atomic_store::<T, { AO::Release }>(dst, val),
3936 SeqCst => intrinsics::atomic_store::<T, { AO::SeqCst }>(dst, val),
3937 Acquire => panic!("there is no such thing as an acquire store"),
3938 AcqRel => panic!("there is no such thing as an acquire-release store"),
3939 }
3940 }
3941}
3942
3943#[inline]
3944#[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
3945unsafe fn atomic_load<T: Copy>(dst: *const T, order: Ordering) -> T {
3946 // SAFETY: the caller must uphold the safety contract for `atomic_load`.
3947 unsafe {
3948 match order {
3949 Relaxed => intrinsics::atomic_load::<T, { AO::Relaxed }>(dst),
3950 Acquire => intrinsics::atomic_load::<T, { AO::Acquire }>(dst),
3951 SeqCst => intrinsics::atomic_load::<T, { AO::SeqCst }>(dst),
3952 Release => panic!("there is no such thing as a release load"),
3953 AcqRel => panic!("there is no such thing as an acquire-release load"),
3954 }
3955 }
3956}
3957
3958#[inline]
3959#[cfg(target_has_atomic)]
3960#[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
3961unsafe fn atomic_swap<T: Copy>(dst: *mut T, val: T, order: Ordering) -> T {
3962 // SAFETY: the caller must uphold the safety contract for `atomic_swap`.
3963 unsafe {
3964 match order {
3965 Relaxed => intrinsics::atomic_xchg::<T, { AO::Relaxed }>(dst, val),
3966 Acquire => intrinsics::atomic_xchg::<T, { AO::Acquire }>(dst, val),
3967 Release => intrinsics::atomic_xchg::<T, { AO::Release }>(dst, val),
3968 AcqRel => intrinsics::atomic_xchg::<T, { AO::AcqRel }>(dst, val),
3969 SeqCst => intrinsics::atomic_xchg::<T, { AO::SeqCst }>(dst, val),
3970 }
3971 }
3972}
3973
3974/// Returns the previous value (like __sync_fetch_and_add).
3975#[inline]
3976#[cfg(target_has_atomic)]
3977#[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
3978unsafe fn atomic_add<T: Copy, U: Copy>(dst: *mut T, val: U, order: Ordering) -> T {
3979 // SAFETY: the caller must uphold the safety contract for `atomic_add`.
3980 unsafe {
3981 match order {
3982 Relaxed => intrinsics::atomic_xadd::<T, U, { AO::Relaxed }>(dst, val),
3983 Acquire => intrinsics::atomic_xadd::<T, U, { AO::Acquire }>(dst, val),
3984 Release => intrinsics::atomic_xadd::<T, U, { AO::Release }>(dst, val),
3985 AcqRel => intrinsics::atomic_xadd::<T, U, { AO::AcqRel }>(dst, val),
3986 SeqCst => intrinsics::atomic_xadd::<T, U, { AO::SeqCst }>(dst, val),
3987 }
3988 }
3989}
3990
3991/// Returns the previous value (like __sync_fetch_and_sub).
3992#[inline]
3993#[cfg(target_has_atomic)]
3994#[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
3995unsafe fn atomic_sub<T: Copy, U: Copy>(dst: *mut T, val: U, order: Ordering) -> T {
3996 // SAFETY: the caller must uphold the safety contract for `atomic_sub`.
3997 unsafe {
3998 match order {
3999 Relaxed => intrinsics::atomic_xsub::<T, U, { AO::Relaxed }>(dst, val),
4000 Acquire => intrinsics::atomic_xsub::<T, U, { AO::Acquire }>(dst, val),
4001 Release => intrinsics::atomic_xsub::<T, U, { AO::Release }>(dst, val),
4002 AcqRel => intrinsics::atomic_xsub::<T, U, { AO::AcqRel }>(dst, val),
4003 SeqCst => intrinsics::atomic_xsub::<T, U, { AO::SeqCst }>(dst, val),
4004 }
4005 }
4006}
4007
4008/// Publicly exposed for stdarch; nobody else should use this.
4009#[inline]
4010#[cfg(target_has_atomic)]
4011#[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
4012#[unstable(feature = "core_intrinsics", issue = "none")]
4013#[doc(hidden)]
4014pub unsafe fn atomic_compare_exchange<T: Copy>(
4015 dst: *mut T,
4016 old: T,
4017 new: T,
4018 success: Ordering,
4019 failure: Ordering,
4020) -> Result<T, T> {
4021 // SAFETY: the caller must uphold the safety contract for `atomic_compare_exchange`.
4022 let (val, ok) = unsafe {
4023 match (success, failure) {
4024 (Relaxed, Relaxed) => {
4025 intrinsics::atomic_cxchg::<T, { AO::Relaxed }, { AO::Relaxed }>(dst, old, new)
4026 }
4027 (Relaxed, Acquire) => {
4028 intrinsics::atomic_cxchg::<T, { AO::Relaxed }, { AO::Acquire }>(dst, old, new)
4029 }
4030 (Relaxed, SeqCst) => {
4031 intrinsics::atomic_cxchg::<T, { AO::Relaxed }, { AO::SeqCst }>(dst, old, new)
4032 }
4033 (Acquire, Relaxed) => {
4034 intrinsics::atomic_cxchg::<T, { AO::Acquire }, { AO::Relaxed }>(dst, old, new)
4035 }
4036 (Acquire, Acquire) => {
4037 intrinsics::atomic_cxchg::<T, { AO::Acquire }, { AO::Acquire }>(dst, old, new)
4038 }
4039 (Acquire, SeqCst) => {
4040 intrinsics::atomic_cxchg::<T, { AO::Acquire }, { AO::SeqCst }>(dst, old, new)
4041 }
4042 (Release, Relaxed) => {
4043 intrinsics::atomic_cxchg::<T, { AO::Release }, { AO::Relaxed }>(dst, old, new)
4044 }
4045 (Release, Acquire) => {
4046 intrinsics::atomic_cxchg::<T, { AO::Release }, { AO::Acquire }>(dst, old, new)
4047 }
4048 (Release, SeqCst) => {
4049 intrinsics::atomic_cxchg::<T, { AO::Release }, { AO::SeqCst }>(dst, old, new)
4050 }
4051 (AcqRel, Relaxed) => {
4052 intrinsics::atomic_cxchg::<T, { AO::AcqRel }, { AO::Relaxed }>(dst, old, new)
4053 }
4054 (AcqRel, Acquire) => {
4055 intrinsics::atomic_cxchg::<T, { AO::AcqRel }, { AO::Acquire }>(dst, old, new)
4056 }
4057 (AcqRel, SeqCst) => {
4058 intrinsics::atomic_cxchg::<T, { AO::AcqRel }, { AO::SeqCst }>(dst, old, new)
4059 }
4060 (SeqCst, Relaxed) => {
4061 intrinsics::atomic_cxchg::<T, { AO::SeqCst }, { AO::Relaxed }>(dst, old, new)
4062 }
4063 (SeqCst, Acquire) => {
4064 intrinsics::atomic_cxchg::<T, { AO::SeqCst }, { AO::Acquire }>(dst, old, new)
4065 }
4066 (SeqCst, SeqCst) => {
4067 intrinsics::atomic_cxchg::<T, { AO::SeqCst }, { AO::SeqCst }>(dst, old, new)
4068 }
4069 (_, AcqRel) => panic!("there is no such thing as an acquire-release failure ordering"),
4070 (_, Release) => panic!("there is no such thing as a release failure ordering"),
4071 }
4072 };
4073 if ok { Ok(val) } else { Err(val) }
4074}
4075
4076#[inline]
4077#[cfg(target_has_atomic)]
4078#[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
4079unsafe fn atomic_compare_exchange_weak<T: Copy>(
4080 dst: *mut T,
4081 old: T,
4082 new: T,
4083 success: Ordering,
4084 failure: Ordering,
4085) -> Result<T, T> {
4086 // SAFETY: the caller must uphold the safety contract for `atomic_compare_exchange_weak`.
4087 let (val, ok) = unsafe {
4088 match (success, failure) {
4089 (Relaxed, Relaxed) => {
4090 intrinsics::atomic_cxchgweak::<T, { AO::Relaxed }, { AO::Relaxed }>(dst, old, new)
4091 }
4092 (Relaxed, Acquire) => {
4093 intrinsics::atomic_cxchgweak::<T, { AO::Relaxed }, { AO::Acquire }>(dst, old, new)
4094 }
4095 (Relaxed, SeqCst) => {
4096 intrinsics::atomic_cxchgweak::<T, { AO::Relaxed }, { AO::SeqCst }>(dst, old, new)
4097 }
4098 (Acquire, Relaxed) => {
4099 intrinsics::atomic_cxchgweak::<T, { AO::Acquire }, { AO::Relaxed }>(dst, old, new)
4100 }
4101 (Acquire, Acquire) => {
4102 intrinsics::atomic_cxchgweak::<T, { AO::Acquire }, { AO::Acquire }>(dst, old, new)
4103 }
4104 (Acquire, SeqCst) => {
4105 intrinsics::atomic_cxchgweak::<T, { AO::Acquire }, { AO::SeqCst }>(dst, old, new)
4106 }
4107 (Release, Relaxed) => {
4108 intrinsics::atomic_cxchgweak::<T, { AO::Release }, { AO::Relaxed }>(dst, old, new)
4109 }
4110 (Release, Acquire) => {
4111 intrinsics::atomic_cxchgweak::<T, { AO::Release }, { AO::Acquire }>(dst, old, new)
4112 }
4113 (Release, SeqCst) => {
4114 intrinsics::atomic_cxchgweak::<T, { AO::Release }, { AO::SeqCst }>(dst, old, new)
4115 }
4116 (AcqRel, Relaxed) => {
4117 intrinsics::atomic_cxchgweak::<T, { AO::AcqRel }, { AO::Relaxed }>(dst, old, new)
4118 }
4119 (AcqRel, Acquire) => {
4120 intrinsics::atomic_cxchgweak::<T, { AO::AcqRel }, { AO::Acquire }>(dst, old, new)
4121 }
4122 (AcqRel, SeqCst) => {
4123 intrinsics::atomic_cxchgweak::<T, { AO::AcqRel }, { AO::SeqCst }>(dst, old, new)
4124 }
4125 (SeqCst, Relaxed) => {
4126 intrinsics::atomic_cxchgweak::<T, { AO::SeqCst }, { AO::Relaxed }>(dst, old, new)
4127 }
4128 (SeqCst, Acquire) => {
4129 intrinsics::atomic_cxchgweak::<T, { AO::SeqCst }, { AO::Acquire }>(dst, old, new)
4130 }
4131 (SeqCst, SeqCst) => {
4132 intrinsics::atomic_cxchgweak::<T, { AO::SeqCst }, { AO::SeqCst }>(dst, old, new)
4133 }
4134 (_, AcqRel) => panic!("there is no such thing as an acquire-release failure ordering"),
4135 (_, Release) => panic!("there is no such thing as a release failure ordering"),
4136 }
4137 };
4138 if ok { Ok(val) } else { Err(val) }
4139}
4140
4141#[inline]
4142#[cfg(target_has_atomic)]
4143#[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
4144unsafe fn atomic_and<T: Copy, U: Copy>(dst: *mut T, val: U, order: Ordering) -> T {
4145 // SAFETY: the caller must uphold the safety contract for `atomic_and`
4146 unsafe {
4147 match order {
4148 Relaxed => intrinsics::atomic_and::<T, U, { AO::Relaxed }>(dst, val),
4149 Acquire => intrinsics::atomic_and::<T, U, { AO::Acquire }>(dst, val),
4150 Release => intrinsics::atomic_and::<T, U, { AO::Release }>(dst, val),
4151 AcqRel => intrinsics::atomic_and::<T, U, { AO::AcqRel }>(dst, val),
4152 SeqCst => intrinsics::atomic_and::<T, U, { AO::SeqCst }>(dst, val),
4153 }
4154 }
4155}
4156
4157#[inline]
4158#[cfg(target_has_atomic)]
4159#[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
4160unsafe fn atomic_nand<T: Copy, U: Copy>(dst: *mut T, val: U, order: Ordering) -> T {
4161 // SAFETY: the caller must uphold the safety contract for `atomic_nand`
4162 unsafe {
4163 match order {
4164 Relaxed => intrinsics::atomic_nand::<T, U, { AO::Relaxed }>(dst, val),
4165 Acquire => intrinsics::atomic_nand::<T, U, { AO::Acquire }>(dst, val),
4166 Release => intrinsics::atomic_nand::<T, U, { AO::Release }>(dst, val),
4167 AcqRel => intrinsics::atomic_nand::<T, U, { AO::AcqRel }>(dst, val),
4168 SeqCst => intrinsics::atomic_nand::<T, U, { AO::SeqCst }>(dst, val),
4169 }
4170 }
4171}
4172
4173#[inline]
4174#[cfg(target_has_atomic)]
4175#[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
4176unsafe fn atomic_or<T: Copy, U: Copy>(dst: *mut T, val: U, order: Ordering) -> T {
4177 // SAFETY: the caller must uphold the safety contract for `atomic_or`
4178 unsafe {
4179 match order {
4180 SeqCst => intrinsics::atomic_or::<T, U, { AO::SeqCst }>(dst, val),
4181 Acquire => intrinsics::atomic_or::<T, U, { AO::Acquire }>(dst, val),
4182 Release => intrinsics::atomic_or::<T, U, { AO::Release }>(dst, val),
4183 AcqRel => intrinsics::atomic_or::<T, U, { AO::AcqRel }>(dst, val),
4184 Relaxed => intrinsics::atomic_or::<T, U, { AO::Relaxed }>(dst, val),
4185 }
4186 }
4187}
4188
4189#[inline]
4190#[cfg(target_has_atomic)]
4191#[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
4192unsafe fn atomic_xor<T: Copy, U: Copy>(dst: *mut T, val: U, order: Ordering) -> T {
4193 // SAFETY: the caller must uphold the safety contract for `atomic_xor`
4194 unsafe {
4195 match order {
4196 SeqCst => intrinsics::atomic_xor::<T, U, { AO::SeqCst }>(dst, val),
4197 Acquire => intrinsics::atomic_xor::<T, U, { AO::Acquire }>(dst, val),
4198 Release => intrinsics::atomic_xor::<T, U, { AO::Release }>(dst, val),
4199 AcqRel => intrinsics::atomic_xor::<T, U, { AO::AcqRel }>(dst, val),
4200 Relaxed => intrinsics::atomic_xor::<T, U, { AO::Relaxed }>(dst, val),
4201 }
4202 }
4203}
4204
4205/// Updates `*dst` to the max value of `val` and the old value (signed comparison)
4206#[inline]
4207#[cfg(target_has_atomic)]
4208#[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
4209unsafe fn atomic_max<T: Copy>(dst: *mut T, val: T, order: Ordering) -> T {
4210 // SAFETY: the caller must uphold the safety contract for `atomic_max`
4211 unsafe {
4212 match order {
4213 Relaxed => intrinsics::atomic_max::<T, { AO::Relaxed }>(dst, val),
4214 Acquire => intrinsics::atomic_max::<T, { AO::Acquire }>(dst, val),
4215 Release => intrinsics::atomic_max::<T, { AO::Release }>(dst, val),
4216 AcqRel => intrinsics::atomic_max::<T, { AO::AcqRel }>(dst, val),
4217 SeqCst => intrinsics::atomic_max::<T, { AO::SeqCst }>(dst, val),
4218 }
4219 }
4220}
4221
4222/// Updates `*dst` to the min value of `val` and the old value (signed comparison)
4223#[inline]
4224#[cfg(target_has_atomic)]
4225#[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
4226unsafe fn atomic_min<T: Copy>(dst: *mut T, val: T, order: Ordering) -> T {
4227 // SAFETY: the caller must uphold the safety contract for `atomic_min`
4228 unsafe {
4229 match order {
4230 Relaxed => intrinsics::atomic_min::<T, { AO::Relaxed }>(dst, val),
4231 Acquire => intrinsics::atomic_min::<T, { AO::Acquire }>(dst, val),
4232 Release => intrinsics::atomic_min::<T, { AO::Release }>(dst, val),
4233 AcqRel => intrinsics::atomic_min::<T, { AO::AcqRel }>(dst, val),
4234 SeqCst => intrinsics::atomic_min::<T, { AO::SeqCst }>(dst, val),
4235 }
4236 }
4237}
4238
4239/// Updates `*dst` to the max value of `val` and the old value (unsigned comparison)
4240#[inline]
4241#[cfg(target_has_atomic)]
4242#[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
4243unsafe fn atomic_umax<T: Copy>(dst: *mut T, val: T, order: Ordering) -> T {
4244 // SAFETY: the caller must uphold the safety contract for `atomic_umax`
4245 unsafe {
4246 match order {
4247 Relaxed => intrinsics::atomic_umax::<T, { AO::Relaxed }>(dst, val),
4248 Acquire => intrinsics::atomic_umax::<T, { AO::Acquire }>(dst, val),
4249 Release => intrinsics::atomic_umax::<T, { AO::Release }>(dst, val),
4250 AcqRel => intrinsics::atomic_umax::<T, { AO::AcqRel }>(dst, val),
4251 SeqCst => intrinsics::atomic_umax::<T, { AO::SeqCst }>(dst, val),
4252 }
4253 }
4254}
4255
4256/// Updates `*dst` to the min value of `val` and the old value (unsigned comparison)
4257#[inline]
4258#[cfg(target_has_atomic)]
4259#[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
4260unsafe fn atomic_umin<T: Copy>(dst: *mut T, val: T, order: Ordering) -> T {
4261 // SAFETY: the caller must uphold the safety contract for `atomic_umin`
4262 unsafe {
4263 match order {
4264 Relaxed => intrinsics::atomic_umin::<T, { AO::Relaxed }>(dst, val),
4265 Acquire => intrinsics::atomic_umin::<T, { AO::Acquire }>(dst, val),
4266 Release => intrinsics::atomic_umin::<T, { AO::Release }>(dst, val),
4267 AcqRel => intrinsics::atomic_umin::<T, { AO::AcqRel }>(dst, val),
4268 SeqCst => intrinsics::atomic_umin::<T, { AO::SeqCst }>(dst, val),
4269 }
4270 }
4271}
4272
4273/// An atomic fence.
4274///
4275/// Fences create synchronization between themselves and atomic operations or fences in other
4276/// threads. To achieve this, a fence prevents the compiler and CPU from reordering certain types of
4277/// memory operations around it.
4278///
4279/// A fence 'A' which has (at least) [`Release`] ordering semantics, synchronizes
4280/// with a fence 'B' with (at least) [`Acquire`] semantics, if and only if there
4281/// exist operations X and Y, both operating on some atomic object 'm' such
4282/// that A is sequenced before X, Y is sequenced before B and Y observes
4283/// the change to m. This provides a happens-before dependence between A and B.
4284///
4285/// ```text
4286/// Thread 1 Thread 2
4287///
4288/// fence(Release); A --------------
4289/// m.store(3, Relaxed); X --------- |
4290/// | |
4291/// | |
4292/// -------------> Y if m.load(Relaxed) == 3 {
4293/// |-------> B fence(Acquire);
4294/// ...
4295/// }
4296/// ```
4297///
4298/// Note that in the example above, it is crucial that the accesses to `m` are atomic. Fences cannot
4299/// be used to establish synchronization among non-atomic accesses in different threads. However,
4300/// thanks to the happens-before relationship between A and B, any non-atomic accesses that
4301/// happen-before A are now also properly synchronized with any non-atomic accesses that
4302/// happen-after B.
4303///
4304/// Atomic operations with [`Release`] or [`Acquire`] semantics can also synchronize
4305/// with a fence.
4306///
4307/// A fence which has [`SeqCst`] ordering, in addition to having both [`Acquire`]
4308/// and [`Release`] semantics, participates in the global program order of the
4309/// other [`SeqCst`] operations and/or fences.
4310///
4311/// Accepts [`Acquire`], [`Release`], [`AcqRel`] and [`SeqCst`] orderings.
4312///
4313/// # Panics
4314///
4315/// Panics if `order` is [`Relaxed`].
4316///
4317/// # Examples
4318///
4319/// ```
4320/// use std::sync::atomic::AtomicBool;
4321/// use std::sync::atomic::fence;
4322/// use std::sync::atomic::Ordering;
4323///
4324/// // A mutual exclusion primitive based on spinlock.
4325/// pub struct Mutex {
4326/// flag: AtomicBool,
4327/// }
4328///
4329/// impl Mutex {
4330/// pub fn new() -> Mutex {
4331/// Mutex {
4332/// flag: AtomicBool::new(false),
4333/// }
4334/// }
4335///
4336/// pub fn lock(&self) {
4337/// // Wait until the old value is `false`.
4338/// while self
4339/// .flag
4340/// .compare_exchange_weak(false, true, Ordering::Relaxed, Ordering::Relaxed)
4341/// .is_err()
4342/// {}
4343/// // This fence synchronizes-with store in `unlock`.
4344/// fence(Ordering::Acquire);
4345/// }
4346///
4347/// pub fn unlock(&self) {
4348/// self.flag.store(false, Ordering::Release);
4349/// }
4350/// }
4351/// ```
4352#[inline]
4353#[stable(feature = "rust1", since = "1.0.0")]
4354#[rustc_diagnostic_item = "fence"]
4355#[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
4356pub fn fence(order: Ordering) {
4357 // SAFETY: using an atomic fence is safe.
4358 unsafe {
4359 match order {
4360 Acquire => intrinsics::atomic_fence::<{ AO::Acquire }>(),
4361 Release => intrinsics::atomic_fence::<{ AO::Release }>(),
4362 AcqRel => intrinsics::atomic_fence::<{ AO::AcqRel }>(),
4363 SeqCst => intrinsics::atomic_fence::<{ AO::SeqCst }>(),
4364 Relaxed => panic!("there is no such thing as a relaxed fence"),
4365 }
4366 }
4367}
4368
4369/// A "compiler-only" atomic fence.
4370///
4371/// Like [`fence`], this function establishes synchronization with other atomic operations and
4372/// fences. However, unlike [`fence`], `compiler_fence` only establishes synchronization with
4373/// operations *in the same thread*. This may at first sound rather useless, since code within a
4374/// thread is typically already totally ordered and does not need any further synchronization.
4375/// However, there are cases where code can run on the same thread without being ordered:
4376/// - The most common case is that of a *signal handler*: a signal handler runs in the same thread
4377/// as the code it interrupted, but it is not ordered with respect to that code. `compiler_fence`
4378/// can be used to establish synchronization between a thread and its signal handler, the same way
4379/// that `fence` can be used to establish synchronization across threads.
4380/// - Similar situations can arise in embedded programming with interrupt handlers, or in custom
4381/// implementations of preemptive green threads. In general, `compiler_fence` can establish
4382/// synchronization with code that is guaranteed to run on the same hardware CPU.
4383///
4384/// See [`fence`] for how a fence can be used to achieve synchronization. Note that just like
4385/// [`fence`], synchronization still requires atomic operations to be used in both threads -- it is
4386/// not possible to perform synchronization entirely with fences and non-atomic operations.
4387///
4388/// `compiler_fence` does not emit any machine code, but restricts the kinds of memory re-ordering
4389/// the compiler is allowed to do. `compiler_fence` corresponds to [`atomic_signal_fence`] in C and
4390/// C++.
4391///
4392/// [`atomic_signal_fence`]: https://en.cppreference.com/w/cpp/atomic/atomic_signal_fence
4393///
4394/// # Panics
4395///
4396/// Panics if `order` is [`Relaxed`].
4397///
4398/// # Examples
4399///
4400/// Without the two `compiler_fence` calls, the read of `IMPORTANT_VARIABLE` in `signal_handler`
4401/// is *undefined behavior* due to a data race, despite everything happening in a single thread.
4402/// This is because the signal handler is considered to run concurrently with its associated
4403/// thread, and explicit synchronization is required to pass data between a thread and its
4404/// signal handler. The code below uses two `compiler_fence` calls to establish the usual
4405/// release-acquire synchronization pattern (see [`fence`] for an image).
4406///
4407/// ```
4408/// use std::sync::atomic::AtomicBool;
4409/// use std::sync::atomic::Ordering;
4410/// use std::sync::atomic::compiler_fence;
4411///
4412/// static mut IMPORTANT_VARIABLE: usize = 0;
4413/// static IS_READY: AtomicBool = AtomicBool::new(false);
4414///
4415/// fn main() {
4416/// unsafe { IMPORTANT_VARIABLE = 42 };
4417/// // Marks earlier writes as being released with future relaxed stores.
4418/// compiler_fence(Ordering::Release);
4419/// IS_READY.store(true, Ordering::Relaxed);
4420/// }
4421///
4422/// fn signal_handler() {
4423/// if IS_READY.load(Ordering::Relaxed) {
4424/// // Acquires writes that were released with relaxed stores that we read from.
4425/// compiler_fence(Ordering::Acquire);
4426/// assert_eq!(unsafe { IMPORTANT_VARIABLE }, 42);
4427/// }
4428/// }
4429/// ```
4430#[inline]
4431#[stable(feature = "compiler_fences", since = "1.21.0")]
4432#[rustc_diagnostic_item = "compiler_fence"]
4433#[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces
4434pub fn compiler_fence(order: Ordering) {
4435 // SAFETY: using an atomic fence is safe.
4436 unsafe {
4437 match order {
4438 Acquire => intrinsics::atomic_singlethreadfence::<{ AO::Acquire }>(),
4439 Release => intrinsics::atomic_singlethreadfence::<{ AO::Release }>(),
4440 AcqRel => intrinsics::atomic_singlethreadfence::<{ AO::AcqRel }>(),
4441 SeqCst => intrinsics::atomic_singlethreadfence::<{ AO::SeqCst }>(),
4442 Relaxed => panic!("there is no such thing as a relaxed fence"),
4443 }
4444 }
4445}
4446
4447#[cfg(target_has_atomic_load_store = "8")]
4448#[stable(feature = "atomic_debug", since = "1.3.0")]
4449impl fmt::Debug for AtomicBool {
4450 fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
4451 fmt::Debug::fmt(&self.load(Ordering::Relaxed), f)
4452 }
4453}
4454
4455#[cfg(target_has_atomic_load_store = "ptr")]
4456#[stable(feature = "atomic_debug", since = "1.3.0")]
4457impl<T> fmt::Debug for AtomicPtr<T> {
4458 fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
4459 fmt::Debug::fmt(&self.load(Ordering::Relaxed), f)
4460 }
4461}
4462
4463#[cfg(target_has_atomic_load_store = "ptr")]
4464#[stable(feature = "atomic_pointer", since = "1.24.0")]
4465impl<T> fmt::Pointer for AtomicPtr<T> {
4466 fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
4467 fmt::Pointer::fmt(&self.load(Ordering::Relaxed), f)
4468 }
4469}
4470
4471/// Signals the processor that it is inside a busy-wait spin-loop ("spin lock").
4472///
4473/// This function is deprecated in favor of [`hint::spin_loop`].
4474///
4475/// [`hint::spin_loop`]: crate::hint::spin_loop
4476#[inline]
4477#[stable(feature = "spin_loop_hint", since = "1.24.0")]
4478#[deprecated(since = "1.51.0", note = "use hint::spin_loop instead")]
4479pub fn spin_loop_hint() {
4480 spin_loop()
4481}