LLVM 22.0.0git
AArch64ELFObjectWriter.cpp
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1//===-- AArch64ELFObjectWriter.cpp - AArch64 ELF Writer -------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file handles ELF-specific object emission, converting LLVM's internal
10// fixups into the appropriate relocations.
11//
12//===----------------------------------------------------------------------===//
13
18#include "llvm/MC/MCContext.h"
20#include "llvm/MC/MCFixup.h"
22#include "llvm/MC/MCSymbolELF.h"
23#include "llvm/MC/MCValue.h"
25#include <cassert>
26#include <cstdint>
27
28using namespace llvm;
29
30namespace {
31
32class AArch64ELFObjectWriter : public MCELFObjectTargetWriter {
33public:
34 AArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32);
35
36 ~AArch64ELFObjectWriter() override = default;
37
38protected:
39 unsigned getRelocType(const MCFixup &, const MCValue &,
40 bool IsPCRel) const override;
41 bool needsRelocateWithSymbol(const MCValue &, unsigned Type) const override;
42 bool isNonILP32reloc(const MCFixup &Fixup, AArch64::Specifier RefKind) const;
43 void sortRelocs(std::vector<ELFRelocationEntry> &Relocs) override;
44
45 bool IsILP32;
46};
47
48} // end anonymous namespace
49
50AArch64ELFObjectWriter::AArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32)
51 : MCELFObjectTargetWriter(/*Is64Bit*/ !IsILP32, OSABI, ELF::EM_AARCH64,
52 /*HasRelocationAddend*/ true),
53 IsILP32(IsILP32) {}
54
55#define R_CLS(rtype) \
56 IsILP32 ? ELF::R_AARCH64_P32_##rtype : ELF::R_AARCH64_##rtype
57
58// assumes IsILP32 is true
59bool AArch64ELFObjectWriter::isNonILP32reloc(const MCFixup &Fixup,
60 AArch64::Specifier RefKind) const {
61 if (Fixup.getKind() != AArch64::fixup_aarch64_movw)
62 return false;
63 switch (RefKind) {
76 reportError(Fixup.getLoc(),
77 "absolute MOV relocation is not supported in ILP32");
78 return true;
79 default:
80 return false;
81 }
82 return false;
83}
84
85unsigned AArch64ELFObjectWriter::getRelocType(const MCFixup &Fixup,
86 const MCValue &Target,
87 bool IsPCRel) const {
88 auto Kind = Fixup.getKind();
89 AArch64::Specifier RefKind =
90 static_cast<AArch64::Specifier>(Target.getSpecifier());
92 bool IsNC = AArch64::isNotChecked(RefKind);
93
94 switch (SymLoc) {
100 if (auto *SA = const_cast<MCSymbol *>(Target.getAddSym()))
101 static_cast<MCSymbolELF *>(SA)->setType(ELF::STT_TLS);
102 break;
103 default:
104 break;
105 }
106
107 // Extract the relocation type from the fixup kind, after applying STT_TLS as
108 // needed.
109 if (mc::isRelocation(Fixup.getKind()))
110 return Kind;
111
112 if (IsPCRel) {
113 switch (Kind) {
114 case FK_Data_1:
115 reportError(Fixup.getLoc(), "1-byte data relocations not supported");
116 return ELF::R_AARCH64_NONE;
117 case FK_Data_2:
118 return R_CLS(PREL16);
119 case FK_Data_4: {
120 return Target.getSpecifier() == AArch64::S_PLT ? R_CLS(PLT32)
121 : R_CLS(PREL32);
122 }
123 case FK_Data_8:
124 if (IsILP32) {
125 reportError(Fixup.getLoc(), "8 byte PC relative data "
126 "relocation is not supported in ILP32");
127 return ELF::R_AARCH64_NONE;
128 }
129 return ELF::R_AARCH64_PREL64;
131 if (SymLoc == AArch64::S_GOT_AUTH) {
132 if (IsILP32) {
133 reportError(Fixup.getLoc(),
134 "ADR AUTH relocation is not supported in ILP32");
135 return ELF::R_AARCH64_NONE;
136 }
137 return ELF::R_AARCH64_AUTH_GOT_ADR_PREL_LO21;
138 }
139 if (SymLoc != AArch64::S_ABS)
140 reportError(Fixup.getLoc(), "invalid symbol kind for ADR relocation");
141 return R_CLS(ADR_PREL_LO21);
143 if (SymLoc == AArch64::S_ABS && !IsNC)
144 return R_CLS(ADR_PREL_PG_HI21);
145 if (SymLoc == AArch64::S_ABS && IsNC) {
146 if (IsILP32) {
147 reportError(Fixup.getLoc(),
148 "invalid fixup for 32-bit pcrel ADRP instruction "
149 "VK_ABS VK_NC");
150 return ELF::R_AARCH64_NONE;
151 }
152 return ELF::R_AARCH64_ADR_PREL_PG_HI21_NC;
153 }
154 if (SymLoc == AArch64::S_GOT && !IsNC)
155 return R_CLS(ADR_GOT_PAGE);
156 if (SymLoc == AArch64::S_GOT_AUTH && !IsNC) {
157 if (IsILP32) {
158 reportError(Fixup.getLoc(),
159 "ADRP AUTH relocation is not supported in ILP32");
160 return ELF::R_AARCH64_NONE;
161 }
162 return ELF::R_AARCH64_AUTH_ADR_GOT_PAGE;
163 }
164 if (SymLoc == AArch64::S_GOTTPREL && !IsNC)
165 return R_CLS(TLSIE_ADR_GOTTPREL_PAGE21);
166 if (SymLoc == AArch64::S_TLSDESC && !IsNC)
167 return R_CLS(TLSDESC_ADR_PAGE21);
168 if (SymLoc == AArch64::S_TLSDESC_AUTH && !IsNC) {
169 if (IsILP32) {
170 reportError(Fixup.getLoc(),
171 "ADRP AUTH relocation is not supported in ILP32");
172 return ELF::R_AARCH64_NONE;
173 }
174 return ELF::R_AARCH64_AUTH_TLSDESC_ADR_PAGE21;
175 }
176 reportError(Fixup.getLoc(), "invalid symbol kind for ADRP relocation");
177 return ELF::R_AARCH64_NONE;
179 return R_CLS(JUMP26);
181 return R_CLS(CALL26);
183 if (SymLoc == AArch64::S_GOTTPREL)
184 return R_CLS(TLSIE_LD_GOTTPREL_PREL19);
185 if (SymLoc == AArch64::S_GOT)
186 return R_CLS(GOT_LD_PREL19);
187 if (SymLoc == AArch64::S_GOT_AUTH) {
188 if (IsILP32) {
189 reportError(Fixup.getLoc(),
190 "LDR AUTH relocation is not supported in ILP32");
191 return ELF::R_AARCH64_NONE;
192 }
193 return ELF::R_AARCH64_AUTH_GOT_LD_PREL19;
194 }
195 return R_CLS(LD_PREL_LO19);
197 return R_CLS(TSTBR14);
199 reportError(Fixup.getLoc(),
200 "relocation of PAC/AUT instructions is not supported");
201 return ELF::R_AARCH64_NONE;
204 Fixup.getLoc(),
205 "relocation of compare-and-branch instructions not supported");
206 return ELF::R_AARCH64_NONE;
208 return R_CLS(CONDBR19);
209 default:
210 reportError(Fixup.getLoc(), "Unsupported pc-relative fixup kind");
211 return ELF::R_AARCH64_NONE;
212 }
213 } else {
214 if (IsILP32 && isNonILP32reloc(Fixup, RefKind))
215 return ELF::R_AARCH64_NONE;
216 switch (Fixup.getKind()) {
217 case FK_Data_1:
218 reportError(Fixup.getLoc(), "1-byte data relocations not supported");
219 return ELF::R_AARCH64_NONE;
220 case FK_Data_2:
221 return R_CLS(ABS16);
222 case FK_Data_4:
223 return (!IsILP32 && Target.getSpecifier() == AArch64::S_GOTPCREL)
224 ? ELF::R_AARCH64_GOTPCREL32
225 : R_CLS(ABS32);
226 case FK_Data_8: {
227 if (IsILP32) {
229 Fixup.getLoc(),
230 "8 byte absolute data relocation is not supported in ILP32");
231 return ELF::R_AARCH64_NONE;
232 }
233 if (RefKind == AArch64::S_AUTH || RefKind == AArch64::S_AUTHADDR)
234 return ELF::R_AARCH64_AUTH_ABS64;
235 return ELF::R_AARCH64_ABS64;
236 }
238 if (RefKind == AArch64::S_DTPREL_HI12)
239 return R_CLS(TLSLD_ADD_DTPREL_HI12);
240 if (RefKind == AArch64::S_TPREL_HI12)
241 return R_CLS(TLSLE_ADD_TPREL_HI12);
242 if (RefKind == AArch64::S_DTPREL_LO12_NC)
243 return R_CLS(TLSLD_ADD_DTPREL_LO12_NC);
244 if (RefKind == AArch64::S_DTPREL_LO12)
245 return R_CLS(TLSLD_ADD_DTPREL_LO12);
246 if (RefKind == AArch64::S_TPREL_LO12_NC)
247 return R_CLS(TLSLE_ADD_TPREL_LO12_NC);
248 if (RefKind == AArch64::S_TPREL_LO12)
249 return R_CLS(TLSLE_ADD_TPREL_LO12);
250 if (RefKind == AArch64::S_TLSDESC_LO12)
251 return R_CLS(TLSDESC_ADD_LO12);
252 if (RefKind == AArch64::S_TLSDESC_AUTH_LO12) {
253 if (IsILP32) {
254 reportError(Fixup.getLoc(),
255 "ADD AUTH relocation is not supported in ILP32");
256 return ELF::R_AARCH64_NONE;
257 }
258 return ELF::R_AARCH64_AUTH_TLSDESC_ADD_LO12;
259 }
260 if (RefKind == AArch64::S_GOT_AUTH_LO12 && IsNC) {
261 if (IsILP32) {
262 reportError(Fixup.getLoc(),
263 "ADD AUTH relocation is not supported in ILP32");
264 return ELF::R_AARCH64_NONE;
265 }
266 return ELF::R_AARCH64_AUTH_GOT_ADD_LO12_NC;
267 }
268 if (SymLoc == AArch64::S_ABS && IsNC)
269 return R_CLS(ADD_ABS_LO12_NC);
270
271 reportError(Fixup.getLoc(), "invalid fixup for add (uimm12) instruction");
272 return ELF::R_AARCH64_NONE;
274 if (SymLoc == AArch64::S_ABS && IsNC)
275 return R_CLS(LDST8_ABS_LO12_NC);
276 if (SymLoc == AArch64::S_DTPREL && !IsNC)
277 return R_CLS(TLSLD_LDST8_DTPREL_LO12);
278 if (SymLoc == AArch64::S_DTPREL && IsNC)
279 return R_CLS(TLSLD_LDST8_DTPREL_LO12_NC);
280 if (SymLoc == AArch64::S_TPREL && !IsNC)
281 return R_CLS(TLSLE_LDST8_TPREL_LO12);
282 if (SymLoc == AArch64::S_TPREL && IsNC)
283 return R_CLS(TLSLE_LDST8_TPREL_LO12_NC);
284
285 reportError(Fixup.getLoc(),
286 "invalid fixup for 8-bit load/store instruction");
287 return ELF::R_AARCH64_NONE;
289 if (SymLoc == AArch64::S_ABS && IsNC)
290 return R_CLS(LDST16_ABS_LO12_NC);
291 if (SymLoc == AArch64::S_DTPREL && !IsNC)
292 return R_CLS(TLSLD_LDST16_DTPREL_LO12);
293 if (SymLoc == AArch64::S_DTPREL && IsNC)
294 return R_CLS(TLSLD_LDST16_DTPREL_LO12_NC);
295 if (SymLoc == AArch64::S_TPREL && !IsNC)
296 return R_CLS(TLSLE_LDST16_TPREL_LO12);
297 if (SymLoc == AArch64::S_TPREL && IsNC)
298 return R_CLS(TLSLE_LDST16_TPREL_LO12_NC);
299
300 reportError(Fixup.getLoc(),
301 "invalid fixup for 16-bit load/store instruction");
302 return ELF::R_AARCH64_NONE;
304 if (SymLoc == AArch64::S_ABS && IsNC)
305 return R_CLS(LDST32_ABS_LO12_NC);
306 if (SymLoc == AArch64::S_DTPREL && !IsNC)
307 return R_CLS(TLSLD_LDST32_DTPREL_LO12);
308 if (SymLoc == AArch64::S_DTPREL && IsNC)
309 return R_CLS(TLSLD_LDST32_DTPREL_LO12_NC);
310 if (SymLoc == AArch64::S_TPREL && !IsNC)
311 return R_CLS(TLSLE_LDST32_TPREL_LO12);
312 if (SymLoc == AArch64::S_TPREL && IsNC)
313 return R_CLS(TLSLE_LDST32_TPREL_LO12_NC);
314 if (SymLoc == AArch64::S_GOT && IsNC) {
315 if (IsILP32)
316 return ELF::R_AARCH64_P32_LD32_GOT_LO12_NC;
317 reportError(Fixup.getLoc(), "4 byte unchecked GOT load/store "
318 "relocation is not supported in LP64");
319 return ELF::R_AARCH64_NONE;
320 }
321 if (SymLoc == AArch64::S_GOT && !IsNC) {
322 if (IsILP32) {
324 Fixup.getLoc(),
325 "4 byte checked GOT load/store relocation is not supported");
326 }
327 return ELF::R_AARCH64_NONE;
328 }
329 if (SymLoc == AArch64::S_GOTTPREL && IsNC) {
330 if (IsILP32)
331 return ELF::R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC;
332 reportError(Fixup.getLoc(), "32-bit load/store "
333 "relocation is not supported in LP64");
334 return ELF::R_AARCH64_NONE;
335 }
336 if (SymLoc == AArch64::S_TLSDESC && !IsNC) {
337 if (IsILP32)
338 return ELF::R_AARCH64_P32_TLSDESC_LD32_LO12;
340 Fixup.getLoc(),
341 "4 byte TLSDESC load/store relocation is not supported in LP64");
342 return ELF::R_AARCH64_NONE;
343 }
344
345 reportError(Fixup.getLoc(),
346 "invalid fixup for 32-bit load/store instruction "
347 "fixup_aarch64_ldst_imm12_scale4");
348 return ELF::R_AARCH64_NONE;
350 if (SymLoc == AArch64::S_ABS && IsNC)
351 return R_CLS(LDST64_ABS_LO12_NC);
352 if ((SymLoc == AArch64::S_GOT || SymLoc == AArch64::S_GOT_AUTH) && IsNC) {
353 AArch64::Specifier AddressLoc = AArch64::getAddressFrag(RefKind);
354 bool IsAuth = (SymLoc == AArch64::S_GOT_AUTH);
355 if (!IsILP32) {
356 if (AddressLoc == AArch64::S_LO15)
357 return ELF::R_AARCH64_LD64_GOTPAGE_LO15;
358 return (IsAuth ? ELF::R_AARCH64_AUTH_LD64_GOT_LO12_NC
359 : ELF::R_AARCH64_LD64_GOT_LO12_NC);
360 }
361 reportError(Fixup.getLoc(),
362 "64-bit load/store relocation is not supported in ILP32");
363 return ELF::R_AARCH64_NONE;
364 }
365 if (SymLoc == AArch64::S_DTPREL && !IsNC)
366 return R_CLS(TLSLD_LDST64_DTPREL_LO12);
367 if (SymLoc == AArch64::S_DTPREL && IsNC)
368 return R_CLS(TLSLD_LDST64_DTPREL_LO12_NC);
369 if (SymLoc == AArch64::S_TPREL && !IsNC)
370 return R_CLS(TLSLE_LDST64_TPREL_LO12);
371 if (SymLoc == AArch64::S_TPREL && IsNC)
372 return R_CLS(TLSLE_LDST64_TPREL_LO12_NC);
373 if (SymLoc == AArch64::S_GOTTPREL && IsNC) {
374 if (!IsILP32)
375 return ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC;
376 reportError(Fixup.getLoc(),
377 "64-bit load/store relocation is not supported in ILP32");
378 return ELF::R_AARCH64_NONE;
379 }
380 if (SymLoc == AArch64::S_TLSDESC) {
381 if (!IsILP32)
382 return ELF::R_AARCH64_TLSDESC_LD64_LO12;
383 reportError(Fixup.getLoc(),
384 "64-bit load/store relocation is not supported in ILP32");
385 return ELF::R_AARCH64_NONE;
386 }
387 if (SymLoc == AArch64::S_TLSDESC_AUTH) {
388 if (!IsILP32)
389 return ELF::R_AARCH64_AUTH_TLSDESC_LD64_LO12;
391 Fixup.getLoc(),
392 "64-bit load/store AUTH relocation is not supported in ILP32");
393 return ELF::R_AARCH64_NONE;
394 }
395 reportError(Fixup.getLoc(),
396 "invalid fixup for 64-bit load/store instruction");
397 return ELF::R_AARCH64_NONE;
399 if (SymLoc == AArch64::S_ABS && IsNC)
400 return R_CLS(LDST128_ABS_LO12_NC);
401 if (SymLoc == AArch64::S_DTPREL && !IsNC)
402 return R_CLS(TLSLD_LDST128_DTPREL_LO12);
403 if (SymLoc == AArch64::S_DTPREL && IsNC)
404 return R_CLS(TLSLD_LDST128_DTPREL_LO12_NC);
405 if (SymLoc == AArch64::S_TPREL && !IsNC)
406 return R_CLS(TLSLE_LDST128_TPREL_LO12);
407 if (SymLoc == AArch64::S_TPREL && IsNC)
408 return R_CLS(TLSLE_LDST128_TPREL_LO12_NC);
409
410 reportError(Fixup.getLoc(),
411 "invalid fixup for 128-bit load/store instruction");
412 return ELF::R_AARCH64_NONE;
413 // ILP32 case not reached here, tested with isNonILP32reloc
415 if (RefKind == AArch64::S_ABS_G3)
416 return ELF::R_AARCH64_MOVW_UABS_G3;
417 if (RefKind == AArch64::S_ABS_G2)
418 return ELF::R_AARCH64_MOVW_UABS_G2;
419 if (RefKind == AArch64::S_ABS_G2_S)
420 return ELF::R_AARCH64_MOVW_SABS_G2;
421 if (RefKind == AArch64::S_ABS_G2_NC)
422 return ELF::R_AARCH64_MOVW_UABS_G2_NC;
423 if (RefKind == AArch64::S_ABS_G1)
424 return R_CLS(MOVW_UABS_G1);
425 if (RefKind == AArch64::S_ABS_G1_S)
426 return ELF::R_AARCH64_MOVW_SABS_G1;
427 if (RefKind == AArch64::S_ABS_G1_NC)
428 return ELF::R_AARCH64_MOVW_UABS_G1_NC;
429 if (RefKind == AArch64::S_ABS_G0)
430 return R_CLS(MOVW_UABS_G0);
431 if (RefKind == AArch64::S_ABS_G0_S)
432 return R_CLS(MOVW_SABS_G0);
433 if (RefKind == AArch64::S_ABS_G0_NC)
434 return R_CLS(MOVW_UABS_G0_NC);
435 if (RefKind == AArch64::S_PREL_G3)
436 return ELF::R_AARCH64_MOVW_PREL_G3;
437 if (RefKind == AArch64::S_PREL_G2)
438 return ELF::R_AARCH64_MOVW_PREL_G2;
439 if (RefKind == AArch64::S_PREL_G2_NC)
440 return ELF::R_AARCH64_MOVW_PREL_G2_NC;
441 if (RefKind == AArch64::S_PREL_G1)
442 return R_CLS(MOVW_PREL_G1);
443 if (RefKind == AArch64::S_PREL_G1_NC)
444 return ELF::R_AARCH64_MOVW_PREL_G1_NC;
445 if (RefKind == AArch64::S_PREL_G0)
446 return R_CLS(MOVW_PREL_G0);
447 if (RefKind == AArch64::S_PREL_G0_NC)
448 return R_CLS(MOVW_PREL_G0_NC);
449 if (RefKind == AArch64::S_DTPREL_G2)
450 return ELF::R_AARCH64_TLSLD_MOVW_DTPREL_G2;
451 if (RefKind == AArch64::S_DTPREL_G1)
452 return R_CLS(TLSLD_MOVW_DTPREL_G1);
453 if (RefKind == AArch64::S_DTPREL_G1_NC)
454 return ELF::R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC;
455 if (RefKind == AArch64::S_DTPREL_G0)
456 return R_CLS(TLSLD_MOVW_DTPREL_G0);
457 if (RefKind == AArch64::S_DTPREL_G0_NC)
458 return R_CLS(TLSLD_MOVW_DTPREL_G0_NC);
459 if (RefKind == AArch64::S_TPREL_G2)
460 return ELF::R_AARCH64_TLSLE_MOVW_TPREL_G2;
461 if (RefKind == AArch64::S_TPREL_G1)
462 return R_CLS(TLSLE_MOVW_TPREL_G1);
463 if (RefKind == AArch64::S_TPREL_G1_NC)
464 return ELF::R_AARCH64_TLSLE_MOVW_TPREL_G1_NC;
465 if (RefKind == AArch64::S_TPREL_G0)
466 return R_CLS(TLSLE_MOVW_TPREL_G0);
467 if (RefKind == AArch64::S_TPREL_G0_NC)
468 return R_CLS(TLSLE_MOVW_TPREL_G0_NC);
469 if (RefKind == AArch64::S_GOTTPREL_G1)
470 return ELF::R_AARCH64_TLSIE_MOVW_GOTTPREL_G1;
471 if (RefKind == AArch64::S_GOTTPREL_G0_NC)
472 return ELF::R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC;
473 reportError(Fixup.getLoc(), "invalid fixup for movz/movk instruction");
474 return ELF::R_AARCH64_NONE;
475 default:
476 reportError(Fixup.getLoc(), "Unknown ELF relocation type");
477 return ELF::R_AARCH64_NONE;
478 }
479 }
480
481 llvm_unreachable("Unimplemented fixup -> relocation");
482}
483
484bool AArch64ELFObjectWriter::needsRelocateWithSymbol(const MCValue &Val,
485 unsigned) const {
486 // For memory-tagged symbols, ensure that the relocation uses the symbol. For
487 // tagged symbols, we emit an empty relocation (R_AARCH64_NONE) in a special
488 // section (SHT_AARCH64_MEMTAG_GLOBALS_STATIC) to indicate to the linker that
489 // this global needs to be tagged. In addition, the linker needs to know
490 // whether to emit a special addend when relocating `end` symbols, and this
491 // can only be determined by the attributes of the symbol itself.
492 if (Val.getAddSym() &&
493 static_cast<const MCSymbolELF *>(Val.getAddSym())->isMemtag())
494 return true;
495
497 return true;
499 Val.getSpecifier());
500}
501
502void AArch64ELFObjectWriter::sortRelocs(
503 std::vector<ELFRelocationEntry> &Relocs) {
504 // PATCHINST relocations should be applied last because they may overwrite the
505 // whole instruction and so should take precedence over other relocations that
506 // modify operands of the original instruction.
507 std::stable_partition(Relocs.begin(), Relocs.end(),
508 [](const ELFRelocationEntry &R) {
509 return R.Type != ELF::R_AARCH64_PATCHINST;
510 });
511}
512
513std::unique_ptr<MCObjectTargetWriter>
515 return std::make_unique<AArch64ELFObjectWriter>(OSABI, IsILP32);
516}
#define R_CLS(rtype)
static Error reportError(StringRef Message)
PowerPC TLS Dynamic Call Fixup
virtual unsigned getRelocType(const MCFixup &Fixup, const MCValue &Target, bool IsPCRel) const =0
virtual bool needsRelocateWithSymbol(const MCValue &, unsigned Type) const
virtual void sortRelocs(std::vector< ELFRelocationEntry > &Relocs)
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:61
bool isMemtag() const
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:42
const MCSymbol * getAddSym() const
Definition: MCValue.h:49
uint32_t getSpecifier() const
Definition: MCValue.h:46
Target - Wrapper for Target specific information.
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Specifier getSymbolLoc(Specifier S)
@ fixup_aarch64_ldst_imm12_scale16
bool isNotChecked(Specifier S)
Specifier getAddressFrag(Specifier S)
@ EM_AARCH64
Definition: ELF.h:285
@ STT_TLS
Definition: ELF.h:1414
bool isRelocation(MCFixupKind FixupKind)
Definition: MCFixup.h:130
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ FK_Data_8
A eight-byte fixup.
Definition: MCFixup.h:37
@ FK_Data_1
A one-byte fixup.
Definition: MCFixup.h:34
@ FK_Data_4
A four-byte fixup.
Definition: MCFixup.h:36
@ FK_Data_2
A two-byte fixup.
Definition: MCFixup.h:35
bool is_contained(R &&Range, const E &Element)
Returns true if Element is found in Range.
Definition: STLExtras.h:1916
std::unique_ptr< MCObjectTargetWriter > createAArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32)