LLVM 22.0.0git
ARMDisassembler.cpp File Reference
#include "ARMBaseInstrInfo.h"
#include "MCTargetDesc/ARMAddressingModes.h"
#include "MCTargetDesc/ARMBaseInfo.h"
#include "MCTargetDesc/ARMMCTargetDesc.h"
#include "TargetInfo/ARMTargetInfo.h"
#include "Utils/ARMBaseInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDecoder.h"
#include "llvm/MC/MCDecoderOps.h"
#include "llvm/MC/MCDisassembler/MCDisassembler.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/TargetParser/SubtargetFeature.h"
#include <algorithm>
#include <cassert>
#include <cstdint>
#include <vector>
#include "ARMGenDisassemblerTables.inc"

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "arm-disassembler"

Typedefs

typedef DecodeStatus OperandDecoder(MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)

Functions

static DecodeStatus DecodeT2AddrModeImm8 (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static bool tryAddingSymbolicOperand (uint64_t Address, int32_t Value, bool isBranch, uint64_t InstSize, MCInst &MI, const MCDisassembler *Decoder)
 tryAddingSymbolicOperand - trys to add a symbolic operand in place of the immediate Value in the MCInst.
static void tryAddingPcLoadReferenceComment (uint64_t Address, int Value, const MCDisassembler *Decoder)
 tryAddingPcLoadReferenceComment - trys to add a comment as to what is being referenced by a load instruction with the base register that is the Pc.
static DecodeStatus DecodeGPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeCLRMGPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeGPRnopcRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeGPRnospRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeGPRwithAPSRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeGPRwithZRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeGPRwithZRnospRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodetGPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeGPRPairRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeGPRPairnospRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeGPRspRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodetcGPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecoderGPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeSPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeHPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static bool PermitsD32 (const MCInst &Inst, const MCDisassembler *Decoder)
static DecodeStatus DecodeDPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeDPR_8RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeSPR_8RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeDPR_VFP2RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeQPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeDPairRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeDPairSpacedRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeMQPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeMQQPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeMQQQQPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodePredicateOperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeCCOutOperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeSORegImmOperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeSORegRegOperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeRegListOperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeSPRRegListOperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeDPRRegListOperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeBitfieldMaskOperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeCopMemInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeAddrMode2IdxInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeSORegMemOperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeTSBInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeAddrMode3Instruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeRFEInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeCPSInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeQADDInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeMemMultipleWritebackInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeHINTInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeT2CPSInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeT2HintSpaceInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeT2MOVTWInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeArmMOVTWInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeSMLAInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeSETPANInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeTSTInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeAddrModeImm12Operand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeAddrMode5Operand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeAddrMode5FP16Operand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeAddrMode7Operand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeT2BInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeBranchImmInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeAddrMode6Operand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVLDInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVSTInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVLDST1Instruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVLDST2Instruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVLDST3Instruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVLDST4Instruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVLD1DupInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVLD2DupInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVLD3DupInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVLD4DupInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVMOVModImmInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeMVEModImmInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeMVEVADCInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVSHLMaxInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeShiftRight8Imm (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeShiftRight16Imm (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeShiftRight32Imm (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeShiftRight64Imm (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeTBLInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeThumbAddSpecialReg (MCInst &Inst, uint16_t Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeThumbBROperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeT2BROperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeThumbCmpBROperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeThumbAddrModeRR (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeThumbAddrModeIS (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeThumbAddrModePC (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeThumbAddrModeSP (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeT2AddrModeSOReg (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeT2LoadLabel (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeT2LoadShift (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeT2LoadImm8 (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeT2AddrModeImm12 (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeT2LoadImm12 (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeT2LoadT (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeT2Imm8S4 (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeT2Imm7S4 (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeT2AddrModeImm8s4 (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeT2AddrModeImm7s4 (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeT2AddrModeImm0_1020s4 (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeT2Imm8 (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
template<int shift>
static DecodeStatus DecodeT2Imm7 (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
template<int shift>
static DecodeStatus DecodeTAddrModeImm7 (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
template<int shift, int WriteBack>
static DecodeStatus DecodeT2AddrModeImm7 (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeT2LdStPre (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeThumbAddSPImm (MCInst &Inst, uint16_t Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeThumbAddSPReg (MCInst &Inst, uint16_t Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeThumbCPS (MCInst &Inst, uint16_t Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodePostIdxReg (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeMveAddrModeRQ (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
template<int shift>
static DecodeStatus DecodeMveAddrModeQ (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeThumbBLXOffset (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeCoprocessor (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeThumbTableBranch (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeMemBarrierOption (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeThumb2BCCInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeT2SOImm (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeThumbBCCTargetOperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeThumbBLTargetOperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeInstSyncBarrierOption (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeMSRMask (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeBankedReg (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeDoubleRegLoad (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeDoubleRegStore (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeLDRPreImm (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeLDRPreReg (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeSTRPreImm (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeSTRPreReg (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVLD1LN (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVST1LN (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVLD2LN (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVST2LN (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVLD3LN (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVST3LN (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVLD4LN (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVST4LN (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVMOVSRR (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVMOVRRS (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeIT (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeT2LDRDPreInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeT2STRDPreInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeT2Adr (MCInst &Inst, uint32_t Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeT2ShifterImmOperand (MCInst &Inst, uint32_t Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeSwap (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVCVTD (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVCVTQ (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeNEONComplexLane64Instruction (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeLDR (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecoderForMRRC2AndMCRR2 (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeForVMRSandVMSR (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
template<bool isSigned, bool isNeg, bool zeroPermitted, int size>
static DecodeStatus DecodeBFLabelOperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeBFAfterTargetOperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodePredNoALOperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeLOLoop (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeLongShiftOperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodetGPROddRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodetGPREvenRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeGPRwithAPSR_NZCVnospRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVSCCLRM (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVPTMaskOperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVpredROperand (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVpredNOperand (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeRestrictedIPredicateOperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeRestrictedSPredicateOperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeRestrictedUPredicateOperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeRestrictedFPPredicateOperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeVCVTImmOperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static unsigned FixedRegForVSTRVLDR_SYSREG (unsigned Opcode)
template<bool Writeback>
static DecodeStatus DecodeVSTRVLDR_SYSREG (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeMVE_MEM_pre (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder, unsigned Rn, OperandDecoder RnDecoder, OperandDecoder AddrDecoder)
template<int shift>
static DecodeStatus DecodeMVE_MEM_1_pre (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
template<int shift>
static DecodeStatus DecodeMVE_MEM_2_pre (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
template<int shift>
static DecodeStatus DecodeMVE_MEM_3_pre (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
template<unsigned MinLog, unsigned MaxLog>
static DecodeStatus DecodePowerTwoOperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
template<unsigned start>
static DecodeStatus DecodeMVEPairVectorIndexOperand (MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeMVEVMOVQtoDReg (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeMVEVMOVDRegtoQ (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeMVEOverlappingLongShift (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeMVEVCVTt1fp (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
template<bool scalar, OperandDecoder predicate_decoder>
static DecodeStatus DecodeMVEVCMP (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeMveVCTP (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeMVEVPNOT (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeT2AddSubSPImm (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeLazyLoadStoreMul (MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus checkDecodedInstruction (MCInst &MI, uint64_t &Size, uint64_t Address, raw_ostream &CS, uint32_t Insn, DecodeStatus Result)
static MCDisassemblercreateARMDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx)
LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARMDisassembler ()

Variables

static const uint16_t GPRDecoderTable []
static const uint16_t CLRMGPRDecoderTable []
static const uint16_t GPRPairDecoderTable []
static const MCPhysReg SPRDecoderTable []
static const MCPhysReg DPRDecoderTable []
static const MCPhysReg QPRDecoderTable []
static const MCPhysReg DPairDecoderTable []
static const MCPhysReg DPairSpacedDecoderTable []
static const MCPhysReg QQPRDecoderTable []
static const MCPhysReg QQQQPRDecoderTable []

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "arm-disassembler"

Definition at line 37 of file ARMDisassembler.cpp.

Typedef Documentation

◆ OperandDecoder

typedef DecodeStatus OperandDecoder(MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder)

Definition at line 168 of file ARMDisassembler.cpp.

Function Documentation

◆ checkDecodedInstruction()

DecodeStatus checkDecodedInstruction ( MCInst & MI,
uint64_t & Size,
uint64_t Address,
raw_ostream & CS,
uint32_t Insn,
DecodeStatus Result )
static

◆ createARMDisassembler()

MCDisassembler * createARMDisassembler ( const Target & T,
const MCSubtargetInfo & STI,
MCContext & Ctx )
static

Definition at line 6536 of file ARMDisassembler.cpp.

References T.

Referenced by LLVMInitializeARMDisassembler().

◆ DecodeAddrMode2IdxInstruction()

◆ DecodeAddrMode3Instruction()

◆ DecodeAddrMode5FP16Operand()

◆ DecodeAddrMode5Operand()

◆ DecodeAddrMode6Operand()

◆ DecodeAddrMode7Operand()

DecodeStatus DecodeAddrMode7Operand ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

Definition at line 1857 of file ARMDisassembler.cpp.

References DecodeGPRRegisterClass().

Referenced by DecodeLDR().

◆ DecodeAddrModeImm12Operand()

◆ DecodeArmMOVTWInstruction()

◆ DecodeBankedReg()

◆ DecodeBFAfterTargetOperand()

◆ DecodeBFLabelOperand()

template<bool isSigned, bool isNeg, bool zeroPermitted, int size>
DecodeStatus DecodeBFLabelOperand ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeBitfieldMaskOperand()

◆ DecodeBranchImmInstruction()

◆ DecodeCCOutOperand()

DecodeStatus DecodeCCOutOperand ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeCLRMGPRRegisterClass()

DecodeStatus DecodeCLRMGPRRegisterClass ( MCInst & Inst,
unsigned RegNo,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeCopMemInstruction()

◆ DecodeCoprocessor()

◆ DecodeCPSInstruction()

◆ DecodeDoubleRegLoad()

◆ DecodeDoubleRegStore()

◆ DecodeDPairRegisterClass()

◆ DecodeDPairSpacedRegisterClass()

◆ DecodeDPR_8RegisterClass()

DecodeStatus DecodeDPR_8RegisterClass ( MCInst & Inst,
unsigned RegNo,
uint64_t Address,
const MCDisassembler * Decoder )
static

Definition at line 479 of file ARMDisassembler.cpp.

References DecodeDPRRegisterClass(), and llvm::MCDisassembler::Fail.

◆ DecodeDPR_VFP2RegisterClass()

DecodeStatus DecodeDPR_VFP2RegisterClass ( MCInst & Inst,
unsigned RegNo,
uint64_t Address,
const MCDisassembler * Decoder )
static

Definition at line 495 of file ARMDisassembler.cpp.

References DecodeDPRRegisterClass(), and llvm::MCDisassembler::Fail.

◆ DecodeDPRRegisterClass()

◆ DecodeDPRRegListOperand()

◆ DecodeForVMRSandVMSR()

◆ DecodeGPRnopcRegisterClass()

◆ DecodeGPRnospRegisterClass()

DecodeStatus DecodeGPRnospRegisterClass ( MCInst & Inst,
unsigned RegNo,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeGPRPairnospRegisterClass()

◆ DecodeGPRPairRegisterClass()

◆ DecodeGPRRegisterClass()

DecodeStatus DecodeGPRRegisterClass ( MCInst & Inst,
unsigned RegNo,
uint64_t Address,
const MCDisassembler * Decoder )
static

Definition at line 224 of file ARMDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, GPRDecoderTable, and llvm::MCDisassembler::Success.

Referenced by DecodeAddrMode2IdxInstruction(), DecodeAddrMode3Instruction(), DecodeAddrMode5FP16Operand(), DecodeAddrMode5Operand(), DecodeAddrMode6Operand(), DecodeAddrMode7Operand(), DecodeAddrModeImm12Operand(), DecodeCopMemInstruction(), DecodeDoubleRegLoad(), DecodeDoubleRegStore(), DecodeForVMRSandVMSR(), DecodeGPRnopcRegisterClass(), DecodeGPRnospRegisterClass(), DecodeGPRwithAPSRRegisterClass(), DecodeGPRwithZRRegisterClass(), DecodeLazyLoadStoreMul(), DecodeLDRPreImm(), DecodeLDRPreReg(), DecodeMemMultipleWritebackInstruction(), DecodeMVEVMOVDRegtoQ(), DecodeMVEVMOVQtoDReg(), DecodeRegListOperand(), DecodeRFEInstruction(), DecoderGPRRegisterClass(), DecodeSORegMemOperand(), DecodeSTRPreImm(), DecodeSTRPreReg(), DecodeT2AddrModeImm12(), DecodeT2AddrModeImm8(), DecodeT2AddrModeImm8s4(), DecodeT2AddrModeSOReg(), DecodeT2LdStPre(), DecodeT2LoadImm12(), DecodeT2LoadImm8(), DecodeT2LoadLabel(), DecodeT2LoadShift(), DecodetGPRRegisterClass(), DecodeThumbAddSPReg(), DecodeThumbTableBranch(), DecodeTSTInstruction(), DecodeVLD1DupInstruction(), DecodeVLD1LN(), DecodeVLD2DupInstruction(), DecodeVLD2LN(), DecodeVLD3DupInstruction(), DecodeVLD3LN(), DecodeVLD4DupInstruction(), DecodeVLD4LN(), DecodeVLDInstruction(), DecodeVMOVRRS(), DecodeVMOVSRR(), DecodeVST1LN(), DecodeVST2LN(), DecodeVST3LN(), DecodeVST4LN(), and DecodeVSTInstruction().

◆ DecodeGPRspRegisterClass()

DecodeStatus DecodeGPRspRegisterClass ( MCInst & Inst,
unsigned RegNo,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeGPRwithAPSR_NZCVnospRegisterClass()

DecodeStatus DecodeGPRwithAPSR_NZCVnospRegisterClass ( MCInst & Inst,
unsigned RegNo,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeGPRwithAPSRRegisterClass()

DecodeStatus DecodeGPRwithAPSRRegisterClass ( MCInst & Inst,
unsigned RegNo,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeGPRwithZRnospRegisterClass()

DecodeStatus DecodeGPRwithZRnospRegisterClass ( MCInst & Inst,
unsigned RegNo,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeGPRwithZRRegisterClass()

◆ DecodeHINTInstruction()

◆ DecodeHPRRegisterClass()

DecodeStatus DecodeHPRRegisterClass ( MCInst & Inst,
unsigned RegNo,
uint64_t Address,
const MCDisassembler * Decoder )
static

Definition at line 442 of file ARMDisassembler.cpp.

References DecodeSPRRegisterClass().

◆ DecodeInstSyncBarrierOption()

DecodeStatus DecodeInstSyncBarrierOption ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeIT()

◆ DecodeLazyLoadStoreMul()

◆ DecodeLDR()

◆ DecodeLDRPreImm()

◆ DecodeLDRPreReg()

◆ DecodeLOLoop()

◆ DecodeLongShiftOperand()

DecodeStatus DecodeLongShiftOperand ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeMemBarrierOption()

DecodeStatus DecodeMemBarrierOption ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeMemMultipleWritebackInstruction()

◆ DecodeMQPRRegisterClass()

◆ DecodeMQQPRRegisterClass()

◆ DecodeMQQQQPRRegisterClass()

DecodeStatus DecodeMQQQQPRRegisterClass ( MCInst & Inst,
unsigned RegNo,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeMSRMask()

◆ DecodeMVE_MEM_1_pre()

template<int shift>
DecodeStatus DecodeMVE_MEM_1_pre ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeMVE_MEM_2_pre()

template<int shift>
DecodeStatus DecodeMVE_MEM_2_pre ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeMVE_MEM_3_pre()

template<int shift>
DecodeStatus DecodeMVE_MEM_3_pre ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeMVE_MEM_pre()

◆ DecodeMveAddrModeQ()

◆ DecodeMveAddrModeRQ()

◆ DecodeMVEModImmInstruction()

◆ DecodeMVEOverlappingLongShift()

◆ DecodeMVEPairVectorIndexOperand()

template<unsigned start>
DecodeStatus DecodeMVEPairVectorIndexOperand ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeMVEVADCInstruction()

◆ DecodeMVEVCMP()

◆ DecodeMveVCTP()

◆ DecodeMVEVCVTt1fp()

◆ DecodeMVEVMOVDRegtoQ()

◆ DecodeMVEVMOVQtoDReg()

◆ DecodeMVEVPNOT()

DecodeStatus DecodeMVEVPNOT ( MCInst & Inst,
unsigned Insn,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeNEONComplexLane64Instruction()

◆ DecodePostIdxReg()

◆ DecodePowerTwoOperand()

template<unsigned MinLog, unsigned MaxLog>
DecodeStatus DecodePowerTwoOperand ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodePredicateOperand()

◆ DecodePredNoALOperand()

◆ DecodeQADDInstruction()

◆ DecodeQPRRegisterClass()

◆ DecodeRegListOperand()

◆ DecodeRestrictedFPPredicateOperand()

◆ DecodeRestrictedIPredicateOperand()

DecodeStatus DecodeRestrictedIPredicateOperand ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeRestrictedSPredicateOperand()

◆ DecodeRestrictedUPredicateOperand()

DecodeStatus DecodeRestrictedUPredicateOperand ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeRFEInstruction()

◆ DecoderForMRRC2AndMCRR2()

◆ DecoderGPRRegisterClass()

◆ DecodeSETPANInstruction()

◆ DecodeShiftRight16Imm()

DecodeStatus DecodeShiftRight16Imm ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeShiftRight32Imm()

DecodeStatus DecodeShiftRight32Imm ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeShiftRight64Imm()

DecodeStatus DecodeShiftRight64Imm ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeShiftRight8Imm()

DecodeStatus DecodeShiftRight8Imm ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeSMLAInstruction()

◆ DecodeSORegImmOperand()

◆ DecodeSORegMemOperand()

◆ DecodeSORegRegOperand()

◆ DecodeSPR_8RegisterClass()

DecodeStatus DecodeSPR_8RegisterClass ( MCInst & Inst,
unsigned RegNo,
uint64_t Address,
const MCDisassembler * Decoder )
static

Definition at line 487 of file ARMDisassembler.cpp.

References DecodeSPRRegisterClass(), and llvm::MCDisassembler::Fail.

◆ DecodeSPRRegisterClass()

◆ DecodeSPRRegListOperand()

◆ DecodeSTRPreImm()

◆ DecodeSTRPreReg()

◆ DecodeSwap()

◆ DecodeT2AddrModeImm0_1020s4()

◆ DecodeT2AddrModeImm12()

◆ DecodeT2AddrModeImm7()

template<int shift, int WriteBack>
DecodeStatus DecodeT2AddrModeImm7 ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeT2AddrModeImm7s4()

◆ DecodeT2AddrModeImm8()

◆ DecodeT2AddrModeImm8s4()

◆ DecodeT2AddrModeSOReg()

◆ DecodeT2AddSubSPImm()

◆ DecodeT2Adr()

◆ DecodeT2BInstruction()

◆ DecodeT2BROperand()

◆ DecodeT2CPSInstruction()

◆ DecodeT2HintSpaceInstruction()

◆ DecodeT2Imm7()

template<int shift>
DecodeStatus DecodeT2Imm7 ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeT2Imm7S4()

DecodeStatus DecodeT2Imm7S4 ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeT2Imm8()

DecodeStatus DecodeT2Imm8 ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeT2Imm8S4()

DecodeStatus DecodeT2Imm8S4 ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeT2LDRDPreInstruction()

◆ DecodeT2LdStPre()

◆ DecodeT2LoadImm12()

◆ DecodeT2LoadImm8()

◆ DecodeT2LoadLabel()

◆ DecodeT2LoadShift()

◆ DecodeT2LoadT()

◆ DecodeT2MOVTWInstruction()

◆ DecodeT2ShifterImmOperand()

DecodeStatus DecodeT2ShifterImmOperand ( MCInst & Inst,
uint32_t Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeT2SOImm()

◆ DecodeT2STRDPreInstruction()

◆ DecodeTAddrModeImm7()

template<int shift>
DecodeStatus DecodeTAddrModeImm7 ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeTBLInstruction()

◆ DecodetcGPRRegisterClass()

DecodeStatus DecodetcGPRRegisterClass ( MCInst & Inst,
unsigned RegNo,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodetGPREvenRegisterClass()

◆ DecodetGPROddRegisterClass()

◆ DecodetGPRRegisterClass()

◆ DecodeThumb2BCCInstruction()

◆ DecodeThumbAddrModeIS()

◆ DecodeThumbAddrModePC()

◆ DecodeThumbAddrModeRR()

◆ DecodeThumbAddrModeSP()

DecodeStatus DecodeThumbAddrModeSP ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeThumbAddSpecialReg()

◆ DecodeThumbAddSPImm()

◆ DecodeThumbAddSPReg()

◆ DecodeThumbBCCTargetOperand()

◆ DecodeThumbBLTargetOperand()

◆ DecodeThumbBLXOffset()

◆ DecodeThumbBROperand()

◆ DecodeThumbCmpBROperand()

DecodeStatus DecodeThumbCmpBROperand ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeThumbCPS()

◆ DecodeThumbTableBranch()

◆ DecodeTSBInstruction()

◆ DecodeTSTInstruction()

◆ DecodeVCVTD()

◆ DecodeVCVTImmOperand()

◆ DecodeVCVTQ()

◆ DecodeVLD1DupInstruction()

◆ DecodeVLD1LN()

◆ DecodeVLD2DupInstruction()

◆ DecodeVLD2LN()

◆ DecodeVLD3DupInstruction()

◆ DecodeVLD3LN()

◆ DecodeVLD4DupInstruction()

◆ DecodeVLD4LN()

◆ DecodeVLDInstruction()

◆ DecodeVLDST1Instruction()

DecodeStatus DecodeVLDST1Instruction ( MCInst & Inst,
unsigned Insn,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeVLDST2Instruction()

DecodeStatus DecodeVLDST2Instruction ( MCInst & Inst,
unsigned Insn,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeVLDST3Instruction()

DecodeStatus DecodeVLDST3Instruction ( MCInst & Inst,
unsigned Insn,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeVLDST4Instruction()

DecodeStatus DecodeVLDST4Instruction ( MCInst & Inst,
unsigned Insn,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeVMOVModImmInstruction()

◆ DecodeVMOVRRS()

◆ DecodeVMOVSRR()

◆ DecodeVpredNOperand()

DecodeStatus DecodeVpredNOperand ( MCInst & Inst,
unsigned RegNo,
uint64_t Address,
const MCDisassembler * Decoder )
static

Definition at line 5503 of file ARMDisassembler.cpp.

References llvm::MCDisassembler::Success.

◆ DecodeVpredROperand()

DecodeStatus DecodeVpredROperand ( MCInst & Inst,
unsigned RegNo,
uint64_t Address,
const MCDisassembler * Decoder )
static

Definition at line 5489 of file ARMDisassembler.cpp.

References llvm::MCDisassembler::Success.

◆ DecodeVPTMaskOperand()

DecodeStatus DecodeVPTMaskOperand ( MCInst & Inst,
unsigned Val,
uint64_t Address,
const MCDisassembler * Decoder )
static

◆ DecodeVSCCLRM()

◆ DecodeVSHLMaxInstruction()

◆ DecodeVST1LN()

◆ DecodeVST2LN()

◆ DecodeVST3LN()

◆ DecodeVST4LN()

◆ DecodeVSTInstruction()

◆ DecodeVSTRVLDR_SYSREG()

◆ FixedRegForVSTRVLDR_SYSREG()

unsigned FixedRegForVSTRVLDR_SYSREG ( unsigned Opcode)
static

Definition at line 5609 of file ARMDisassembler.cpp.

Referenced by DecodeVSTRVLDR_SYSREG().

◆ LLVMInitializeARMDisassembler()

◆ PermitsD32()

◆ tryAddingPcLoadReferenceComment()

void tryAddingPcLoadReferenceComment ( uint64_t Address,
int Value,
const MCDisassembler * Decoder )
static

tryAddingPcLoadReferenceComment - trys to add a comment as to what is being referenced by a load instruction with the base register that is the Pc.

These can often be values in a literal pool near the Address of the instruction. The Address of the instruction and its immediate Value are used as a possible literal pool entry. The SymbolLookUp call back will return the name of a symbol referenced by the literal pool's entry if the referenced address is that of a symbol. Or it will return a pointer to a literal 'C' string if the referenced address of the literal pool's entry is an address into a section with 'C' string literals.

Definition at line 203 of file ARMDisassembler.cpp.

References llvm::MCDisassembler::tryAddingPcLoadReferenceComment().

Referenced by DecodeAddrModeImm12Operand(), and DecodeThumbAddrModePC().

◆ tryAddingSymbolicOperand()

bool tryAddingSymbolicOperand ( uint64_t Address,
int32_t Value,
bool isBranch,
uint64_t InstSize,
MCInst & MI,
const MCDisassembler * Decoder )
static

tryAddingSymbolicOperand - trys to add a symbolic operand in place of the immediate Value in the MCInst.

The immediate Value has had any PC adjustment made by the caller. If the instruction is a branch instruction then isBranch is true, else false. If the getOpInfo() function was set as part of the setupForSymbolicDisassembly() call then that function is called to get any symbolic information at the Address for this instruction. If that returns non-zero then the symbolic information it returns is used to create an MCExpr and that is added as an operand to the MCInst. If getOpInfo() returns zero and isBranch is true then a symbol look up for Value is done and if a symbol is found an MCExpr is created with that, else an MCExpr with Value is created. This function returns true if it adds an operand to the MCInst and false otherwise.

Definition at line 184 of file ARMDisassembler.cpp.

References isBranch(), MI, and llvm::MCDisassembler::tryAddingSymbolicOperand().

Referenced by DecodeArmMOVTWInstruction(), DecodeBFAfterTargetOperand(), DecodeBFLabelOperand(), decodeBranch(), DecodeBranchImmInstruction(), DecodeT2BInstruction(), DecodeT2BROperand(), DecodeT2MOVTWInstruction(), DecodeThumbBCCTargetOperand(), DecodeThumbBLTargetOperand(), DecodeThumbBLXOffset(), DecodeThumbBROperand(), and DecodeThumbCmpBROperand().

Variable Documentation

◆ CLRMGPRDecoderTable

const uint16_t CLRMGPRDecoderTable[]
static
Initial value:
= {
ARM::R0, ARM::R1, ARM::R2, ARM::R3,
ARM::R4, ARM::R5, ARM::R6, ARM::R7,
ARM::R8, ARM::R9, ARM::R10, ARM::R11,
ARM::R12, 0, ARM::LR, ARM::APSR
}

Definition at line 217 of file ARMDisassembler.cpp.

Referenced by DecodeCLRMGPRRegisterClass().

◆ DPairDecoderTable

const MCPhysReg DPairDecoderTable[]
static
Initial value:
= {
ARM::Q0, ARM::D1_D2, ARM::Q1, ARM::D3_D4, ARM::Q2, ARM::D5_D6,
ARM::Q3, ARM::D7_D8, ARM::Q4, ARM::D9_D10, ARM::Q5, ARM::D11_D12,
ARM::Q6, ARM::D13_D14, ARM::Q7, ARM::D15_D16, ARM::Q8, ARM::D17_D18,
ARM::Q9, ARM::D19_D20, ARM::Q10, ARM::D21_D22, ARM::Q11, ARM::D23_D24,
ARM::Q12, ARM::D25_D26, ARM::Q13, ARM::D27_D28, ARM::Q14, ARM::D29_D30,
ARM::Q15
}

Definition at line 522 of file ARMDisassembler.cpp.

Referenced by DecodeDPairRegisterClass().

◆ DPairSpacedDecoderTable

const MCPhysReg DPairSpacedDecoderTable[]
static
Initial value:
= {
ARM::D0_D2, ARM::D1_D3, ARM::D2_D4, ARM::D3_D5,
ARM::D4_D6, ARM::D5_D7, ARM::D6_D8, ARM::D7_D9,
ARM::D8_D10, ARM::D9_D11, ARM::D10_D12, ARM::D11_D13,
ARM::D12_D14, ARM::D13_D15, ARM::D14_D16, ARM::D15_D17,
ARM::D16_D18, ARM::D17_D19, ARM::D18_D20, ARM::D19_D21,
ARM::D20_D22, ARM::D21_D23, ARM::D22_D24, ARM::D23_D25,
ARM::D24_D26, ARM::D25_D27, ARM::D26_D28, ARM::D27_D29,
ARM::D28_D30, ARM::D29_D31
}

Definition at line 542 of file ARMDisassembler.cpp.

Referenced by DecodeDPairSpacedRegisterClass().

◆ DPRDecoderTable

const MCPhysReg DPRDecoderTable[]
static
Initial value:
= {
ARM::D0, ARM::D1, ARM::D2, ARM::D3,
ARM::D4, ARM::D5, ARM::D6, ARM::D7,
ARM::D8, ARM::D9, ARM::D10, ARM::D11,
ARM::D12, ARM::D13, ARM::D14, ARM::D15,
ARM::D16, ARM::D17, ARM::D18, ARM::D19,
ARM::D20, ARM::D21, ARM::D22, ARM::D23,
ARM::D24, ARM::D25, ARM::D26, ARM::D27,
ARM::D28, ARM::D29, ARM::D30, ARM::D31
}
@ D16
Only 16 D registers.

Definition at line 448 of file ARMDisassembler.cpp.

Referenced by DecodeDPRRegisterClass().

◆ GPRDecoderTable

◆ GPRPairDecoderTable

const uint16_t GPRPairDecoderTable[]
static
Initial value:
= {
ARM::R0_R1, ARM::R2_R3, ARM::R4_R5, ARM::R6_R7,
ARM::R8_R9, ARM::R10_R11, ARM::R12_SP
}

Definition at line 326 of file ARMDisassembler.cpp.

Referenced by DecodeDREGSRegisterClass(), DecodeGPRPairnospRegisterClass(), DecodeGPRPairRegisterClass(), DecodeGPRPairRegisterClass(), and DecodeIWREGSRegisterClass().

◆ QPRDecoderTable

const MCPhysReg QPRDecoderTable[]
static
Initial value:
= {
ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3,
ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7,
ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11,
ARM::Q12, ARM::Q13, ARM::Q14, ARM::Q15
}

Definition at line 503 of file ARMDisassembler.cpp.

Referenced by DecodeMQPRRegisterClass(), and DecodeQPRRegisterClass().

◆ QQPRDecoderTable

const MCPhysReg QQPRDecoderTable[]
static
Initial value:
= {
ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4,
ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7
}

Definition at line 575 of file ARMDisassembler.cpp.

Referenced by DecodeMQQPRRegisterClass().

◆ QQQQPRDecoderTable

const MCPhysReg QQQQPRDecoderTable[]
static
Initial value:
= {
ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5,
ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7
}

Definition at line 591 of file ARMDisassembler.cpp.

Referenced by DecodeMQQQQPRRegisterClass().

◆ SPRDecoderTable

const MCPhysReg SPRDecoderTable[]
static
Initial value:
= {
ARM::S0, ARM::S1, ARM::S2, ARM::S3,
ARM::S4, ARM::S5, ARM::S6, ARM::S7,
ARM::S8, ARM::S9, ARM::S10, ARM::S11,
ARM::S12, ARM::S13, ARM::S14, ARM::S15,
ARM::S16, ARM::S17, ARM::S18, ARM::S19,
ARM::S20, ARM::S21, ARM::S22, ARM::S23,
ARM::S24, ARM::S25, ARM::S26, ARM::S27,
ARM::S28, ARM::S29, ARM::S30, ARM::S31
}

Definition at line 420 of file ARMDisassembler.cpp.

Referenced by DecodeSPRRegisterClass().