LLVM 22.0.0git
SPIRVPreLegalizerCombiner.cpp
Go to the documentation of this file.
1
2//===-- SPIRVPreLegalizerCombiner.cpp - combine legalization ----*- C++ -*-===//
3//
4// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5// See https://llvm.org/LICENSE.txt for license information.
6// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7//
8//===----------------------------------------------------------------------===//
9//
10// This pass does combining of machine instructions at the generic MI level,
11// before the legalizer.
12//
13//===----------------------------------------------------------------------===//
14
15#include "SPIRV.h"
16#include "SPIRVTargetMachine.h"
33#include "llvm/IR/IntrinsicsSPIRV.h"
34
35#define GET_GICOMBINER_DEPS
36#include "SPIRVGenPreLegalizeGICombiner.inc"
37#undef GET_GICOMBINER_DEPS
38
39#define DEBUG_TYPE "spirv-prelegalizer-combiner"
40
41using namespace llvm;
42using namespace MIPatternMatch;
43
44namespace {
45
46#define GET_GICOMBINER_TYPES
47#include "SPIRVGenPreLegalizeGICombiner.inc"
48#undef GET_GICOMBINER_TYPES
49
50/// This match is part of a combine that
51/// rewrites length(X - Y) to distance(X, Y)
52/// (f32 (g_intrinsic length
53/// (g_fsub (vXf32 X) (vXf32 Y))))
54/// ->
55/// (f32 (g_intrinsic distance
56/// (vXf32 X) (vXf32 Y)))
57///
58bool matchLengthToDistance(MachineInstr &MI, MachineRegisterInfo &MRI) {
59 if (MI.getOpcode() != TargetOpcode::G_INTRINSIC ||
60 cast<GIntrinsic>(MI).getIntrinsicID() != Intrinsic::spv_length)
61 return false;
62
63 // First operand of MI is `G_INTRINSIC` so start at operand 2.
64 Register SubReg = MI.getOperand(2).getReg();
65 MachineInstr *SubInstr = MRI.getVRegDef(SubReg);
66 if (!SubInstr || SubInstr->getOpcode() != TargetOpcode::G_FSUB)
67 return false;
68
69 return true;
70}
71void applySPIRVDistance(MachineInstr &MI, MachineRegisterInfo &MRI,
73
74 // Extract the operands for X and Y from the match criteria.
75 Register SubDestReg = MI.getOperand(2).getReg();
76 MachineInstr *SubInstr = MRI.getVRegDef(SubDestReg);
77 Register SubOperand1 = SubInstr->getOperand(1).getReg();
78 Register SubOperand2 = SubInstr->getOperand(2).getReg();
79
80 // Remove the original `spv_length` instruction.
81
82 Register ResultReg = MI.getOperand(0).getReg();
83 DebugLoc DL = MI.getDebugLoc();
84 MachineBasicBlock &MBB = *MI.getParent();
85 MachineBasicBlock::iterator InsertPt = MI.getIterator();
86
87 // Build the `spv_distance` intrinsic.
88 MachineInstrBuilder NewInstr =
89 BuildMI(MBB, InsertPt, DL, B.getTII().get(TargetOpcode::G_INTRINSIC));
90 NewInstr
91 .addDef(ResultReg) // Result register
92 .addIntrinsicID(Intrinsic::spv_distance) // Intrinsic ID
93 .addUse(SubOperand1) // Operand X
94 .addUse(SubOperand2); // Operand Y
95
97 MI.getMF()->getSubtarget<SPIRVSubtarget>().getSPIRVGlobalRegistry();
98 auto RemoveAllUses = [&](Register Reg) {
100 llvm::make_pointer_range(MRI.use_instructions(Reg)));
101
102 // calling eraseFromParent to early invalidates the iterator.
103 for (auto *MIToErase : UsesToErase) {
104 GR->invalidateMachineInstr(MIToErase);
105 MIToErase->eraseFromParent();
106 }
107 };
108 RemoveAllUses(SubDestReg); // remove all uses of FSUB Result
109 GR->invalidateMachineInstr(SubInstr);
110 SubInstr->eraseFromParent(); // remove FSUB instruction
111}
112
113class SPIRVPreLegalizerCombinerImpl : public Combiner {
114protected:
115 const CombinerHelper Helper;
116 const SPIRVPreLegalizerCombinerImplRuleConfig &RuleConfig;
117 const SPIRVSubtarget &STI;
118
119public:
120 SPIRVPreLegalizerCombinerImpl(
121 MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC,
122 GISelValueTracking &VT, GISelCSEInfo *CSEInfo,
123 const SPIRVPreLegalizerCombinerImplRuleConfig &RuleConfig,
124 const SPIRVSubtarget &STI, MachineDominatorTree *MDT,
125 const LegalizerInfo *LI);
126
127 static const char *getName() { return "SPIRVPreLegalizerCombiner"; }
128
129 bool tryCombineAll(MachineInstr &I) const override;
130
131 bool tryCombineAllImpl(MachineInstr &I) const;
132
133private:
134#define GET_GICOMBINER_CLASS_MEMBERS
135#include "SPIRVGenPreLegalizeGICombiner.inc"
136#undef GET_GICOMBINER_CLASS_MEMBERS
137};
138
139#define GET_GICOMBINER_IMPL
140#include "SPIRVGenPreLegalizeGICombiner.inc"
141#undef GET_GICOMBINER_IMPL
142
143SPIRVPreLegalizerCombinerImpl::SPIRVPreLegalizerCombinerImpl(
144 MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC,
145 GISelValueTracking &VT, GISelCSEInfo *CSEInfo,
146 const SPIRVPreLegalizerCombinerImplRuleConfig &RuleConfig,
147 const SPIRVSubtarget &STI, MachineDominatorTree *MDT,
148 const LegalizerInfo *LI)
149 : Combiner(MF, CInfo, TPC, &VT, CSEInfo),
150 Helper(Observer, B, /*IsPreLegalize*/ true, &VT, MDT, LI),
151 RuleConfig(RuleConfig), STI(STI),
153#include "SPIRVGenPreLegalizeGICombiner.inc"
155{
156}
157
158bool SPIRVPreLegalizerCombinerImpl::tryCombineAll(MachineInstr &MI) const {
159 return tryCombineAllImpl(MI);
160}
161
162// Pass boilerplate
163// ================
164
165class SPIRVPreLegalizerCombiner : public MachineFunctionPass {
166public:
167 static char ID;
168
169 SPIRVPreLegalizerCombiner();
170
171 StringRef getPassName() const override { return "SPIRVPreLegalizerCombiner"; }
172
173 bool runOnMachineFunction(MachineFunction &MF) override;
174
175 void getAnalysisUsage(AnalysisUsage &AU) const override;
176
177private:
178 SPIRVPreLegalizerCombinerImplRuleConfig RuleConfig;
179};
180
181} // end anonymous namespace
182
183void SPIRVPreLegalizerCombiner::getAnalysisUsage(AnalysisUsage &AU) const {
185 AU.setPreservesCFG();
192}
193
194SPIRVPreLegalizerCombiner::SPIRVPreLegalizerCombiner()
196 if (!RuleConfig.parseCommandLineOption())
197 report_fatal_error("Invalid rule identifier");
198}
199
200bool SPIRVPreLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) {
201 if (MF.getProperties().hasFailedISel())
202 return false;
203 auto &TPC = getAnalysis<TargetPassConfig>();
204
206 const auto *LI = ST.getLegalizerInfo();
207
208 const Function &F = MF.getFunction();
209 bool EnableOpt =
210 MF.getTarget().getOptLevel() != CodeGenOptLevel::None && !skipFunction(F);
212 &getAnalysis<GISelValueTrackingAnalysisLegacy>().get(MF);
214 &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
215 CombinerInfo CInfo(/*AllowIllegalOps*/ true, /*ShouldLegalizeIllegal*/ false,
216 /*LegalizerInfo*/ nullptr, EnableOpt, F.hasOptSize(),
217 F.hasMinSize());
218 // Disable fixed-point iteration to reduce compile-time
219 CInfo.MaxIterations = 1;
220 CInfo.ObserverLvl = CombinerInfo::ObserverLevel::SinglePass;
221 // This is the first Combiner, so the input IR might contain dead
222 // instructions.
223 CInfo.EnableFullDCE = false;
224 SPIRVPreLegalizerCombinerImpl Impl(MF, CInfo, &TPC, *VT, /*CSEInfo*/ nullptr,
225 RuleConfig, ST, MDT, LI);
226 return Impl.combineMachineInstrs();
227}
228
229char SPIRVPreLegalizerCombiner::ID = 0;
230INITIALIZE_PASS_BEGIN(SPIRVPreLegalizerCombiner, DEBUG_TYPE,
231 "Combine SPIRV machine instrs before legalization", false,
232 false)
235INITIALIZE_PASS_END(SPIRVPreLegalizerCombiner, DEBUG_TYPE,
236 "Combine SPIRV machine instrs before legalization", false,
237 false)
238
239namespace llvm {
241 return new SPIRVPreLegalizerCombiner();
242}
243} // end namespace llvm
unsigned SubReg
unsigned const MachineRegisterInfo * MRI
MachineBasicBlock & MBB
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
Provides analysis for continuously CSEing during GISel passes.
This contains common combine transformations that may be used in a combine pass,or by the target else...
Option class for Targets to specify which operations are combined how and when.
This contains the base class for all Combiners generated by TableGen.
This contains common code to allow clients to notify changes to machine instr.
Provides analysis for querying information about KnownBits during GISel passes.
Declares convenience wrapper classes for interpreting MachineInstr instances as specific generic oper...
Hexagon Vector Combine
IRTranslator LLVM IR MI
#define F(x, y, z)
Definition: MD5.cpp:55
#define I(x, y, z)
Definition: MD5.cpp:58
Contains matchers for matching SSA Machine Instructions.
This file declares the MachineIRBuilder class.
#define INITIALIZE_PASS_DEPENDENCY(depName)
Definition: PassSupport.h:42
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:44
#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:39
static StringRef getName(Value *V)
#define GET_GICOMBINER_CONSTRUCTOR_INITS
#define DEBUG_TYPE
Combine SPIRV machine instrs before legalization
Target-Independent Code Generator Pass Configuration Options pass.
Represent the analysis usage information of a pass.
AnalysisUsage & addRequired()
AnalysisUsage & addPreserved()
Add the specified Pass class to the set of analyses preserved by this pass.
LLVM_ABI void setPreservesCFG()
This function should be called by the pass, iff they do not:
Definition: Pass.cpp:270
Combiner implementation.
Definition: Combiner.h:34
virtual bool tryCombineAll(MachineInstr &I) const =0
A debug info location.
Definition: DebugLoc.h:124
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:314
The CSE Analysis object.
Definition: CSEInfo.h:71
To use KnownBitsInfo analysis in a pass, KnownBitsInfo &Info = getAnalysis<GISelValueTrackingInfoAnal...
Analysis pass which computes a MachineDominatorTree.
DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Function & getFunction()
Return the LLVM function that this machine code represents.
const MachineFunctionProperties & getProperties() const
Get the function properties.
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
Helper class to build MachineInstr.
const MachineInstrBuilder & addIntrinsicID(Intrinsic::ID ID) const
const MachineInstrBuilder & addUse(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register use operand.
const MachineInstrBuilder & addDef(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register definition operand.
Representation of each machine instruction.
Definition: MachineInstr.h:72
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:587
LLVM_ABI void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:595
Register getReg() const
getReg - Returns the register number.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
virtual StringRef getPassName() const
getPassName - Return a nice clean name for a pass.
Definition: Pass.cpp:85
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
void invalidateMachineInstr(MachineInstr *MI)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1197
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:55
CodeGenOptLevel getOptLevel() const
Returns the optimization level: None, Less, Default, or Aggressive.
Target-Independent Code Generator Pass Configuration Options.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
Reg
All possible values of the reg field in the ModR/M byte.
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
FunctionPass * createSPIRVPreLegalizerCombiner()
LLVM_ABI void report_fatal_error(Error Err, bool gen_crash_diag=true)
Definition: Error.cpp:167
LLVM_ABI void getSelectionDAGFallbackAnalysisUsage(AnalysisUsage &AU)
Modify analysis usage so it preserves passes required for the SelectionDAG fallback.
Definition: Utils.cpp:1185
iterator_range< pointer_iterator< WrappedIteratorT > > make_pointer_range(RangeT &&Range)
Definition: iterator.h:363
auto instrs(const MachineBasicBlock &BB)