LLVM 22.0.0git
SelectionDAGDumper.cpp
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1//===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This implements the SelectionDAG::dump method and friends.
10//
11//===----------------------------------------------------------------------===//
12
13#include "SDNodeDbgValue.h"
14#include "llvm/ADT/APFloat.h"
15#include "llvm/ADT/APInt.h"
16#include "llvm/ADT/SmallPtrSet.h"
17#include "llvm/ADT/StringExtras.h"
18#include "llvm/CodeGen/ISDOpcodes.h"
19#include "llvm/CodeGen/MachineBasicBlock.h"
20#include "llvm/CodeGen/MachineConstantPool.h"
21#include "llvm/CodeGen/MachineMemOperand.h"
22#include "llvm/CodeGen/SelectionDAG.h"
23#include "llvm/CodeGen/SelectionDAGNodes.h"
24#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
25#include "llvm/CodeGen/TargetInstrInfo.h"
26#include "llvm/CodeGen/TargetLowering.h"
27#include "llvm/CodeGen/TargetRegisterInfo.h"
28#include "llvm/CodeGen/TargetSubtargetInfo.h"
29#include "llvm/CodeGen/ValueTypes.h"
30#include "llvm/CodeGenTypes/MachineValueType.h"
31#include "llvm/Config/llvm-config.h"
32#include "llvm/IR/BasicBlock.h"
33#include "llvm/IR/Constants.h"
34#include "llvm/IR/DebugInfoMetadata.h"
35#include "llvm/IR/DebugLoc.h"
36#include "llvm/IR/Function.h"
37#include "llvm/IR/Intrinsics.h"
38#include "llvm/IR/ModuleSlotTracker.h"
39#include "llvm/IR/Value.h"
40#include "llvm/Support/Casting.h"
41#include "llvm/Support/CommandLine.h"
42#include "llvm/Support/Compiler.h"
43#include "llvm/Support/Debug.h"
44#include "llvm/Support/ErrorHandling.h"
45#include "llvm/Support/Printable.h"
46#include "llvm/Support/raw_ostream.h"
47#include "llvm/Target/TargetMachine.h"
48#include <cstdint>
49#include <iterator>
50
51using namespace llvm;
52
53static cl::opt<bool>
54VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
55 cl::desc("Display more information when dumping selection "
56 "DAG nodes."));
57
58std::string SDNode::getOperationName(const SelectionDAG *G) const {
59 switch (getOpcode()) {
60 default:
61 if (getOpcode() < ISD::BUILTIN_OP_END)
62 return "<<Unknown DAG Node>>";
63 if (isMachineOpcode()) {
64 if (G)
65 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
66 if (getMachineOpcode() < TII->getNumOpcodes())
67 return std::string(TII->getName(getMachineOpcode()));
68 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
69 }
70 if (G) {
71 const SelectionDAGTargetInfo &TSI = G->getSelectionDAGInfo();
72 if (const char *Name = TSI.getTargetNodeName(getOpcode()))
73 return Name;
74 const TargetLowering &TLI = G->getTargetLoweringInfo();
75 const char *Name = TLI.getTargetNodeName(getOpcode());
76 if (Name) return Name;
77 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
78 }
79 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
80
81 // clang-format off
82#ifndef NDEBUG
83 case ISD::DELETED_NODE: return "<<Deleted Node!>>";
84#endif
85 case ISD::PREFETCH: return "Prefetch";
86 case ISD::MEMBARRIER: return "MemBarrier";
87 case ISD::ATOMIC_FENCE: return "AtomicFence";
88 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
89 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
90 case ISD::ATOMIC_SWAP: return "AtomicSwap";
91 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
92 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
93 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
94 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr";
95 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
96 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
97 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
98 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
99 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
100 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
101 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
102 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd";
103 case ISD::ATOMIC_LOAD_FSUB: return "AtomicLoadFSub";
104 case ISD::ATOMIC_LOAD_FMIN: return "AtomicLoadFMin";
105 case ISD::ATOMIC_LOAD_FMAX: return "AtomicLoadFMax";
106 case ISD::ATOMIC_LOAD_FMINIMUM: return "AtomicLoadFMinimum";
107 case ISD::ATOMIC_LOAD_FMAXIMUM: return "AtomicLoadFMaximum";
108 case ISD::ATOMIC_LOAD_UINC_WRAP:
109 return "AtomicLoadUIncWrap";
110 case ISD::ATOMIC_LOAD_UDEC_WRAP:
111 return "AtomicLoadUDecWrap";
112 case ISD::ATOMIC_LOAD_USUB_COND:
113 return "AtomicLoadUSubCond";
114 case ISD::ATOMIC_LOAD_USUB_SAT:
115 return "AtomicLoadUSubSat";
116 case ISD::ATOMIC_LOAD: return "AtomicLoad";
117 case ISD::ATOMIC_STORE: return "AtomicStore";
118 case ISD::PCMARKER: return "PCMarker";
119 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
120 case ISD::READSTEADYCOUNTER: return "ReadSteadyCounter";
121 case ISD::SRCVALUE: return "SrcValue";
122 case ISD::MDNODE_SDNODE: return "MDNode";
123 case ISD::EntryToken: return "EntryToken";
124 case ISD::TokenFactor: return "TokenFactor";
125 case ISD::AssertSext: return "AssertSext";
126 case ISD::AssertZext: return "AssertZext";
127 case ISD::AssertNoFPClass: return "AssertNoFPClass";
128 case ISD::AssertAlign: return "AssertAlign";
129
130 case ISD::BasicBlock: return "BasicBlock";
131 case ISD::VALUETYPE: return "ValueType";
132 case ISD::Register: return "Register";
133 case ISD::RegisterMask: return "RegisterMask";
134 case ISD::Constant:
135 if (cast<ConstantSDNode>(this)->isOpaque())
136 return "OpaqueConstant";
137 return "Constant";
138 case ISD::ConstantFP: return "ConstantFP";
139 case ISD::GlobalAddress: return "GlobalAddress";
140 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
141 case ISD::PtrAuthGlobalAddress: return "PtrAuthGlobalAddress";
142 case ISD::FrameIndex: return "FrameIndex";
143 case ISD::JumpTable: return "JumpTable";
144 case ISD::JUMP_TABLE_DEBUG_INFO:
145 return "JUMP_TABLE_DEBUG_INFO";
146 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
147 case ISD::RETURNADDR: return "RETURNADDR";
148 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
149 case ISD::FRAMEADDR: return "FRAMEADDR";
150 case ISD::SPONENTRY: return "SPONENTRY";
151 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
152 case ISD::READ_REGISTER: return "READ_REGISTER";
153 case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
154 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
155 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA";
156 case ISD::EH_RETURN: return "EH_RETURN";
157 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
158 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
159 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH";
160 case ISD::ConstantPool: return "ConstantPool";
161 case ISD::TargetIndex: return "TargetIndex";
162 case ISD::ExternalSymbol: return "ExternalSymbol";
163 case ISD::BlockAddress: return "BlockAddress";
164 case ISD::INTRINSIC_WO_CHAIN:
165 case ISD::INTRINSIC_VOID:
166 case ISD::INTRINSIC_W_CHAIN: {
167 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
168 unsigned IID = getOperand(OpNo)->getAsZExtVal();
169 if (IID < Intrinsic::num_intrinsics)
170 return Intrinsic::getBaseName((Intrinsic::ID)IID).str();
171 if (!G)
172 return "Unknown intrinsic";
173 llvm_unreachable("Invalid intrinsic ID");
174 }
175
176 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
177 case ISD::TargetConstant:
178 if (cast<ConstantSDNode>(this)->isOpaque())
179 return "OpaqueTargetConstant";
180 return "TargetConstant";
181
182 case ISD::TargetConstantFP: return "TargetConstantFP";
183 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
184 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
185 case ISD::TargetFrameIndex: return "TargetFrameIndex";
186 case ISD::TargetJumpTable: return "TargetJumpTable";
187 case ISD::TargetConstantPool: return "TargetConstantPool";
188 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
189 case ISD::MCSymbol: return "MCSymbol";
190 case ISD::TargetBlockAddress: return "TargetBlockAddress";
191
192 case ISD::CopyToReg: return "CopyToReg";
193 case ISD::CopyFromReg: return "CopyFromReg";
194 case ISD::UNDEF: return "undef";
195 case ISD::POISON: return "poison";
196 case ISD::VSCALE: return "vscale";
197 case ISD::MERGE_VALUES: return "merge_values";
198 case ISD::INLINEASM: return "inlineasm";
199 case ISD::INLINEASM_BR: return "inlineasm_br";
200 case ISD::EH_LABEL: return "eh_label";
201 case ISD::ANNOTATION_LABEL: return "annotation_label";
202 case ISD::HANDLENODE: return "handlenode";
203
204 // Unary operators
205 case ISD::FABS: return "fabs";
206 case ISD::FMINNUM: return "fminnum";
207 case ISD::STRICT_FMINNUM: return "strict_fminnum";
208 case ISD::FMAXNUM: return "fmaxnum";
209 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum";
210 case ISD::FMINNUM_IEEE: return "fminnum_ieee";
211 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee";
212 case ISD::FMINIMUM: return "fminimum";
213 case ISD::STRICT_FMINIMUM: return "strict_fminimum";
214 case ISD::FMAXIMUM: return "fmaximum";
215 case ISD::STRICT_FMAXIMUM: return "strict_fmaximum";
216 case ISD::FMINIMUMNUM: return "fminimumnum";
217 case ISD::FMAXIMUMNUM: return "fmaximumnum";
218 case ISD::FNEG: return "fneg";
219 case ISD::FSQRT: return "fsqrt";
220 case ISD::STRICT_FSQRT: return "strict_fsqrt";
221 case ISD::FCBRT: return "fcbrt";
222 case ISD::FSIN: return "fsin";
223 case ISD::STRICT_FSIN: return "strict_fsin";
224 case ISD::FCOS: return "fcos";
225 case ISD::STRICT_FCOS: return "strict_fcos";
226 case ISD::FSINCOS: return "fsincos";
227 case ISD::FSINCOSPI: return "fsincospi";
228 case ISD::FMODF: return "fmodf";
229 case ISD::FTAN: return "ftan";
230 case ISD::STRICT_FTAN: return "strict_ftan";
231 case ISD::FASIN: return "fasin";
232 case ISD::STRICT_FASIN: return "strict_fasin";
233 case ISD::FACOS: return "facos";
234 case ISD::STRICT_FACOS: return "strict_facos";
235 case ISD::FATAN: return "fatan";
236 case ISD::STRICT_FATAN: return "strict_fatan";
237 case ISD::FATAN2: return "fatan2";
238 case ISD::STRICT_FATAN2: return "strict_fatan2";
239 case ISD::FSINH: return "fsinh";
240 case ISD::STRICT_FSINH: return "strict_fsinh";
241 case ISD::FCOSH: return "fcosh";
242 case ISD::STRICT_FCOSH: return "strict_fcosh";
243 case ISD::FTANH: return "ftanh";
244 case ISD::STRICT_FTANH: return "strict_ftanh";
245 case ISD::FTRUNC: return "ftrunc";
246 case ISD::STRICT_FTRUNC: return "strict_ftrunc";
247 case ISD::FFLOOR: return "ffloor";
248 case ISD::STRICT_FFLOOR: return "strict_ffloor";
249 case ISD::FCEIL: return "fceil";
250 case ISD::STRICT_FCEIL: return "strict_fceil";
251 case ISD::FRINT: return "frint";
252 case ISD::STRICT_FRINT: return "strict_frint";
253 case ISD::FNEARBYINT: return "fnearbyint";
254 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint";
255 case ISD::FROUND: return "fround";
256 case ISD::STRICT_FROUND: return "strict_fround";
257 case ISD::FROUNDEVEN: return "froundeven";
258 case ISD::STRICT_FROUNDEVEN: return "strict_froundeven";
259 case ISD::FEXP: return "fexp";
260 case ISD::STRICT_FEXP: return "strict_fexp";
261 case ISD::FEXP2: return "fexp2";
262 case ISD::STRICT_FEXP2: return "strict_fexp2";
263 case ISD::FEXP10: return "fexp10";
264 case ISD::FLOG: return "flog";
265 case ISD::STRICT_FLOG: return "strict_flog";
266 case ISD::FLOG2: return "flog2";
267 case ISD::STRICT_FLOG2: return "strict_flog2";
268 case ISD::FLOG10: return "flog10";
269 case ISD::STRICT_FLOG10: return "strict_flog10";
270
271 // Binary operators
272 case ISD::ADD: return "add";
273 case ISD::PTRADD: return "ptradd";
274 case ISD::SUB: return "sub";
275 case ISD::MUL: return "mul";
276 case ISD::MULHU: return "mulhu";
277 case ISD::MULHS: return "mulhs";
278 case ISD::AVGFLOORU: return "avgflooru";
279 case ISD::AVGFLOORS: return "avgfloors";
280 case ISD::AVGCEILU: return "avgceilu";
281 case ISD::AVGCEILS: return "avgceils";
282 case ISD::ABDS: return "abds";
283 case ISD::ABDU: return "abdu";
284 case ISD::SDIV: return "sdiv";
285 case ISD::UDIV: return "udiv";
286 case ISD::SREM: return "srem";
287 case ISD::UREM: return "urem";
288 case ISD::SMUL_LOHI: return "smul_lohi";
289 case ISD::UMUL_LOHI: return "umul_lohi";
290 case ISD::SDIVREM: return "sdivrem";
291 case ISD::UDIVREM: return "udivrem";
292 case ISD::AND: return "and";
293 case ISD::OR: return "or";
294 case ISD::XOR: return "xor";
295 case ISD::SHL: return "shl";
296 case ISD::SRA: return "sra";
297 case ISD::SRL: return "srl";
298 case ISD::ROTL: return "rotl";
299 case ISD::ROTR: return "rotr";
300 case ISD::FSHL: return "fshl";
301 case ISD::FSHR: return "fshr";
302 case ISD::FADD: return "fadd";
303 case ISD::STRICT_FADD: return "strict_fadd";
304 case ISD::FSUB: return "fsub";
305 case ISD::STRICT_FSUB: return "strict_fsub";
306 case ISD::FMUL: return "fmul";
307 case ISD::STRICT_FMUL: return "strict_fmul";
308 case ISD::FDIV: return "fdiv";
309 case ISD::STRICT_FDIV: return "strict_fdiv";
310 case ISD::FMA: return "fma";
311 case ISD::STRICT_FMA: return "strict_fma";
312 case ISD::FMAD: return "fmad";
313 case ISD::FMULADD: return "fmuladd";
314 case ISD::FREM: return "frem";
315 case ISD::STRICT_FREM: return "strict_frem";
316 case ISD::FCOPYSIGN: return "fcopysign";
317 case ISD::FGETSIGN: return "fgetsign";
318 case ISD::FCANONICALIZE: return "fcanonicalize";
319 case ISD::IS_FPCLASS: return "is_fpclass";
320 case ISD::FPOW: return "fpow";
321 case ISD::STRICT_FPOW: return "strict_fpow";
322 case ISD::SMIN: return "smin";
323 case ISD::SMAX: return "smax";
324 case ISD::UMIN: return "umin";
325 case ISD::UMAX: return "umax";
326 case ISD::SCMP: return "scmp";
327 case ISD::UCMP: return "ucmp";
328
329 case ISD::FLDEXP: return "fldexp";
330 case ISD::STRICT_FLDEXP: return "strict_fldexp";
331 case ISD::FFREXP: return "ffrexp";
332 case ISD::FPOWI: return "fpowi";
333 case ISD::STRICT_FPOWI: return "strict_fpowi";
334 case ISD::SETCC: return "setcc";
335 case ISD::SETCCCARRY: return "setcccarry";
336 case ISD::STRICT_FSETCC: return "strict_fsetcc";
337 case ISD::STRICT_FSETCCS: return "strict_fsetccs";
338 case ISD::FPTRUNC_ROUND: return "fptrunc_round";
339 case ISD::SELECT: return "select";
340 case ISD::VSELECT: return "vselect";
341 case ISD::SELECT_CC: return "select_cc";
342 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
343 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
344 case ISD::CONCAT_VECTORS: return "concat_vectors";
345 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
346 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
347 case ISD::VECTOR_DEINTERLEAVE: return "vector_deinterleave";
348 case ISD::VECTOR_INTERLEAVE: return "vector_interleave";
349 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
350 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
351 case ISD::VECTOR_SPLICE: return "vector_splice";
352 case ISD::SPLAT_VECTOR: return "splat_vector";
353 case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts";
354 case ISD::VECTOR_REVERSE: return "vector_reverse";
355 case ISD::STEP_VECTOR: return "step_vector";
356 case ISD::CARRY_FALSE: return "carry_false";
357 case ISD::ADDC: return "addc";
358 case ISD::ADDE: return "adde";
359 case ISD::UADDO_CARRY: return "uaddo_carry";
360 case ISD::SADDO_CARRY: return "saddo_carry";
361 case ISD::SADDO: return "saddo";
362 case ISD::UADDO: return "uaddo";
363 case ISD::SSUBO: return "ssubo";
364 case ISD::USUBO: return "usubo";
365 case ISD::SMULO: return "smulo";
366 case ISD::UMULO: return "umulo";
367 case ISD::SUBC: return "subc";
368 case ISD::SUBE: return "sube";
369 case ISD::USUBO_CARRY: return "usubo_carry";
370 case ISD::SSUBO_CARRY: return "ssubo_carry";
371 case ISD::SHL_PARTS: return "shl_parts";
372 case ISD::SRA_PARTS: return "sra_parts";
373 case ISD::SRL_PARTS: return "srl_parts";
374
375 case ISD::SADDSAT: return "saddsat";
376 case ISD::UADDSAT: return "uaddsat";
377 case ISD::SSUBSAT: return "ssubsat";
378 case ISD::USUBSAT: return "usubsat";
379 case ISD::SSHLSAT: return "sshlsat";
380 case ISD::USHLSAT: return "ushlsat";
381
382 case ISD::SMULFIX: return "smulfix";
383 case ISD::SMULFIXSAT: return "smulfixsat";
384 case ISD::UMULFIX: return "umulfix";
385 case ISD::UMULFIXSAT: return "umulfixsat";
386
387 case ISD::SDIVFIX: return "sdivfix";
388 case ISD::SDIVFIXSAT: return "sdivfixsat";
389 case ISD::UDIVFIX: return "udivfix";
390 case ISD::UDIVFIXSAT: return "udivfixsat";
391
392 // Conversion operators.
393 case ISD::SIGN_EXTEND: return "sign_extend";
394 case ISD::ZERO_EXTEND: return "zero_extend";
395 case ISD::ANY_EXTEND: return "any_extend";
396 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
397 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg";
398 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg";
399 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg";
400 case ISD::TRUNCATE: return "truncate";
401 case ISD::TRUNCATE_SSAT_S: return "truncate_ssat_s";
402 case ISD::TRUNCATE_SSAT_U: return "truncate_ssat_u";
403 case ISD::TRUNCATE_USAT_U: return "truncate_usat_u";
404 case ISD::FP_ROUND: return "fp_round";
405 case ISD::STRICT_FP_ROUND: return "strict_fp_round";
406 case ISD::FP_EXTEND: return "fp_extend";
407 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend";
408
409 case ISD::SINT_TO_FP: return "sint_to_fp";
410 case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp";
411 case ISD::UINT_TO_FP: return "uint_to_fp";
412 case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp";
413 case ISD::FP_TO_SINT: return "fp_to_sint";
414 case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint";
415 case ISD::FP_TO_UINT: return "fp_to_uint";
416 case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint";
417 case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat";
418 case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat";
419 case ISD::BITCAST: return "bitcast";
420 case ISD::ADDRSPACECAST: return "addrspacecast";
421 case ISD::FP16_TO_FP: return "fp16_to_fp";
422 case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp";
423 case ISD::FP_TO_FP16: return "fp_to_fp16";
424 case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16";
425 case ISD::BF16_TO_FP: return "bf16_to_fp";
426 case ISD::STRICT_BF16_TO_FP: return "strict_bf16_to_fp";
427 case ISD::FP_TO_BF16: return "fp_to_bf16";
428 case ISD::STRICT_FP_TO_BF16: return "strict_fp_to_bf16";
429 case ISD::LROUND: return "lround";
430 case ISD::STRICT_LROUND: return "strict_lround";
431 case ISD::LLROUND: return "llround";
432 case ISD::STRICT_LLROUND: return "strict_llround";
433 case ISD::LRINT: return "lrint";
434 case ISD::STRICT_LRINT: return "strict_lrint";
435 case ISD::LLRINT: return "llrint";
436 case ISD::STRICT_LLRINT: return "strict_llrint";
437
438 // Control flow instructions
439 case ISD::BR: return "br";
440 case ISD::BRIND: return "brind";
441 case ISD::BR_JT: return "br_jt";
442 case ISD::BRCOND: return "brcond";
443 case ISD::BR_CC: return "br_cc";
444 case ISD::CALLSEQ_START: return "callseq_start";
445 case ISD::CALLSEQ_END: return "callseq_end";
446
447 // EH instructions
448 case ISD::CATCHRET: return "catchret";
449 case ISD::CLEANUPRET: return "cleanupret";
450
451 // Other operators
452 case ISD::LOAD: return "load";
453 case ISD::STORE: return "store";
454 case ISD::MLOAD: return "masked_load";
455 case ISD::MSTORE: return "masked_store";
456 case ISD::MGATHER: return "masked_gather";
457 case ISD::MSCATTER: return "masked_scatter";
458 case ISD::VECTOR_COMPRESS: return "vector_compress";
459 case ISD::VAARG: return "vaarg";
460 case ISD::VACOPY: return "vacopy";
461 case ISD::VAEND: return "vaend";
462 case ISD::VASTART: return "vastart";
463 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
464 case ISD::EXTRACT_ELEMENT: return "extract_element";
465 case ISD::BUILD_PAIR: return "build_pair";
466 case ISD::STACKSAVE: return "stacksave";
467 case ISD::STACKRESTORE: return "stackrestore";
468 case ISD::TRAP: return "trap";
469 case ISD::DEBUGTRAP: return "debugtrap";
470 case ISD::UBSANTRAP: return "ubsantrap";
471 case ISD::LIFETIME_START: return "lifetime.start";
472 case ISD::LIFETIME_END: return "lifetime.end";
473 case ISD::FAKE_USE:
474 return "fake_use";
475 case ISD::PSEUDO_PROBE:
476 return "pseudoprobe";
477 case ISD::GC_TRANSITION_START: return "gc_transition.start";
478 case ISD::GC_TRANSITION_END: return "gc_transition.end";
479 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset";
480 case ISD::FREEZE: return "freeze";
481 case ISD::PREALLOCATED_SETUP:
482 return "call_setup";
483 case ISD::PREALLOCATED_ARG:
484 return "call_alloc";
485
486 // Floating point environment manipulation
487 case ISD::GET_ROUNDING: return "get_rounding";
488 case ISD::SET_ROUNDING: return "set_rounding";
489 case ISD::GET_FPENV: return "get_fpenv";
490 case ISD::SET_FPENV: return "set_fpenv";
491 case ISD::RESET_FPENV: return "reset_fpenv";
492 case ISD::GET_FPENV_MEM: return "get_fpenv_mem";
493 case ISD::SET_FPENV_MEM: return "set_fpenv_mem";
494 case ISD::GET_FPMODE: return "get_fpmode";
495 case ISD::SET_FPMODE: return "set_fpmode";
496 case ISD::RESET_FPMODE: return "reset_fpmode";
497
498 // Convergence control instructions
499 case ISD::CONVERGENCECTRL_ANCHOR: return "convergencectrl_anchor";
500 case ISD::CONVERGENCECTRL_ENTRY: return "convergencectrl_entry";
501 case ISD::CONVERGENCECTRL_LOOP: return "convergencectrl_loop";
502 case ISD::CONVERGENCECTRL_GLUE: return "convergencectrl_glue";
503
504 // Bit manipulation
505 case ISD::ABS: return "abs";
506 case ISD::BITREVERSE: return "bitreverse";
507 case ISD::BSWAP: return "bswap";
508 case ISD::CTPOP: return "ctpop";
509 case ISD::CTTZ: return "cttz";
510 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef";
511 case ISD::CTLZ: return "ctlz";
512 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef";
513 case ISD::PARITY: return "parity";
514
515 // Trampolines
516 case ISD::INIT_TRAMPOLINE: return "init_trampoline";
517 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
518
519 // clang-format on
520
521 case ISD::CONDCODE:
522 switch (cast<CondCodeSDNode>(this)->get()) {
523 default: llvm_unreachable("Unknown setcc condition!");
524 case ISD::SETOEQ: return "setoeq";
525 case ISD::SETOGT: return "setogt";
526 case ISD::SETOGE: return "setoge";
527 case ISD::SETOLT: return "setolt";
528 case ISD::SETOLE: return "setole";
529 case ISD::SETONE: return "setone";
530
531 case ISD::SETO: return "seto";
532 case ISD::SETUO: return "setuo";
533 case ISD::SETUEQ: return "setueq";
534 case ISD::SETUGT: return "setugt";
535 case ISD::SETUGE: return "setuge";
536 case ISD::SETULT: return "setult";
537 case ISD::SETULE: return "setule";
538 case ISD::SETUNE: return "setune";
539
540 case ISD::SETEQ: return "seteq";
541 case ISD::SETGT: return "setgt";
542 case ISD::SETGE: return "setge";
543 case ISD::SETLT: return "setlt";
544 case ISD::SETLE: return "setle";
545 case ISD::SETNE: return "setne";
546
547 case ISD::SETTRUE: return "settrue";
548 case ISD::SETTRUE2: return "settrue2";
549 case ISD::SETFALSE: return "setfalse";
550 case ISD::SETFALSE2: return "setfalse2";
551 }
552 case ISD::VECREDUCE_FADD: return "vecreduce_fadd";
553 case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd";
554 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul";
555 case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul";
556 case ISD::VECREDUCE_ADD: return "vecreduce_add";
557 case ISD::VECREDUCE_MUL: return "vecreduce_mul";
558 case ISD::VECREDUCE_AND: return "vecreduce_and";
559 case ISD::VECREDUCE_OR: return "vecreduce_or";
560 case ISD::VECREDUCE_XOR: return "vecreduce_xor";
561 case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
562 case ISD::VECREDUCE_SMIN: return "vecreduce_smin";
563 case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
564 case ISD::VECREDUCE_UMIN: return "vecreduce_umin";
565 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
566 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin";
567 case ISD::VECREDUCE_FMAXIMUM: return "vecreduce_fmaximum";
568 case ISD::VECREDUCE_FMINIMUM: return "vecreduce_fminimum";
569 case ISD::STACKMAP:
570 return "stackmap";
571 case ISD::PATCHPOINT:
572 return "patchpoint";
573 case ISD::CLEAR_CACHE:
574 return "clear_cache";
575
576 case ISD::EXPERIMENTAL_VECTOR_HISTOGRAM:
577 return "histogram";
578
579 case ISD::VECTOR_FIND_LAST_ACTIVE:
580 return "find_last_active";
581
582 case ISD::GET_ACTIVE_LANE_MASK:
583 return "get_active_lane_mask";
584
585 case ISD::PARTIAL_REDUCE_UMLA:
586 return "partial_reduce_umla";
587 case ISD::PARTIAL_REDUCE_SMLA:
588 return "partial_reduce_smla";
589 case ISD::PARTIAL_REDUCE_SUMLA:
590 return "partial_reduce_sumla";
591 case ISD::LOOP_DEPENDENCE_WAR_MASK:
592 return "loop_dep_war";
593 case ISD::LOOP_DEPENDENCE_RAW_MASK:
594 return "loop_dep_raw";
595
596 // Vector Predication
597#define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \
598 case ISD::SDID: \
599 return #NAME;
600#include "llvm/IR/VPIntrinsics.def"
601 }
602}
603
604const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
605 switch (AM) {
606 default: return "";
607 case ISD::PRE_INC: return "<pre-inc>";
608 case ISD::PRE_DEC: return "<pre-dec>";
609 case ISD::POST_INC: return "<post-inc>";
610 case ISD::POST_DEC: return "<post-dec>";
611 }
612}
613
614static Printable PrintNodeId(const SDNode &Node) {
615 return Printable([&Node](raw_ostream &OS) {
616#ifndef NDEBUG
617 static const raw_ostream::Colors Color[] = {
618 raw_ostream::BLACK, raw_ostream::RED, raw_ostream::GREEN,
619 raw_ostream::YELLOW, raw_ostream::BLUE, raw_ostream::MAGENTA,
620 raw_ostream::CYAN,
621 };
622 OS.changeColor(Color[Node.PersistentId % std::size(Color)]);
623 OS << 't' << Node.PersistentId;
624 OS.resetColor();
625#else
626 OS << (const void*)&Node;
627#endif
628 });
629}
630
631// Print the MMO with more information from the SelectionDAG.
632static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
633 const MachineFunction *MF, const Module *M,
634 const MachineFrameInfo *MFI,
635 const TargetInstrInfo *TII, LLVMContext &Ctx) {
636 ModuleSlotTracker MST(M);
637 if (MF)
638 MST.incorporateFunction(MF->getFunction());
639 SmallVector<StringRef, 0> SSNs;
640 MMO.print(OS, MST, SSNs, Ctx, MFI, TII);
641}
642
643static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
644 const SelectionDAG *G) {
645 if (G) {
646 const MachineFunction *MF = &G->getMachineFunction();
647 return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(),
648 &MF->getFrameInfo(),
649 G->getSubtarget().getInstrInfo(), *G->getContext());
650 }
651
652 LLVMContext Ctx;
653 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr,
654 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx);
655}
656
657#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
658LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
659
660LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const {
661 print(dbgs(), G);
662 dbgs() << '\n';
663}
664#endif
665
666void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
667 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
668 if (i) OS << ",";
669 if (getValueType(i) == MVT::Other)
670 OS << "ch";
671 else
672 OS << getValueType(i).getEVTString();
673 }
674}
675
676void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
677 if (getFlags().hasNoUnsignedWrap())
678 OS << " nuw";
679
680 if (getFlags().hasNoSignedWrap())
681 OS << " nsw";
682
683 if (getFlags().hasExact())
684 OS << " exact";
685
686 if (getFlags().hasDisjoint())
687 OS << " disjoint";
688
689 if (getFlags().hasSameSign())
690 OS << " samesign";
691
692 if (getFlags().hasNonNeg())
693 OS << " nneg";
694
695 if (getFlags().hasNoNaNs())
696 OS << " nnan";
697
698 if (getFlags().hasNoInfs())
699 OS << " ninf";
700
701 if (getFlags().hasNoSignedZeros())
702 OS << " nsz";
703
704 if (getFlags().hasAllowReciprocal())
705 OS << " arcp";
706
707 if (getFlags().hasAllowContract())
708 OS << " contract";
709
710 if (getFlags().hasApproximateFuncs())
711 OS << " afn";
712
713 if (getFlags().hasAllowReassociation())
714 OS << " reassoc";
715
716 if (getFlags().hasNoFPExcept())
717 OS << " nofpexcept";
718
719 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
720 if (!MN->memoperands_empty()) {
721 OS << "<";
722 OS << "Mem:";
723 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
724 e = MN->memoperands_end(); i != e; ++i) {
725 printMemOperand(OS, **i, G);
726 if (std::next(i) != e)
727 OS << " ";
728 }
729 OS << ">";
730 }
731 } else if (const ShuffleVectorSDNode *SVN =
732 dyn_cast<ShuffleVectorSDNode>(this)) {
733 OS << "<";
734 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
735 int Idx = SVN->getMaskElt(i);
736 if (i) OS << ",";
737 if (Idx < 0)
738 OS << "u";
739 else
740 OS << Idx;
741 }
742 OS << ">";
743 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
744 OS << '<' << CSDN->getAPIntValue() << '>';
745 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
746 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
747 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
748 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
749 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
750 else {
751 OS << "<APFloat(";
752 CSDN->getValueAPF().bitcastToAPInt().print(OS, false);
753 OS << ")>";
754 }
755 } else if (const GlobalAddressSDNode *GADN =
756 dyn_cast<GlobalAddressSDNode>(this)) {
757 int64_t offset = GADN->getOffset();
758 OS << '<';
759 GADN->getGlobal()->printAsOperand(OS);
760 OS << '>';
761 if (offset > 0)
762 OS << " + " << offset;
763 else
764 OS << " " << offset;
765 if (unsigned int TF = GADN->getTargetFlags())
766 OS << " [TF=" << TF << ']';
767 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
768 OS << "<" << FIDN->getIndex() << ">";
769 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
770 OS << "<" << JTDN->getIndex() << ">";
771 if (unsigned int TF = JTDN->getTargetFlags())
772 OS << " [TF=" << TF << ']';
773 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
774 int offset = CP->getOffset();
775 if (CP->isMachineConstantPoolEntry())
776 OS << "<" << *CP->getMachineCPVal() << ">";
777 else
778 OS << "<" << *CP->getConstVal() << ">";
779 if (offset > 0)
780 OS << " + " << offset;
781 else
782 OS << " " << offset;
783 if (unsigned int TF = CP->getTargetFlags())
784 OS << " [TF=" << TF << ']';
785 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) {
786 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
787 if (unsigned TF = TI->getTargetFlags())
788 OS << " [TF=" << TF << ']';
789 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
790 OS << "<";
791 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
792 if (LBB)
793 OS << LBB->getName() << " ";
794 OS << (const void*)BBDN->getBasicBlock() << ">";
795 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
796 OS << ' ' << printReg(R->getReg(),
797 G ? G->getSubtarget().getRegisterInfo() : nullptr);
798 } else if (const ExternalSymbolSDNode *ES =
799 dyn_cast<ExternalSymbolSDNode>(this)) {
800 OS << "'" << ES->getSymbol() << "'";
801 if (unsigned int TF = ES->getTargetFlags())
802 OS << " [TF=" << TF << ']';
803 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
804 if (M->getValue())
805 OS << "<" << M->getValue() << ">";
806 else
807 OS << "<null>";
808 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
809 if (MD->getMD())
810 OS << "<" << MD->getMD() << ">";
811 else
812 OS << "<null>";
813 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
814 OS << ":" << N->getVT();
815 }
816 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
817 OS << "<";
818
819 printMemOperand(OS, *LD->getMemOperand(), G);
820
821 bool doExt = true;
822 switch (LD->getExtensionType()) {
823 default: doExt = false; break;
824 case ISD::EXTLOAD: OS << ", anyext"; break;
825 case ISD::SEXTLOAD: OS << ", sext"; break;
826 case ISD::ZEXTLOAD: OS << ", zext"; break;
827 }
828 if (doExt)
829 OS << " from " << LD->getMemoryVT();
830
831 const char *AM = getIndexedModeName(LD->getAddressingMode());
832 if (*AM)
833 OS << ", " << AM;
834
835 OS << ">";
836 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
837 OS << "<";
838 printMemOperand(OS, *ST->getMemOperand(), G);
839
840 if (ST->isTruncatingStore())
841 OS << ", trunc to " << ST->getMemoryVT();
842
843 const char *AM = getIndexedModeName(ST->getAddressingMode());
844 if (*AM)
845 OS << ", " << AM;
846
847 OS << ">";
848 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) {
849 OS << "<";
850
851 printMemOperand(OS, *MLd->getMemOperand(), G);
852
853 bool doExt = true;
854 switch (MLd->getExtensionType()) {
855 default: doExt = false; break;
856 case ISD::EXTLOAD: OS << ", anyext"; break;
857 case ISD::SEXTLOAD: OS << ", sext"; break;
858 case ISD::ZEXTLOAD: OS << ", zext"; break;
859 }
860 if (doExt)
861 OS << " from " << MLd->getMemoryVT();
862
863 const char *AM = getIndexedModeName(MLd->getAddressingMode());
864 if (*AM)
865 OS << ", " << AM;
866
867 if (MLd->isExpandingLoad())
868 OS << ", expanding";
869
870 OS << ">";
871 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) {
872 OS << "<";
873 printMemOperand(OS, *MSt->getMemOperand(), G);
874
875 if (MSt->isTruncatingStore())
876 OS << ", trunc to " << MSt->getMemoryVT();
877
878 const char *AM = getIndexedModeName(MSt->getAddressingMode());
879 if (*AM)
880 OS << ", " << AM;
881
882 if (MSt->isCompressingStore())
883 OS << ", compressing";
884
885 OS << ">";
886 } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(this)) {
887 OS << "<";
888 printMemOperand(OS, *MGather->getMemOperand(), G);
889
890 bool doExt = true;
891 switch (MGather->getExtensionType()) {
892 default: doExt = false; break;
893 case ISD::EXTLOAD: OS << ", anyext"; break;
894 case ISD::SEXTLOAD: OS << ", sext"; break;
895 case ISD::ZEXTLOAD: OS << ", zext"; break;
896 }
897 if (doExt)
898 OS << " from " << MGather->getMemoryVT();
899
900 auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned";
901 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled";
902 OS << ", " << Signed << " " << Scaled << " offset";
903
904 OS << ">";
905 } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(this)) {
906 OS << "<";
907 printMemOperand(OS, *MScatter->getMemOperand(), G);
908
909 if (MScatter->isTruncatingStore())
910 OS << ", trunc to " << MScatter->getMemoryVT();
911
912 auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned";
913 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled";
914 OS << ", " << Signed << " " << Scaled << " offset";
915
916 OS << ">";
917 } else if (const MemSDNode *M = dyn_cast<MemSDNode>(this)) {
918 OS << "<";
919 printMemOperand(OS, *M->getMemOperand(), G);
920 if (auto *A = dyn_cast<AtomicSDNode>(M))
921 if (A->getOpcode() == ISD::ATOMIC_LOAD) {
922 bool doExt = true;
923 switch (A->getExtensionType()) {
924 default: doExt = false; break;
925 case ISD::EXTLOAD: OS << ", anyext"; break;
926 case ISD::SEXTLOAD: OS << ", sext"; break;
927 case ISD::ZEXTLOAD: OS << ", zext"; break;
928 }
929 if (doExt)
930 OS << " from " << A->getMemoryVT();
931 }
932 OS << ">";
933 } else if (const BlockAddressSDNode *BA =
934 dyn_cast<BlockAddressSDNode>(this)) {
935 int64_t offset = BA->getOffset();
936 OS << "<";
937 BA->getBlockAddress()->getFunction()->printAsOperand(OS, false);
938 OS << ", ";
939 BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false);
940 OS << ">";
941 if (offset > 0)
942 OS << " + " << offset;
943 else
944 OS << " " << offset;
945 if (unsigned int TF = BA->getTargetFlags())
946 OS << " [TF=" << TF << ']';
947 } else if (const AddrSpaceCastSDNode *ASC =
948 dyn_cast<AddrSpaceCastSDNode>(this)) {
949 OS << '['
950 << ASC->getSrcAddressSpace()
951 << " -> "
952 << ASC->getDestAddressSpace()
953 << ']';
954 } else if (const auto *AA = dyn_cast<AssertAlignSDNode>(this)) {
955 OS << '<' << AA->getAlign().value() << '>';
956 }
957
958 if (VerboseDAGDumping) {
959 if (unsigned Order = getIROrder())
960 OS << " [ORD=" << Order << ']';
961
962 if (getNodeId() != -1)
963 OS << " [ID=" << getNodeId() << ']';
964 if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this))))
965 OS << " # D:" << isDivergent();
966
967 if (G && !G->GetDbgValues(this).empty()) {
968 OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']';
969 for (SDDbgValue *Dbg : G->GetDbgValues(this))
970 if (!Dbg->isInvalidated())
971 Dbg->print(OS);
972 } else if (getHasDebugValue())
973 OS << " [NoOfDbgValues>0]";
974
975 if (const auto *MD = G ? G->getPCSections(this) : nullptr) {
976 OS << " [pcsections ";
977 MD->printAsOperand(OS, G->getMachineFunction().getFunction().getParent());
978 OS << ']';
979 }
980
981 if (MDNode *MMRA = G ? G->getMMRAMetadata(this) : nullptr) {
982 OS << " [mmra ";
983 MMRA->printAsOperand(OS,
984 G->getMachineFunction().getFunction().getParent());
985 OS << ']';
986 }
987 }
988}
989
990LLVM_DUMP_METHOD void SDDbgValue::print(raw_ostream &OS) const {
991 OS << " DbgVal(Order=" << getOrder() << ')';
992 if (isInvalidated())
993 OS << "(Invalidated)";
994 if (isEmitted())
995 OS << "(Emitted)";
996 OS << "(";
997 bool Comma = false;
998 for (const SDDbgOperand &Op : getLocationOps()) {
999 if (Comma)
1000 OS << ", ";
1001 switch (Op.getKind()) {
1002 case SDDbgOperand::SDNODE:
1003 if (Op.getSDNode())
1004 OS << "SDNODE=" << PrintNodeId(*Op.getSDNode()) << ':' << Op.getResNo();
1005 else
1006 OS << "SDNODE";
1007 break;
1008 case SDDbgOperand::CONST:
1009 OS << "CONST";
1010 break;
1011 case SDDbgOperand::FRAMEIX:
1012 OS << "FRAMEIX=" << Op.getFrameIx();
1013 break;
1014 case SDDbgOperand::VREG:
1015 OS << "VREG=" << printReg(Op.getVReg());
1016 break;
1017 }
1018 Comma = true;
1019 }
1020 OS << ")";
1021 if (isIndirect()) OS << "(Indirect)";
1022 if (isVariadic())
1023 OS << "(Variadic)";
1024 OS << ":\"" << Var->getName() << '"';
1025#ifndef NDEBUG
1026 if (Expr->getNumElements())
1027 Expr->dump();
1028#endif
1029}
1030
1031#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1032LLVM_DUMP_METHOD void SDDbgValue::dump() const {
1033 if (isInvalidated())
1034 return;
1035 print(dbgs());
1036 dbgs() << "\n";
1037}
1038#endif
1039
1040/// Return true if this node is so simple that we should just print it inline
1041/// if it appears as an operand.
1042static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) {
1043 // Avoid lots of cluttering when inline printing nodes with associated
1044 // DbgValues in verbose mode.
1045 if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty())
1046 return false;
1047 if (Node.getOpcode() == ISD::EntryToken)
1048 return false;
1049 return Node.getNumOperands() == 0;
1050}
1051
1052#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1053static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
1054 for (const SDValue &Op : N->op_values()) {
1055 if (shouldPrintInline(*Op.getNode(), G))
1056 continue;
1057 if (Op.getNode()->hasOneUse())
1058 DumpNodes(Op.getNode(), indent+2, G);
1059 }
1060
1061 dbgs().indent(indent);
1062 N->dump(G);
1063}
1064
1065LLVM_DUMP_METHOD void SelectionDAG::dump(bool Sorted) const {
1066 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
1067
1068 auto dumpEachNode = [this](const SDNode &N) {
1069 if (!N.hasOneUse() && &N != getRoot().getNode() &&
1070 (!shouldPrintInline(N, this) || N.use_empty()))
1071 DumpNodes(&N, 2, this);
1072 };
1073
1074 if (Sorted) {
1075 SmallVector<const SDNode *> SortedNodes;
1076 SortedNodes.reserve(AllNodes.size());
1077 getTopologicallyOrderedNodes(SortedNodes);
1078 for (const SDNode *N : SortedNodes)
1079 dumpEachNode(*N);
1080 } else {
1081 for (const SDNode &N : allnodes())
1082 dumpEachNode(N);
1083 }
1084
1085 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
1086 dbgs() << "\n";
1087
1088 if (VerboseDAGDumping) {
1089 if (DbgBegin() != DbgEnd())
1090 dbgs() << "SDDbgValues:\n";
1091 for (auto *Dbg : make_range(DbgBegin(), DbgEnd()))
1092 Dbg->dump();
1093 if (ByvalParmDbgBegin() != ByvalParmDbgEnd())
1094 dbgs() << "Byval SDDbgValues:\n";
1095 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd()))
1096 Dbg->dump();
1097 }
1098 dbgs() << "\n";
1099}
1100#endif
1101
1102void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
1103 OS << PrintNodeId(*this) << ": ";
1104 print_types(OS, G);
1105 OS << " = " << getOperationName(G);
1106 print_details(OS, G);
1107}
1108
1109static bool printOperand(raw_ostream &OS, const SelectionDAG *G,
1110 const SDValue Value) {
1111 if (!Value.getNode()) {
1112 OS << "<null>";
1113 return false;
1114 }
1115
1116 if (shouldPrintInline(*Value.getNode(), G)) {
1117 OS << Value->getOperationName(G) << ':';
1118 Value->print_types(OS, G);
1119 Value->print_details(OS, G);
1120 return true;
1121 }
1122
1123 OS << PrintNodeId(*Value.getNode());
1124 if (unsigned RN = Value.getResNo())
1125 OS << ':' << RN;
1126 return false;
1127}
1128
1129#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1130using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>;
1131
1132static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
1133 const SelectionDAG *G, VisitedSDNodeSet &once) {
1134 if (!once.insert(N).second) // If we've been here before, return now.
1135 return;
1136
1137 // Dump the current SDNode, but don't end the line yet.
1138 OS.indent(indent);
1139 N->printr(OS, G);
1140
1141 // Having printed this SDNode, walk the children:
1142 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
1143 if (i) OS << ",";
1144 OS << " ";
1145
1146 const SDValue Op = N->getOperand(i);
1147 bool printedInline = printOperand(OS, G, Op);
1148 if (printedInline)
1149 once.insert(Op.getNode());
1150 }
1151
1152 OS << "\n";
1153
1154 // Dump children that have grandchildren on their own line(s).
1155 for (const SDValue &Op : N->op_values())
1156 DumpNodesr(OS, Op.getNode(), indent+2, G, once);
1157}
1158
1159LLVM_DUMP_METHOD void SDNode::dumpr() const {
1160 VisitedSDNodeSet once;
1161 DumpNodesr(dbgs(), this, 0, nullptr, once);
1162}
1163
1164LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const {
1165 VisitedSDNodeSet once;
1166 DumpNodesr(dbgs(), this, 0, G, once);
1167}
1168#endif
1169
1170static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
1171 const SelectionDAG *G, unsigned depth,
1172 unsigned indent) {
1173 if (depth == 0)
1174 return;
1175
1176 OS.indent(indent);
1177
1178 N->print(OS, G);
1179
1180 for (const SDValue &Op : N->op_values()) {
1181 // Don't follow chain operands.
1182 if (Op.getValueType() == MVT::Other)
1183 continue;
1184 // Don't print children that were fully rendered inline.
1185 if (shouldPrintInline(*Op.getNode(), G))
1186 continue;
1187 OS << '\n';
1188 printrWithDepthHelper(OS, Op.getNode(), G, depth - 1, indent + 2);
1189 }
1190}
1191
1192void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
1193 unsigned depth) const {
1194 printrWithDepthHelper(OS, this, G, depth, 0);
1195}
1196
1197void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
1198 // Don't print impossibly deep things.
1199 printrWithDepth(OS, G, 10);
1200}
1201
1202#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1203LLVM_DUMP_METHOD
1204void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
1205 printrWithDepth(dbgs(), G, depth);
1206}
1207
1208LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const {
1209 // Don't print impossibly deep things.
1210 dumprWithDepth(G, 10);
1211}
1212#endif
1213
1214void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
1215 printr(OS, G);
1216 // Under VerboseDAGDumping divergence will be printed always.
1217 if (isDivergent() && !VerboseDAGDumping)
1218 OS << " # D:1";
1219 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
1220 if (i) OS << ", "; else OS << " ";
1221 printOperand(OS, G, getOperand(i));
1222 }
1223 if (DebugLoc DL = getDebugLoc()) {
1224 OS << ", ";
1225 DL.print(OS);
1226 }
1227}
APFloat.h
This file declares a class to represent arbitrary precision floating point values and provide a varie...
APInt.h
This file implements a class to represent arbitrary precision integral constant values and operations...
Scaled
@ Scaled
Definition ARCInstrInfo.cpp:35
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition ARMSLSHardening.cpp:73
A
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
LLVM_DUMP_METHOD
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds.
Definition Compiler.h:638
Constants.h
This file contains the declarations for the subclasses of Constant, which represent the different fla...
TII
const HexagonInstrInfo * TII
Definition HexagonCopyToCombine.cpp:118
hasNoSignedWrap
static bool hasNoSignedWrap(BinaryOperator &I)
Definition InstructionCombining.cpp:390
hasNoUnsignedWrap
static bool hasNoUnsignedWrap(BinaryOperator &I)
Definition InstructionCombining.cpp:385
G
#define G(x, y, z)
Definition MD5.cpp:56
MachineConstantPool.h
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
PrintNodeId
static Printable PrintNodeId(const SDNode &Node)
Definition SelectionDAGDumper.cpp:614
VisitedSDNodeSet
SmallPtrSet< const SDNode *, 32 > VisitedSDNodeSet
Definition SelectionDAGDumper.cpp:1130
VerboseDAGDumping
static cl::opt< bool > VerboseDAGDumping("dag-dump-verbose", cl::Hidden, cl::desc("Display more information when dumping selection " "DAG nodes."))
printOperand
static bool printOperand(raw_ostream &OS, const SelectionDAG *G, const SDValue Value)
Definition SelectionDAGDumper.cpp:1109
shouldPrintInline
static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G)
Return true if this node is so simple that we should just print it inline if it appears as an operand...
Definition SelectionDAGDumper.cpp:1042
DumpNodesr
static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, const SelectionDAG *G, VisitedSDNodeSet &once)
Definition SelectionDAGDumper.cpp:1132
printMemOperand
static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, const MachineFunction *MF, const Module *M, const MachineFrameInfo *MFI, const TargetInstrInfo *TII, LLVMContext &Ctx)
Definition SelectionDAGDumper.cpp:632
DumpNodes
static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G)
Definition SelectionDAGDumper.cpp:1053
printrWithDepthHelper
static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, const SelectionDAG *G, unsigned depth, unsigned indent)
Definition SelectionDAGDumper.cpp:1170
SmallPtrSet.h
This file defines the SmallPtrSet class.
StringExtras.h
This file contains some functions that are useful when dealing with strings.
TargetLowering.h
This file describes how to lower LLVM code to machine code.
llvm::DebugLoc
A debug info location.
Definition DebugLoc.h:124
llvm::GlobalValue::getParent
Module * getParent()
Get the module that this global value is contained inside of...
Definition GlobalValue.h:663
llvm::LLVMContext
This is an important class for using LLVM in a threaded context.
Definition LLVMContext.h:68
llvm::LoadSDNode
This class is used to represent ISD::LOAD nodes.
Definition SelectionDAGNodes.h:2539
llvm::MDNode
Metadata node.
Definition Metadata.h:1078
llvm::MachineFrameInfo
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
Definition MachineFrameInfo.h:111
llvm::MachineFunction::getFrameInfo
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Definition MachineFunction.h:778
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition MachineFunction.h:733
llvm::MachineMemOperand
A description of a memory reference used in the backend.
Definition MachineMemOperand.h:130
llvm::MachineMemOperand::print
LLVM_ABI void print(raw_ostream &OS, ModuleSlotTracker &MST, SmallVectorImpl< StringRef > &SSNs, const LLVMContext &Context, const MachineFrameInfo *MFI, const TargetInstrInfo *TII) const
Support for operator<<.
Definition MachineOperand.cpp:1155
llvm::MachineSDNode
An SDNode that represents everything that will be needed to construct a MachineInstr.
Definition SelectionDAGNodes.h:3149
llvm::MachineSDNode::mmo_iterator
ArrayRef< MachineMemOperand * >::const_iterator mmo_iterator
Definition SelectionDAGNodes.h:3179
llvm::MaskedLoadSDNode
This class is used to represent an MLOAD node.
Definition SelectionDAGNodes.h:2846
llvm::MaskedStoreSDNode
This class is used to represent an MSTORE node.
Definition SelectionDAGNodes.h:2875
llvm::MemSDNode
This is an abstract virtual class for memory operations.
Definition SelectionDAGNodes.h:1397
llvm::ModuleSlotTracker
Manage lifetime of a slot tracker for printing IR.
Definition ModuleSlotTracker.h:45
llvm::ModuleSlotTracker::incorporateFunction
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition AsmWriter.cpp:974
llvm::Module
A Module instance is used to store all the information related to an LLVM module.
Definition Module.h:67
llvm::Printable
Simple wrapper around std::function<void(raw_ostream&)>.
Definition Printable.h:38
llvm::SDDbgOperand
Holds the information for a single machine location through SDISel; either an SDNode,...
Definition SDNodeDbgValue.h:32
llvm::SDDbgOperand::VREG
@ VREG
Value is a virtual register.
Definition SDNodeDbgValue.h:38
llvm::SDDbgOperand::FRAMEIX
@ FRAMEIX
Value is contents of a stack location.
Definition SDNodeDbgValue.h:37
llvm::SDDbgOperand::SDNODE
@ SDNODE
Value is the result of an expression.
Definition SDNodeDbgValue.h:35
llvm::SDDbgOperand::CONST
@ CONST
Value is a constant.
Definition SDNodeDbgValue.h:36
llvm::SDDbgValue
Holds the information from a dbg_value node through SDISel.
Definition SDNodeDbgValue.h:134
llvm::SDDbgValue::isEmitted
bool isEmitted() const
Definition SDNodeDbgValue.h:230
llvm::SDDbgValue::print
LLVM_DUMP_METHOD void print(raw_ostream &OS) const
Definition SelectionDAGDumper.cpp:990
llvm::SDDbgValue::getOrder
unsigned getOrder() const
Returns the SDNodeOrder.
Definition SDNodeDbgValue.h:219
llvm::SDDbgValue::dump
LLVM_DUMP_METHOD void dump() const
Definition SelectionDAGDumper.cpp:1032
llvm::SDDbgValue::isInvalidated
bool isInvalidated() const
Definition SDNodeDbgValue.h:225
llvm::SDDbgValue::getLocationOps
ArrayRef< SDDbgOperand > getLocationOps() const
Definition SDNodeDbgValue.h:186
llvm::SDDbgValue::isIndirect
bool isIndirect() const
Returns whether this is an indirect value.
Definition SDNodeDbgValue.h:210
llvm::SDDbgValue::isVariadic
bool isVariadic() const
Definition SDNodeDbgValue.h:212
llvm::SDNode
Represents one node in the SelectionDAG.
Definition SelectionDAGNodes.h:501
llvm::SDNode::isMachineOpcode
bool isMachineOpcode() const
Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode.
Definition SelectionDAGNodes.h:745
llvm::SDNode::dumprFull
LLVM_ABI void dumprFull(const SelectionDAG *G=nullptr) const
printrFull to dbgs().
Definition SelectionDAGDumper.cpp:1208
llvm::SDNode::getNodeId
int getNodeId() const
Return the unique node id.
Definition SelectionDAGNodes.h:771
llvm::SDNode::dump
LLVM_ABI void dump() const
Dump this node, for debugging.
Definition SelectionDAGDumper.cpp:658
llvm::SDNode::getOpcode
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
Definition SelectionDAGNodes.h:692
llvm::SDNode::isDivergent
bool isDivergent() const
Definition SelectionDAGNodes.h:758
llvm::SDNode::getIndexedModeName
static LLVM_ABI const char * getIndexedModeName(ISD::MemIndexedMode AM)
Definition SelectionDAGDumper.cpp:604
llvm::SDNode::getIROrder
unsigned getIROrder() const
Return the node ordering.
Definition SelectionDAGNodes.h:783
llvm::SDNode::getHasDebugValue
bool getHasDebugValue() const
Definition SelectionDAGNodes.h:755
llvm::SDNode::dumpr
LLVM_ABI void dumpr() const
Dump (recursively) this node and its use-def subgraph.
Definition SelectionDAGDumper.cpp:1159
llvm::SDNode::getFlags
SDNodeFlags getFlags() const
Definition SelectionDAGNodes.h:1085
llvm::SDNode::getOperationName
LLVM_ABI std::string getOperationName(const SelectionDAG *G=nullptr) const
Return the opcode of this operation for printing.
Definition SelectionDAGDumper.cpp:58
llvm::SDNode::printrFull
LLVM_ABI void printrFull(raw_ostream &O, const SelectionDAG *G=nullptr) const
Print a SelectionDAG node and all children down to the leaves.
Definition SelectionDAGDumper.cpp:1197
llvm::SDNode::SelectionDAG
friend class SelectionDAG
Definition SelectionDAGNodes.h:642
llvm::SDNode::printr
LLVM_ABI void printr(raw_ostream &OS, const SelectionDAG *G=nullptr) const
Definition SelectionDAGDumper.cpp:1102
llvm::SDNode::getAsZExtVal
uint64_t getAsZExtVal() const
Helper method returns the zero-extended integer value of a ConstantSDNode.
Definition SelectionDAGNodes.h:1783
llvm::SDNode::getNumValues
unsigned getNumValues() const
Return the number of values defined/returned by this operator.
Definition SelectionDAGNodes.h:1101
llvm::SDNode::getNumOperands
unsigned getNumOperands() const
Return the number of values used by this operation.
Definition SelectionDAGNodes.h:1013
llvm::SDNode::getMachineOpcode
unsigned getMachineOpcode() const
This may only be called if isMachineOpcode returns true.
Definition SelectionDAGNodes.h:750
llvm::SDNode::getOperand
const SDValue & getOperand(unsigned Num) const
Definition SelectionDAGNodes.h:1034
llvm::SDNode::print
LLVM_ABI void print(raw_ostream &OS, const SelectionDAG *G=nullptr) const
Definition SelectionDAGDumper.cpp:1214
llvm::SDNode::getDebugLoc
const DebugLoc & getDebugLoc() const
Return the source location info.
Definition SelectionDAGNodes.h:789
llvm::SDNode::printrWithDepth
LLVM_ABI void printrWithDepth(raw_ostream &O, const SelectionDAG *G=nullptr, unsigned depth=100) const
Print a SelectionDAG node and children up to depth "depth." The given SelectionDAG allows target-spec...
Definition SelectionDAGDumper.cpp:1192
llvm::SDNode::dumprWithDepth
LLVM_ABI void dumprWithDepth(const SelectionDAG *G=nullptr, unsigned depth=100) const
printrWithDepth to dbgs().
Definition SelectionDAGDumper.cpp:1204
llvm::SDNode::getValueType
EVT getValueType(unsigned ResNo) const
Return the type of a specified result.
Definition SelectionDAGNodes.h:1104
llvm::SDNode::print_details
LLVM_ABI void print_details(raw_ostream &OS, const SelectionDAG *G) const
Definition SelectionDAGDumper.cpp:676
llvm::SDNode::print_types
LLVM_ABI void print_types(raw_ostream &OS, const SelectionDAG *G) const
Definition SelectionDAGDumper.cpp:666
llvm::SDValue
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Definition SelectionDAGNodes.h:147
llvm::SelectionDAGTargetInfo
Targets can subclass this to parameterize the SelectionDAG lowering and instruction selection process...
Definition SelectionDAGTargetInfo.h:33
llvm::SelectionDAGTargetInfo::getTargetNodeName
virtual const char * getTargetNodeName(unsigned Opcode) const
Returns the name of the given target-specific opcode, suitable for debug printing.
Definition SelectionDAGTargetInfo.h:42
llvm::SelectionDAG
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition SelectionDAG.h:229
llvm::SelectionDAG::getRoot
const SDValue & getRoot() const
Return the root tag of the SelectionDAG.
Definition SelectionDAG.h:578
llvm::SelectionDAG::ByvalParmDbgEnd
SDDbgInfo::DbgIterator ByvalParmDbgEnd() const
Definition SelectionDAG.h:2003
llvm::SelectionDAG::ByvalParmDbgBegin
SDDbgInfo::DbgIterator ByvalParmDbgBegin() const
Definition SelectionDAG.h:2000
llvm::SelectionDAG::dump
LLVM_ABI void dump(bool Sorted=false) const
Dump the textual format of this DAG.
Definition SelectionDAGDumper.cpp:1065
llvm::SelectionDAG::DbgEnd
SDDbgInfo::DbgIterator DbgEnd() const
Definition SelectionDAG.h:1998
llvm::SelectionDAG::DbgBegin
SDDbgInfo::DbgIterator DbgBegin() const
Definition SelectionDAG.h:1997
llvm::SelectionDAG::allnodes
iterator_range< allnodes_iterator > allnodes()
Definition SelectionDAG.h:570
llvm::SelectionDAG::getNode
LLVM_ABI SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
Definition SelectionDAG.cpp:10900
llvm::SelectionDAG::getTopologicallyOrderedNodes
LLVM_ABI void getTopologicallyOrderedNodes(SmallVectorImpl< const SDNode * > &SortedNodes) const
Get all the nodes in their topological order without modifying any states.
Definition SelectionDAG.cpp:12712
llvm::ShuffleVectorSDNode
This SDNode is used to implement the code generator support for the llvm IR shufflevector instruction...
Definition SelectionDAGNodes.h:1680
llvm::SmallPtrSetImpl::insert
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition SmallPtrSet.h:389
llvm::SmallPtrSet
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
Definition SmallPtrSet.h:527
llvm::SmallVectorImpl::reserve
void reserve(size_type N)
Definition SmallVector.h:663
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition SmallVector.h:1196
llvm::SrcValueSDNode
An SDNode that holds an arbitrary LLVM IR Value.
Definition SelectionDAGNodes.h:2320
llvm::StoreSDNode
This class is used to represent ISD::STORE nodes.
Definition SelectionDAGNodes.h:2567
llvm::StringRef::str
std::string str() const
str - Get the contents as an std::string.
Definition StringRef.h:225
llvm::TargetIndexSDNode
Completely target-dependent object reference.
Definition SelectionDAGNodes.h:2138
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition TargetInstrInfo.h:114
llvm::TargetLowering
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Definition TargetLowering.h:3941
llvm::TargetLowering::getTargetNodeName
virtual const char * getTargetNodeName(unsigned Opcode) const
This method returns the name of a target specific DAG node.
Definition TargetLowering.cpp:50
llvm::VTSDNode
This class is used to represent EVT's, which are used to parameterize some operations.
Definition SelectionDAGNodes.h:2488
llvm::Value
LLVM Value Representation.
Definition Value.h:75
llvm::Value::getName
LLVM_ABI StringRef getName() const
Return a constant reference to the value's name.
Definition Value.cpp:322
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition raw_ostream.h:53
llvm::raw_ostream::YELLOW
static constexpr Colors YELLOW
Definition raw_ostream.h:118
llvm::raw_ostream::CYAN
static constexpr Colors CYAN
Definition raw_ostream.h:121
llvm::raw_ostream::Colors
Colors
Definition raw_ostream.h:94
llvm::raw_ostream::changeColor
virtual raw_ostream & changeColor(enum Colors Color, bool Bold=false, bool BG=false)
Changes the foreground color of text that will be output from this point forward.
Definition raw_ostream.cpp:520
llvm::raw_ostream::resetColor
virtual raw_ostream & resetColor()
Resets the colors to terminal defaults.
Definition raw_ostream.cpp:533
llvm::raw_ostream::BLUE
static constexpr Colors BLUE
Definition raw_ostream.h:119
llvm::raw_ostream::indent
raw_ostream & indent(unsigned NumSpaces)
indent - Insert 'NumSpaces' spaces.
Definition raw_ostream.cpp:495
llvm::raw_ostream::MAGENTA
static constexpr Colors MAGENTA
Definition raw_ostream.h:120
llvm::raw_ostream::BLACK
static constexpr Colors BLACK
Definition raw_ostream.h:115
llvm::raw_ostream::GREEN
static constexpr Colors GREEN
Definition raw_ostream.h:117
llvm::raw_ostream::RED
static constexpr Colors RED
Definition raw_ostream.h:116
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition ErrorHandling.h:164
llvm::AA
Abstract Attribute helper functions.
Definition Attributor.h:165
llvm::ISD::SETCC
@ SETCC
SetCC operator - This evaluates to a true value iff the condition is true.
Definition ISDOpcodes.h:807
llvm::ISD::MERGE_VALUES
@ MERGE_VALUES
MERGE_VALUES - This node takes multiple discrete operands and returns them all as its individual resu...
Definition ISDOpcodes.h:256
llvm::ISD::CTLZ_ZERO_UNDEF
@ CTLZ_ZERO_UNDEF
Definition ISDOpcodes.h:780
llvm::ISD::TargetConstantPool
@ TargetConstantPool
Definition ISDOpcodes.h:184
llvm::ISD::STRICT_FSETCC
@ STRICT_FSETCC
STRICT_FSETCC/STRICT_FSETCCS - Constrained versions of SETCC, used for floating-point operands only.
Definition ISDOpcodes.h:504
llvm::ISD::DELETED_NODE
@ DELETED_NODE
DELETED_NODE - This is an illegal value that is used to catch errors.
Definition ISDOpcodes.h:45
llvm::ISD::POISON
@ POISON
POISON - A poison node.
Definition ISDOpcodes.h:231
llvm::ISD::LOOP_DEPENDENCE_RAW_MASK
@ LOOP_DEPENDENCE_RAW_MASK
Definition ISDOpcodes.h:1571
llvm::ISD::EH_SJLJ_LONGJMP
@ EH_SJLJ_LONGJMP
OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer) This corresponds to the eh.sjlj.longjmp intrinsic.
Definition ISDOpcodes.h:163
llvm::ISD::FGETSIGN
@ FGETSIGN
INT = FGETSIGN(FP) - Return the sign bit of the specified floating point value as an integer 0/1 valu...
Definition ISDOpcodes.h:531
llvm::ISD::SMUL_LOHI
@ SMUL_LOHI
SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing a signed/unsigned value of type i[2...
Definition ISDOpcodes.h:270
llvm::ISD::INSERT_SUBVECTOR
@ INSERT_SUBVECTOR
INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector with VECTOR2 inserted into VECTOR1.
Definition ISDOpcodes.h:593
llvm::ISD::BSWAP
@ BSWAP
Byte Swap and Counting operators.
Definition ISDOpcodes.h:771
llvm::ISD::SMULFIX
@ SMULFIX
RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on 2 integers with the same...
Definition ISDOpcodes.h:387
llvm::ISD::TargetBlockAddress
@ TargetBlockAddress
Definition ISDOpcodes.h:186
llvm::ISD::ADDC
@ ADDC
Carry-setting nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:289
llvm::ISD::FRAME_TO_ARGS_OFFSET
@ FRAME_TO_ARGS_OFFSET
FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to first (possible) on-stack ar...
Definition ISDOpcodes.h:140
llvm::ISD::FMAD
@ FMAD
FMAD - Perform a * b + c, while getting the same result as the separately rounded operations.
Definition ISDOpcodes.h:515
llvm::ISD::ADD
@ ADD
Simple integer binary arithmetic operators.
Definition ISDOpcodes.h:259
llvm::ISD::SMULFIXSAT
@ SMULFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition ISDOpcodes.h:393
llvm::ISD::ANY_EXTEND
@ ANY_EXTEND
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition ISDOpcodes.h:841
llvm::ISD::FMA
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
Definition ISDOpcodes.h:511
llvm::ISD::INTRINSIC_VOID
@ INTRINSIC_VOID
OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) This node represents a target intrin...
Definition ISDOpcodes.h:215
llvm::ISD::EH_SJLJ_SETUP_DISPATCH
@ EH_SJLJ_SETUP_DISPATCH
OUTCHAIN = EH_SJLJ_SETUP_DISPATCH(INCHAIN) The target initializes the dispatch table here.
Definition ISDOpcodes.h:167
llvm::ISD::GlobalAddress
@ GlobalAddress
Definition ISDOpcodes.h:88
llvm::ISD::STRICT_FMINIMUM
@ STRICT_FMINIMUM
Definition ISDOpcodes.h:464
llvm::ISD::SINT_TO_FP
@ SINT_TO_FP
[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter)...
Definition ISDOpcodes.h:868
llvm::ISD::CONCAT_VECTORS
@ CONCAT_VECTORS
CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of vector type with the same length ...
Definition ISDOpcodes.h:577
llvm::ISD::FADD
@ FADD
Simple binary floating point operators.
Definition ISDOpcodes.h:410
llvm::ISD::ABS
@ ABS
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth.
Definition ISDOpcodes.h:744
llvm::ISD::SIGN_EXTEND_VECTOR_INREG
@ SIGN_EXTEND_VECTOR_INREG
SIGN_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register sign-extension of the low ...
Definition ISDOpcodes.h:898
llvm::ISD::SDIVREM
@ SDIVREM
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition ISDOpcodes.h:275
llvm::ISD::FMULADD
@ FMULADD
FMULADD - Performs a * b + c, with, or without, intermediate rounding.
Definition ISDOpcodes.h:521
llvm::ISD::FPTRUNC_ROUND
@ FPTRUNC_ROUND
FPTRUNC_ROUND - This corresponds to the fptrunc_round intrinsic.
Definition ISDOpcodes.h:508
llvm::ISD::BUILD_PAIR
@ BUILD_PAIR
BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
Definition ISDOpcodes.h:249
llvm::ISD::SDIVFIX
@ SDIVFIX
RESULT = [US]DIVFIX(LHS, RHS, SCALE) - Perform fixed point division on 2 integers with the same width...
Definition ISDOpcodes.h:400
llvm::ISD::STRICT_FSQRT
@ STRICT_FSQRT
Constrained versions of libm-equivalent floating point intrinsics.
Definition ISDOpcodes.h:431
llvm::ISD::BUILTIN_OP_END
@ BUILTIN_OP_END
BUILTIN_OP_END - This must be the last enum value in this list.
Definition ISDOpcodes.h:1580
llvm::ISD::GlobalTLSAddress
@ GlobalTLSAddress
Definition ISDOpcodes.h:89
llvm::ISD::EH_RETURN
@ EH_RETURN
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 'eh_return' gcc dwarf builtin,...
Definition ISDOpcodes.h:151
llvm::ISD::SIGN_EXTEND
@ SIGN_EXTEND
Conversion operators.
Definition ISDOpcodes.h:832
llvm::ISD::AVGCEILS
@ AVGCEILS
AVGCEILS/AVGCEILU - Rounding averaging add - Add two integers using an integer of type i[N+2],...
Definition ISDOpcodes.h:712
llvm::ISD::STRICT_UINT_TO_FP
@ STRICT_UINT_TO_FP
Definition ISDOpcodes.h:478
llvm::ISD::SCALAR_TO_VECTOR
@ SCALAR_TO_VECTOR
SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a scalar value into element 0 of the...
Definition ISDOpcodes.h:662
llvm::ISD::ADDROFRETURNADDR
@ ADDROFRETURNADDR
ADDROFRETURNADDR - Represents the llvm.addressofreturnaddress intrinsic.
Definition ISDOpcodes.h:117
llvm::ISD::TargetExternalSymbol
@ TargetExternalSymbol
Definition ISDOpcodes.h:185
llvm::ISD::CTTZ_ZERO_UNDEF
@ CTTZ_ZERO_UNDEF
Bit counting operators with an undefined result for zero inputs.
Definition ISDOpcodes.h:779
llvm::ISD::TargetJumpTable
@ TargetJumpTable
Definition ISDOpcodes.h:183
llvm::ISD::TargetIndex
@ TargetIndex
TargetIndex - Like a constant pool entry, but with completely target-dependent semantics.
Definition ISDOpcodes.h:193
llvm::ISD::TRUNCATE_SSAT_U
@ TRUNCATE_SSAT_U
Definition ISDOpcodes.h:861
llvm::ISD::SETCCCARRY
@ SETCCCARRY
Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but op #2 is a boolean indicating ...
Definition ISDOpcodes.h:815
llvm::ISD::SSUBO
@ SSUBO
Same for subtraction.
Definition ISDOpcodes.h:347
llvm::ISD::VECTOR_INTERLEAVE
@ VECTOR_INTERLEAVE
VECTOR_INTERLEAVE(VEC1, VEC2, ...) - Returns N vectors from N input vectors, where N is the factor to...
Definition ISDOpcodes.h:628
llvm::ISD::STEP_VECTOR
@ STEP_VECTOR
STEP_VECTOR(IMM) - Returns a scalable vector whose lanes are comprised of a linear sequence of unsign...
Definition ISDOpcodes.h:688
llvm::ISD::FCANONICALIZE
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
Definition ISDOpcodes.h:534
llvm::ISD::IS_FPCLASS
@ IS_FPCLASS
Performs a check of floating point class property, defined by IEEE-754.
Definition ISDOpcodes.h:541
llvm::ISD::SSUBSAT
@ SSUBSAT
RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 integers with the same bit width ...
Definition ISDOpcodes.h:369
llvm::ISD::SELECT
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
Definition ISDOpcodes.h:784
llvm::ISD::UNDEF
@ UNDEF
UNDEF - An undefined node.
Definition ISDOpcodes.h:228
llvm::ISD::EXTRACT_ELEMENT
@ EXTRACT_ELEMENT
EXTRACT_ELEMENT - This is used to get the lower or upper (determined by a Constant,...
Definition ISDOpcodes.h:242
llvm::ISD::SPLAT_VECTOR
@ SPLAT_VECTOR
SPLAT_VECTOR(VAL) - Returns a vector with the scalar value VAL duplicated in all lanes.
Definition ISDOpcodes.h:669
llvm::ISD::AssertAlign
@ AssertAlign
AssertAlign - These nodes record if a register contains a value that has a known alignment and the tr...
Definition ISDOpcodes.h:69
llvm::ISD::BasicBlock
@ BasicBlock
Various leaf nodes.
Definition ISDOpcodes.h:81
llvm::ISD::CopyFromReg
@ CopyFromReg
CopyFromReg - This node indicates that the input value is a virtual or physical register that is defi...
Definition ISDOpcodes.h:225
llvm::ISD::SADDO
@ SADDO
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition ISDOpcodes.h:343
llvm::ISD::TargetGlobalAddress
@ TargetGlobalAddress
TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node...
Definition ISDOpcodes.h:180
llvm::ISD::GET_ROUNDING
@ GET_ROUNDING
Returns current rounding mode: -1 Undefined 0 Round to 0 1 Round to nearest, ties to even 2 Round to ...
Definition ISDOpcodes.h:958
llvm::ISD::MULHU
@ MULHU
MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing an unsigned/signed value of...
Definition ISDOpcodes.h:701
llvm::ISD::SHL
@ SHL
Shift and rotation operations.
Definition ISDOpcodes.h:762
llvm::ISD::AssertNoFPClass
@ AssertNoFPClass
AssertNoFPClass - These nodes record if a register contains a float value that is known to be not som...
Definition ISDOpcodes.h:78
llvm::ISD::VECTOR_SHUFFLE
@ VECTOR_SHUFFLE
VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as VEC1/VEC2.
Definition ISDOpcodes.h:642
llvm::ISD::PtrAuthGlobalAddress
@ PtrAuthGlobalAddress
A ptrauth constant.
Definition ISDOpcodes.h:100
llvm::ISD::EXTRACT_SUBVECTOR
@ EXTRACT_SUBVECTOR
EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR.
Definition ISDOpcodes.h:607
llvm::ISD::STRICT_FMAXIMUM
@ STRICT_FMAXIMUM
Definition ISDOpcodes.h:463
llvm::ISD::EntryToken
@ EntryToken
EntryToken - This is the marker used to indicate the start of a region.
Definition ISDOpcodes.h:48
llvm::ISD::READ_REGISTER
@ READ_REGISTER
READ_REGISTER, WRITE_REGISTER - This node represents llvm.register on the DAG, which implements the n...
Definition ISDOpcodes.h:134
llvm::ISD::EXTRACT_VECTOR_ELT
@ EXTRACT_VECTOR_ELT
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
Definition ISDOpcodes.h:569
llvm::ISD::CopyToReg
@ CopyToReg
CopyToReg - This node has three operands: a chain, a register number to set to this value,...
Definition ISDOpcodes.h:219
llvm::ISD::ZERO_EXTEND
@ ZERO_EXTEND
ZERO_EXTEND - Used for integer types, zeroing the new bits.
Definition ISDOpcodes.h:838
llvm::ISD::TargetConstantFP
@ TargetConstantFP
Definition ISDOpcodes.h:175
llvm::ISD::SELECT_CC
@ SELECT_CC
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
Definition ISDOpcodes.h:799
llvm::ISD::LOCAL_RECOVER
@ LOCAL_RECOVER
LOCAL_RECOVER - Represents the llvm.localrecover intrinsic.
Definition ISDOpcodes.h:130
llvm::ISD::SSHLSAT
@ SSHLSAT
RESULT = [US]SHLSAT(LHS, RHS) - Perform saturation left shift.
Definition ISDOpcodes.h:379
llvm::ISD::SMULO
@ SMULO
Same for multiplication.
Definition ISDOpcodes.h:351
llvm::ISD::TargetFrameIndex
@ TargetFrameIndex
Definition ISDOpcodes.h:182
llvm::ISD::ANY_EXTEND_VECTOR_INREG
@ ANY_EXTEND_VECTOR_INREG
ANY_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register any-extension of the low la...
Definition ISDOpcodes.h:887
llvm::ISD::SIGN_EXTEND_INREG
@ SIGN_EXTEND_INREG
SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to sign extend a small value in ...
Definition ISDOpcodes.h:876
llvm::ISD::SMIN
@ SMIN
[US]{MIN/MAX} - Binary minimum or maximum of signed or unsigned integers.
Definition ISDOpcodes.h:724
llvm::ISD::VECTOR_REVERSE
@ VECTOR_REVERSE
VECTOR_REVERSE(VECTOR) - Returns a vector, of the same type as VECTOR, whose elements are shuffled us...
Definition ISDOpcodes.h:633
llvm::ISD::SDIVFIXSAT
@ SDIVFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition ISDOpcodes.h:406
llvm::ISD::GLOBAL_OFFSET_TABLE
@ GLOBAL_OFFSET_TABLE
The address of the GOT.
Definition ISDOpcodes.h:103
llvm::ISD::VSELECT
@ VSELECT
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition ISDOpcodes.h:793
llvm::ISD::UADDO_CARRY
@ UADDO_CARRY
Carry-using nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:323
llvm::ISD::STRICT_SINT_TO_FP
@ STRICT_SINT_TO_FP
STRICT_[US]INT_TO_FP - Convert a signed or unsigned integer to a floating point value.
Definition ISDOpcodes.h:477
llvm::ISD::STRICT_FROUNDEVEN
@ STRICT_FROUNDEVEN
Definition ISDOpcodes.h:457
llvm::ISD::EH_DWARF_CFA
@ EH_DWARF_CFA
EH_DWARF_CFA - This node represents the pointer to the DWARF Canonical Frame Address (CFA),...
Definition ISDOpcodes.h:145
llvm::ISD::FRAMEADDR
@ FRAMEADDR
FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and llvm.returnaddress on the DAG.
Definition ISDOpcodes.h:110
llvm::ISD::STRICT_FP_TO_UINT
@ STRICT_FP_TO_UINT
Definition ISDOpcodes.h:471
llvm::ISD::STRICT_FP_ROUND
@ STRICT_FP_ROUND
X = STRICT_FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision ...
Definition ISDOpcodes.h:493
llvm::ISD::STRICT_FP_TO_SINT
@ STRICT_FP_TO_SINT
STRICT_FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition ISDOpcodes.h:470
llvm::ISD::FP_TO_SINT
@ FP_TO_SINT
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition ISDOpcodes.h:914
llvm::ISD::TargetConstant
@ TargetConstant
TargetConstant* - Like Constant*, but the DAG does not do any folding, simplification,...
Definition ISDOpcodes.h:174
llvm::ISD::STRICT_FP_EXTEND
@ STRICT_FP_EXTEND
X = STRICT_FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition ISDOpcodes.h:498
llvm::ISD::AND
@ AND
Bitwise operators - logical and, logical or, logical xor.
Definition ISDOpcodes.h:736
llvm::ISD::INTRINSIC_WO_CHAIN
@ INTRINSIC_WO_CHAIN
RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic fun...
Definition ISDOpcodes.h:200
llvm::ISD::SCMP
@ SCMP
[US]CMP - 3-way comparison of signed or unsigned integers.
Definition ISDOpcodes.h:732
llvm::ISD::CARRY_FALSE
@ CARRY_FALSE
CARRY_FALSE - This node is used when folding other nodes, like ADDC/SUBC, which indicate the carry re...
Definition ISDOpcodes.h:280
llvm::ISD::AVGFLOORS
@ AVGFLOORS
AVGFLOORS/AVGFLOORU - Averaging add - Add two integers using an integer of type i[N+1],...
Definition ISDOpcodes.h:707
llvm::ISD::ADDE
@ ADDE
Carry-using nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:299
llvm::ISD::STRICT_FADD
@ STRICT_FADD
Constrained versions of the binary floating point operators.
Definition ISDOpcodes.h:420
llvm::ISD::SPLAT_VECTOR_PARTS
@ SPLAT_VECTOR_PARTS
SPLAT_VECTOR_PARTS(SCALAR1, SCALAR2, ...) - Returns a vector with the scalar values joined together a...
Definition ISDOpcodes.h:678
llvm::ISD::FREEZE
@ FREEZE
FREEZE - FREEZE(VAL) returns an arbitrary value if VAL is UNDEF (or is evaluated to UNDEF),...
Definition ISDOpcodes.h:236
llvm::ISD::INSERT_VECTOR_ELT
@ INSERT_VECTOR_ELT
INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL.
Definition ISDOpcodes.h:558
llvm::ISD::TokenFactor
@ TokenFactor
TokenFactor - This node takes multiple tokens as input and produces a single token result.
Definition ISDOpcodes.h:53
llvm::ISD::VECTOR_SPLICE
@ VECTOR_SPLICE
VECTOR_SPLICE(VEC1, VEC2, IMM) - Returns a subvector of the same type as VEC1/VEC2 from CONCAT_VECTOR...
Definition ISDOpcodes.h:654
llvm::ISD::ExternalSymbol
@ ExternalSymbol
Definition ISDOpcodes.h:93
llvm::ISD::FP_ROUND
@ FP_ROUND
X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision of the ...
Definition ISDOpcodes.h:947
llvm::ISD::VECTOR_COMPRESS
@ VECTOR_COMPRESS
VECTOR_COMPRESS(Vec, Mask, Passthru) consecutively place vector elements based on mask e....
Definition ISDOpcodes.h:696
llvm::ISD::SPONENTRY
@ SPONENTRY
SPONENTRY - Represents the llvm.sponentry intrinsic.
Definition ISDOpcodes.h:122
llvm::ISD::ZERO_EXTEND_VECTOR_INREG
@ ZERO_EXTEND_VECTOR_INREG
ZERO_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register zero-extension of the low ...
Definition ISDOpcodes.h:909
llvm::ISD::STRICT_FNEARBYINT
@ STRICT_FNEARBYINT
Definition ISDOpcodes.h:451
llvm::ISD::FP_TO_SINT_SAT
@ FP_TO_SINT_SAT
FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a signed or unsigned scalar integer ...
Definition ISDOpcodes.h:933
llvm::ISD::EH_SJLJ_SETJMP
@ EH_SJLJ_SETJMP
RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer) This corresponds to the eh.sjlj....
Definition ISDOpcodes.h:157
llvm::ISD::TRUNCATE
@ TRUNCATE
TRUNCATE - Completely drop the high bits.
Definition ISDOpcodes.h:844
llvm::ISD::SHL_PARTS
@ SHL_PARTS
SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded integer shift operations.
Definition ISDOpcodes.h:821
llvm::ISD::AssertSext
@ AssertSext
AssertSext, AssertZext - These nodes record if a register contains a value that has already been zero...
Definition ISDOpcodes.h:62
llvm::ISD::FCOPYSIGN
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition ISDOpcodes.h:527
llvm::ISD::SADDSAT
@ SADDSAT
RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 integers with the same bit width (W)...
Definition ISDOpcodes.h:360
llvm::ISD::VECTOR_DEINTERLEAVE
@ VECTOR_DEINTERLEAVE
VECTOR_DEINTERLEAVE(VEC1, VEC2, ...) - Returns N vectors from N input vectors, where N is the factor ...
Definition ISDOpcodes.h:617
llvm::ISD::TRUNCATE_SSAT_S
@ TRUNCATE_SSAT_S
TRUNCATE_[SU]SAT_[SU] - Truncate for saturated operand [SU] located in middle, prefix for SAT means i...
Definition ISDOpcodes.h:859
llvm::ISD::ABDS
@ ABDS
ABDS/ABDU - Absolute difference - Return the absolute difference between two numbers interpreted as s...
Definition ISDOpcodes.h:719
llvm::ISD::TRUNCATE_USAT_U
@ TRUNCATE_USAT_U
Definition ISDOpcodes.h:863
llvm::ISD::SADDO_CARRY
@ SADDO_CARRY
Carry-using overflow-aware nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:333
llvm::ISD::INTRINSIC_W_CHAIN
@ INTRINSIC_W_CHAIN
RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) This node represents a target in...
Definition ISDOpcodes.h:208
llvm::ISD::TargetGlobalTLSAddress
@ TargetGlobalTLSAddress
Definition ISDOpcodes.h:181
llvm::ISD::BUILD_VECTOR
@ BUILD_VECTOR
BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a fixed-width vector with the specified,...
Definition ISDOpcodes.h:549
llvm::ISD::LOOP_DEPENDENCE_WAR_MASK
@ LOOP_DEPENDENCE_WAR_MASK
Set rounding mode.
Definition ISDOpcodes.h:1570
llvm::ISD::MemIndexedMode
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
Definition ISDOpcodes.h:1646
llvm::Intrinsic::getBaseName
LLVM_ABI StringRef getBaseName(ID id)
Return the LLVM name for an intrinsic, without encoded types for overloading, such as "llvm....
Definition Intrinsics.cpp:44
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition AddressRanges.h:18
llvm::dyn_cast
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:644
llvm::make_range
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
Definition iterator_range.h:70
llvm::utostr
std::string utostr(uint64_t X, bool isNeg=false)
Definition StringExtras.h:322
llvm::get
decltype(auto) get(const PointerIntPair< PointerTy, IntBits, IntType, PtrTraits, Info > &Pair)
Definition PointerIntPair.h:268
llvm::dbgs
LLVM_ABI raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition Debug.cpp:207
llvm::isa
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
Definition Casting.h:548
llvm::Op
DWARFExpression::Operation Op
Definition DWARFExpressionPrinter.cpp:22
llvm::cast
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:560
llvm::printReg
LLVM_ABI Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
Definition TargetRegisterInfo.cpp:105
raw_ostream.h
N
#define N
llvm::APFloatBase::IEEEsingle
static LLVM_ABI const fltSemantics & IEEEsingle() LLVM_READNONE
Definition APFloat.cpp:266
llvm::APFloatBase::IEEEdouble
static LLVM_ABI const fltSemantics & IEEEdouble() LLVM_READNONE
Definition APFloat.cpp:267
llvm::EVT::getEVTString
LLVM_ABI std::string getEVTString() const
This function returns value type as a string, e.g. "i32".
Definition ValueTypes.cpp:162
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