LLVM 22.0.0git
SelectionDAGDumper.cpp
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1//===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This implements the SelectionDAG::dump method and friends.
10//
11//===----------------------------------------------------------------------===//
12
13#include "SDNodeDbgValue.h"
14#include "llvm/ADT/APFloat.h"
15#include "llvm/ADT/APInt.h"
16#include "llvm/ADT/SmallPtrSet.h"
17#include "llvm/ADT/StringExtras.h"
18#include "llvm/CodeGen/ISDOpcodes.h"
19#include "llvm/CodeGen/MachineBasicBlock.h"
20#include "llvm/CodeGen/MachineConstantPool.h"
21#include "llvm/CodeGen/MachineMemOperand.h"
22#include "llvm/CodeGen/SelectionDAG.h"
23#include "llvm/CodeGen/SelectionDAGNodes.h"
24#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
25#include "llvm/CodeGen/TargetInstrInfo.h"
26#include "llvm/CodeGen/TargetLowering.h"
27#include "llvm/CodeGen/TargetRegisterInfo.h"
28#include "llvm/CodeGen/TargetSubtargetInfo.h"
29#include "llvm/CodeGen/ValueTypes.h"
30#include "llvm/CodeGenTypes/MachineValueType.h"
31#include "llvm/Config/llvm-config.h"
32#include "llvm/IR/BasicBlock.h"
33#include "llvm/IR/Constants.h"
34#include "llvm/IR/DebugInfoMetadata.h"
35#include "llvm/IR/DebugLoc.h"
36#include "llvm/IR/Function.h"
37#include "llvm/IR/Intrinsics.h"
38#include "llvm/IR/ModuleSlotTracker.h"
39#include "llvm/IR/Value.h"
40#include "llvm/Support/Casting.h"
41#include "llvm/Support/CommandLine.h"
42#include "llvm/Support/Compiler.h"
43#include "llvm/Support/Debug.h"
44#include "llvm/Support/ErrorHandling.h"
45#include "llvm/Support/Printable.h"
46#include "llvm/Support/raw_ostream.h"
47#include "llvm/Target/TargetMachine.h"
48#include <cstdint>
49#include <iterator>
50
51using namespace llvm;
52
53static cl::opt<bool>
54VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
55 cl::desc("Display more information when dumping selection "
56 "DAG nodes."));
57
58std::string SDNode::getOperationName(const SelectionDAG *G) const {
59 switch (getOpcode()) {
60 default:
61 if (getOpcode() < ISD::BUILTIN_OP_END)
62 return "<<Unknown DAG Node>>";
63 if (isMachineOpcode()) {
64 if (G)
65 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
66 if (getMachineOpcode() < TII->getNumOpcodes())
67 return std::string(TII->getName(getMachineOpcode()));
68 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
69 }
70 if (G) {
71 const SelectionDAGTargetInfo &TSI = G->getSelectionDAGInfo();
72 if (const char *Name = TSI.getTargetNodeName(getOpcode()))
73 return Name;
74 const TargetLowering &TLI = G->getTargetLoweringInfo();
75 const char *Name = TLI.getTargetNodeName(getOpcode());
76 if (Name) return Name;
77 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
78 }
79 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
80
81 // clang-format off
82#ifndef NDEBUG
83 case ISD::DELETED_NODE: return "<<Deleted Node!>>";
84#endif
85 case ISD::PREFETCH: return "Prefetch";
86 case ISD::MEMBARRIER: return "MemBarrier";
87 case ISD::ATOMIC_FENCE: return "AtomicFence";
88 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
89 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
90 case ISD::ATOMIC_SWAP: return "AtomicSwap";
91 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
92 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
93 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
94 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr";
95 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
96 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
97 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
98 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
99 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
100 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
101 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
102 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd";
103 case ISD::ATOMIC_LOAD_FSUB: return "AtomicLoadFSub";
104 case ISD::ATOMIC_LOAD_FMIN: return "AtomicLoadFMin";
105 case ISD::ATOMIC_LOAD_FMAX: return "AtomicLoadFMax";
106 case ISD::ATOMIC_LOAD_FMINIMUM: return "AtomicLoadFMinimum";
107 case ISD::ATOMIC_LOAD_FMAXIMUM: return "AtomicLoadFMaximum";
108 case ISD::ATOMIC_LOAD_UINC_WRAP:
109 return "AtomicLoadUIncWrap";
110 case ISD::ATOMIC_LOAD_UDEC_WRAP:
111 return "AtomicLoadUDecWrap";
112 case ISD::ATOMIC_LOAD_USUB_COND:
113 return "AtomicLoadUSubCond";
114 case ISD::ATOMIC_LOAD_USUB_SAT:
115 return "AtomicLoadUSubSat";
116 case ISD::ATOMIC_LOAD: return "AtomicLoad";
117 case ISD::ATOMIC_STORE: return "AtomicStore";
118 case ISD::PCMARKER: return "PCMarker";
119 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
120 case ISD::READSTEADYCOUNTER: return "ReadSteadyCounter";
121 case ISD::SRCVALUE: return "SrcValue";
122 case ISD::MDNODE_SDNODE: return "MDNode";
123 case ISD::EntryToken: return "EntryToken";
124 case ISD::TokenFactor: return "TokenFactor";
125 case ISD::AssertSext: return "AssertSext";
126 case ISD::AssertZext: return "AssertZext";
127 case ISD::AssertNoFPClass: return "AssertNoFPClass";
128 case ISD::AssertAlign: return "AssertAlign";
129
130 case ISD::BasicBlock: return "BasicBlock";
131 case ISD::VALUETYPE: return "ValueType";
132 case ISD::Register: return "Register";
133 case ISD::RegisterMask: return "RegisterMask";
134 case ISD::Constant:
135 if (cast<ConstantSDNode>(this)->isOpaque())
136 return "OpaqueConstant";
137 return "Constant";
138 case ISD::ConstantFP: return "ConstantFP";
139 case ISD::GlobalAddress: return "GlobalAddress";
140 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
141 case ISD::PtrAuthGlobalAddress: return "PtrAuthGlobalAddress";
142 case ISD::FrameIndex: return "FrameIndex";
143 case ISD::JumpTable: return "JumpTable";
144 case ISD::JUMP_TABLE_DEBUG_INFO:
145 return "JUMP_TABLE_DEBUG_INFO";
146 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
147 case ISD::RETURNADDR: return "RETURNADDR";
148 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
149 case ISD::FRAMEADDR: return "FRAMEADDR";
150 case ISD::SPONENTRY: return "SPONENTRY";
151 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
152 case ISD::READ_REGISTER: return "READ_REGISTER";
153 case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
154 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
155 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA";
156 case ISD::EH_RETURN: return "EH_RETURN";
157 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
158 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
159 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH";
160 case ISD::ConstantPool: return "ConstantPool";
161 case ISD::TargetIndex: return "TargetIndex";
162 case ISD::ExternalSymbol: return "ExternalSymbol";
163 case ISD::BlockAddress: return "BlockAddress";
164 case ISD::INTRINSIC_WO_CHAIN:
165 case ISD::INTRINSIC_VOID:
166 case ISD::INTRINSIC_W_CHAIN: {
167 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
168 unsigned IID = getOperand(OpNo)->getAsZExtVal();
169 if (IID < Intrinsic::num_intrinsics)
170 return Intrinsic::getBaseName((Intrinsic::ID)IID).str();
171 if (!G)
172 return "Unknown intrinsic";
173 llvm_unreachable("Invalid intrinsic ID");
174 }
175
176 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
177 case ISD::TargetConstant:
178 if (cast<ConstantSDNode>(this)->isOpaque())
179 return "OpaqueTargetConstant";
180 return "TargetConstant";
181
182 case ISD::TargetConstantFP: return "TargetConstantFP";
183 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
184 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
185 case ISD::TargetFrameIndex: return "TargetFrameIndex";
186 case ISD::TargetJumpTable: return "TargetJumpTable";
187 case ISD::TargetConstantPool: return "TargetConstantPool";
188 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
189 case ISD::MCSymbol: return "MCSymbol";
190 case ISD::TargetBlockAddress: return "TargetBlockAddress";
191
192 case ISD::CopyToReg: return "CopyToReg";
193 case ISD::CopyFromReg: return "CopyFromReg";
194 case ISD::UNDEF: return "undef";
195 case ISD::POISON: return "poison";
196 case ISD::VSCALE: return "vscale";
197 case ISD::MERGE_VALUES: return "merge_values";
198 case ISD::INLINEASM: return "inlineasm";
199 case ISD::INLINEASM_BR: return "inlineasm_br";
200 case ISD::EH_LABEL: return "eh_label";
201 case ISD::ANNOTATION_LABEL: return "annotation_label";
202 case ISD::HANDLENODE: return "handlenode";
203
204 // Unary operators
205 case ISD::FABS: return "fabs";
206 case ISD::FMINNUM: return "fminnum";
207 case ISD::STRICT_FMINNUM: return "strict_fminnum";
208 case ISD::FMAXNUM: return "fmaxnum";
209 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum";
210 case ISD::FMINNUM_IEEE: return "fminnum_ieee";
211 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee";
212 case ISD::FMINIMUM: return "fminimum";
213 case ISD::STRICT_FMINIMUM: return "strict_fminimum";
214 case ISD::FMAXIMUM: return "fmaximum";
215 case ISD::STRICT_FMAXIMUM: return "strict_fmaximum";
216 case ISD::FMINIMUMNUM: return "fminimumnum";
217 case ISD::FMAXIMUMNUM: return "fmaximumnum";
218 case ISD::FNEG: return "fneg";
219 case ISD::FSQRT: return "fsqrt";
220 case ISD::STRICT_FSQRT: return "strict_fsqrt";
221 case ISD::FCBRT: return "fcbrt";
222 case ISD::FSIN: return "fsin";
223 case ISD::STRICT_FSIN: return "strict_fsin";
224 case ISD::FCOS: return "fcos";
225 case ISD::STRICT_FCOS: return "strict_fcos";
226 case ISD::FSINCOS: return "fsincos";
227 case ISD::FSINCOSPI: return "fsincospi";
228 case ISD::FMODF: return "fmodf";
229 case ISD::FTAN: return "ftan";
230 case ISD::STRICT_FTAN: return "strict_ftan";
231 case ISD::FASIN: return "fasin";
232 case ISD::STRICT_FASIN: return "strict_fasin";
233 case ISD::FACOS: return "facos";
234 case ISD::STRICT_FACOS: return "strict_facos";
235 case ISD::FATAN: return "fatan";
236 case ISD::STRICT_FATAN: return "strict_fatan";
237 case ISD::FATAN2: return "fatan2";
238 case ISD::STRICT_FATAN2: return "strict_fatan2";
239 case ISD::FSINH: return "fsinh";
240 case ISD::STRICT_FSINH: return "strict_fsinh";
241 case ISD::FCOSH: return "fcosh";
242 case ISD::STRICT_FCOSH: return "strict_fcosh";
243 case ISD::FTANH: return "ftanh";
244 case ISD::STRICT_FTANH: return "strict_ftanh";
245 case ISD::FTRUNC: return "ftrunc";
246 case ISD::STRICT_FTRUNC: return "strict_ftrunc";
247 case ISD::FFLOOR: return "ffloor";
248 case ISD::STRICT_FFLOOR: return "strict_ffloor";
249 case ISD::FCEIL: return "fceil";
250 case ISD::STRICT_FCEIL: return "strict_fceil";
251 case ISD::FRINT: return "frint";
252 case ISD::STRICT_FRINT: return "strict_frint";
253 case ISD::FNEARBYINT: return "fnearbyint";
254 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint";
255 case ISD::FROUND: return "fround";
256 case ISD::STRICT_FROUND: return "strict_fround";
257 case ISD::FROUNDEVEN: return "froundeven";
258 case ISD::STRICT_FROUNDEVEN: return "strict_froundeven";
259 case ISD::FEXP: return "fexp";
260 case ISD::STRICT_FEXP: return "strict_fexp";
261 case ISD::FEXP2: return "fexp2";
262 case ISD::STRICT_FEXP2: return "strict_fexp2";
263 case ISD::FEXP10: return "fexp10";
264 case ISD::FLOG: return "flog";
265 case ISD::STRICT_FLOG: return "strict_flog";
266 case ISD::FLOG2: return "flog2";
267 case ISD::STRICT_FLOG2: return "strict_flog2";
268 case ISD::FLOG10: return "flog10";
269 case ISD::STRICT_FLOG10: return "strict_flog10";
270
271 // Binary operators
272 case ISD::ADD: return "add";
273 case ISD::PTRADD: return "ptradd";
274 case ISD::SUB: return "sub";
275 case ISD::MUL: return "mul";
276 case ISD::MULHU: return "mulhu";
277 case ISD::MULHS: return "mulhs";
278 case ISD::AVGFLOORU: return "avgflooru";
279 case ISD::AVGFLOORS: return "avgfloors";
280 case ISD::AVGCEILU: return "avgceilu";
281 case ISD::AVGCEILS: return "avgceils";
282 case ISD::ABDS: return "abds";
283 case ISD::ABDU: return "abdu";
284 case ISD::SDIV: return "sdiv";
285 case ISD::UDIV: return "udiv";
286 case ISD::SREM: return "srem";
287 case ISD::UREM: return "urem";
288 case ISD::SMUL_LOHI: return "smul_lohi";
289 case ISD::UMUL_LOHI: return "umul_lohi";
290 case ISD::SDIVREM: return "sdivrem";
291 case ISD::UDIVREM: return "udivrem";
292 case ISD::AND: return "and";
293 case ISD::OR: return "or";
294 case ISD::XOR: return "xor";
295 case ISD::SHL: return "shl";
296 case ISD::SRA: return "sra";
297 case ISD::SRL: return "srl";
298 case ISD::ROTL: return "rotl";
299 case ISD::ROTR: return "rotr";
300 case ISD::FSHL: return "fshl";
301 case ISD::FSHR: return "fshr";
302 case ISD::FADD: return "fadd";
303 case ISD::STRICT_FADD: return "strict_fadd";
304 case ISD::FSUB: return "fsub";
305 case ISD::STRICT_FSUB: return "strict_fsub";
306 case ISD::FMUL: return "fmul";
307 case ISD::STRICT_FMUL: return "strict_fmul";
308 case ISD::FDIV: return "fdiv";
309 case ISD::STRICT_FDIV: return "strict_fdiv";
310 case ISD::FMA: return "fma";
311 case ISD::STRICT_FMA: return "strict_fma";
312 case ISD::FMAD: return "fmad";
313 case ISD::FREM: return "frem";
314 case ISD::STRICT_FREM: return "strict_frem";
315 case ISD::FCOPYSIGN: return "fcopysign";
316 case ISD::FGETSIGN: return "fgetsign";
317 case ISD::FCANONICALIZE: return "fcanonicalize";
318 case ISD::IS_FPCLASS: return "is_fpclass";
319 case ISD::FPOW: return "fpow";
320 case ISD::STRICT_FPOW: return "strict_fpow";
321 case ISD::SMIN: return "smin";
322 case ISD::SMAX: return "smax";
323 case ISD::UMIN: return "umin";
324 case ISD::UMAX: return "umax";
325 case ISD::SCMP: return "scmp";
326 case ISD::UCMP: return "ucmp";
327
328 case ISD::FLDEXP: return "fldexp";
329 case ISD::STRICT_FLDEXP: return "strict_fldexp";
330 case ISD::FFREXP: return "ffrexp";
331 case ISD::FPOWI: return "fpowi";
332 case ISD::STRICT_FPOWI: return "strict_fpowi";
333 case ISD::SETCC: return "setcc";
334 case ISD::SETCCCARRY: return "setcccarry";
335 case ISD::STRICT_FSETCC: return "strict_fsetcc";
336 case ISD::STRICT_FSETCCS: return "strict_fsetccs";
337 case ISD::FPTRUNC_ROUND: return "fptrunc_round";
338 case ISD::SELECT: return "select";
339 case ISD::VSELECT: return "vselect";
340 case ISD::SELECT_CC: return "select_cc";
341 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
342 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
343 case ISD::CONCAT_VECTORS: return "concat_vectors";
344 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
345 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
346 case ISD::VECTOR_DEINTERLEAVE: return "vector_deinterleave";
347 case ISD::VECTOR_INTERLEAVE: return "vector_interleave";
348 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
349 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
350 case ISD::VECTOR_SPLICE: return "vector_splice";
351 case ISD::SPLAT_VECTOR: return "splat_vector";
352 case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts";
353 case ISD::VECTOR_REVERSE: return "vector_reverse";
354 case ISD::STEP_VECTOR: return "step_vector";
355 case ISD::CARRY_FALSE: return "carry_false";
356 case ISD::ADDC: return "addc";
357 case ISD::ADDE: return "adde";
358 case ISD::UADDO_CARRY: return "uaddo_carry";
359 case ISD::SADDO_CARRY: return "saddo_carry";
360 case ISD::SADDO: return "saddo";
361 case ISD::UADDO: return "uaddo";
362 case ISD::SSUBO: return "ssubo";
363 case ISD::USUBO: return "usubo";
364 case ISD::SMULO: return "smulo";
365 case ISD::UMULO: return "umulo";
366 case ISD::SUBC: return "subc";
367 case ISD::SUBE: return "sube";
368 case ISD::USUBO_CARRY: return "usubo_carry";
369 case ISD::SSUBO_CARRY: return "ssubo_carry";
370 case ISD::SHL_PARTS: return "shl_parts";
371 case ISD::SRA_PARTS: return "sra_parts";
372 case ISD::SRL_PARTS: return "srl_parts";
373
374 case ISD::SADDSAT: return "saddsat";
375 case ISD::UADDSAT: return "uaddsat";
376 case ISD::SSUBSAT: return "ssubsat";
377 case ISD::USUBSAT: return "usubsat";
378 case ISD::SSHLSAT: return "sshlsat";
379 case ISD::USHLSAT: return "ushlsat";
380
381 case ISD::SMULFIX: return "smulfix";
382 case ISD::SMULFIXSAT: return "smulfixsat";
383 case ISD::UMULFIX: return "umulfix";
384 case ISD::UMULFIXSAT: return "umulfixsat";
385
386 case ISD::SDIVFIX: return "sdivfix";
387 case ISD::SDIVFIXSAT: return "sdivfixsat";
388 case ISD::UDIVFIX: return "udivfix";
389 case ISD::UDIVFIXSAT: return "udivfixsat";
390
391 // Conversion operators.
392 case ISD::SIGN_EXTEND: return "sign_extend";
393 case ISD::ZERO_EXTEND: return "zero_extend";
394 case ISD::ANY_EXTEND: return "any_extend";
395 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
396 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg";
397 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg";
398 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg";
399 case ISD::TRUNCATE: return "truncate";
400 case ISD::TRUNCATE_SSAT_S: return "truncate_ssat_s";
401 case ISD::TRUNCATE_SSAT_U: return "truncate_ssat_u";
402 case ISD::TRUNCATE_USAT_U: return "truncate_usat_u";
403 case ISD::FP_ROUND: return "fp_round";
404 case ISD::STRICT_FP_ROUND: return "strict_fp_round";
405 case ISD::FP_EXTEND: return "fp_extend";
406 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend";
407
408 case ISD::SINT_TO_FP: return "sint_to_fp";
409 case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp";
410 case ISD::UINT_TO_FP: return "uint_to_fp";
411 case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp";
412 case ISD::FP_TO_SINT: return "fp_to_sint";
413 case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint";
414 case ISD::FP_TO_UINT: return "fp_to_uint";
415 case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint";
416 case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat";
417 case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat";
418 case ISD::BITCAST: return "bitcast";
419 case ISD::ADDRSPACECAST: return "addrspacecast";
420 case ISD::FP16_TO_FP: return "fp16_to_fp";
421 case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp";
422 case ISD::FP_TO_FP16: return "fp_to_fp16";
423 case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16";
424 case ISD::BF16_TO_FP: return "bf16_to_fp";
425 case ISD::STRICT_BF16_TO_FP: return "strict_bf16_to_fp";
426 case ISD::FP_TO_BF16: return "fp_to_bf16";
427 case ISD::STRICT_FP_TO_BF16: return "strict_fp_to_bf16";
428 case ISD::LROUND: return "lround";
429 case ISD::STRICT_LROUND: return "strict_lround";
430 case ISD::LLROUND: return "llround";
431 case ISD::STRICT_LLROUND: return "strict_llround";
432 case ISD::LRINT: return "lrint";
433 case ISD::STRICT_LRINT: return "strict_lrint";
434 case ISD::LLRINT: return "llrint";
435 case ISD::STRICT_LLRINT: return "strict_llrint";
436
437 // Control flow instructions
438 case ISD::BR: return "br";
439 case ISD::BRIND: return "brind";
440 case ISD::BR_JT: return "br_jt";
441 case ISD::BRCOND: return "brcond";
442 case ISD::BR_CC: return "br_cc";
443 case ISD::CALLSEQ_START: return "callseq_start";
444 case ISD::CALLSEQ_END: return "callseq_end";
445
446 // EH instructions
447 case ISD::CATCHRET: return "catchret";
448 case ISD::CLEANUPRET: return "cleanupret";
449
450 // Other operators
451 case ISD::LOAD: return "load";
452 case ISD::STORE: return "store";
453 case ISD::MLOAD: return "masked_load";
454 case ISD::MSTORE: return "masked_store";
455 case ISD::MGATHER: return "masked_gather";
456 case ISD::MSCATTER: return "masked_scatter";
457 case ISD::VECTOR_COMPRESS: return "vector_compress";
458 case ISD::VAARG: return "vaarg";
459 case ISD::VACOPY: return "vacopy";
460 case ISD::VAEND: return "vaend";
461 case ISD::VASTART: return "vastart";
462 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
463 case ISD::EXTRACT_ELEMENT: return "extract_element";
464 case ISD::BUILD_PAIR: return "build_pair";
465 case ISD::STACKSAVE: return "stacksave";
466 case ISD::STACKRESTORE: return "stackrestore";
467 case ISD::TRAP: return "trap";
468 case ISD::DEBUGTRAP: return "debugtrap";
469 case ISD::UBSANTRAP: return "ubsantrap";
470 case ISD::LIFETIME_START: return "lifetime.start";
471 case ISD::LIFETIME_END: return "lifetime.end";
472 case ISD::FAKE_USE:
473 return "fake_use";
474 case ISD::PSEUDO_PROBE:
475 return "pseudoprobe";
476 case ISD::GC_TRANSITION_START: return "gc_transition.start";
477 case ISD::GC_TRANSITION_END: return "gc_transition.end";
478 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset";
479 case ISD::FREEZE: return "freeze";
480 case ISD::PREALLOCATED_SETUP:
481 return "call_setup";
482 case ISD::PREALLOCATED_ARG:
483 return "call_alloc";
484
485 // Floating point environment manipulation
486 case ISD::GET_ROUNDING: return "get_rounding";
487 case ISD::SET_ROUNDING: return "set_rounding";
488 case ISD::GET_FPENV: return "get_fpenv";
489 case ISD::SET_FPENV: return "set_fpenv";
490 case ISD::RESET_FPENV: return "reset_fpenv";
491 case ISD::GET_FPENV_MEM: return "get_fpenv_mem";
492 case ISD::SET_FPENV_MEM: return "set_fpenv_mem";
493 case ISD::GET_FPMODE: return "get_fpmode";
494 case ISD::SET_FPMODE: return "set_fpmode";
495 case ISD::RESET_FPMODE: return "reset_fpmode";
496
497 // Convergence control instructions
498 case ISD::CONVERGENCECTRL_ANCHOR: return "convergencectrl_anchor";
499 case ISD::CONVERGENCECTRL_ENTRY: return "convergencectrl_entry";
500 case ISD::CONVERGENCECTRL_LOOP: return "convergencectrl_loop";
501 case ISD::CONVERGENCECTRL_GLUE: return "convergencectrl_glue";
502
503 // Bit manipulation
504 case ISD::ABS: return "abs";
505 case ISD::BITREVERSE: return "bitreverse";
506 case ISD::BSWAP: return "bswap";
507 case ISD::CTPOP: return "ctpop";
508 case ISD::CTTZ: return "cttz";
509 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef";
510 case ISD::CTLZ: return "ctlz";
511 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef";
512 case ISD::PARITY: return "parity";
513
514 // Trampolines
515 case ISD::INIT_TRAMPOLINE: return "init_trampoline";
516 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
517
518 // clang-format on
519
520 case ISD::CONDCODE:
521 switch (cast<CondCodeSDNode>(this)->get()) {
522 default: llvm_unreachable("Unknown setcc condition!");
523 case ISD::SETOEQ: return "setoeq";
524 case ISD::SETOGT: return "setogt";
525 case ISD::SETOGE: return "setoge";
526 case ISD::SETOLT: return "setolt";
527 case ISD::SETOLE: return "setole";
528 case ISD::SETONE: return "setone";
529
530 case ISD::SETO: return "seto";
531 case ISD::SETUO: return "setuo";
532 case ISD::SETUEQ: return "setueq";
533 case ISD::SETUGT: return "setugt";
534 case ISD::SETUGE: return "setuge";
535 case ISD::SETULT: return "setult";
536 case ISD::SETULE: return "setule";
537 case ISD::SETUNE: return "setune";
538
539 case ISD::SETEQ: return "seteq";
540 case ISD::SETGT: return "setgt";
541 case ISD::SETGE: return "setge";
542 case ISD::SETLT: return "setlt";
543 case ISD::SETLE: return "setle";
544 case ISD::SETNE: return "setne";
545
546 case ISD::SETTRUE: return "settrue";
547 case ISD::SETTRUE2: return "settrue2";
548 case ISD::SETFALSE: return "setfalse";
549 case ISD::SETFALSE2: return "setfalse2";
550 }
551 case ISD::VECREDUCE_FADD: return "vecreduce_fadd";
552 case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd";
553 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul";
554 case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul";
555 case ISD::VECREDUCE_ADD: return "vecreduce_add";
556 case ISD::VECREDUCE_MUL: return "vecreduce_mul";
557 case ISD::VECREDUCE_AND: return "vecreduce_and";
558 case ISD::VECREDUCE_OR: return "vecreduce_or";
559 case ISD::VECREDUCE_XOR: return "vecreduce_xor";
560 case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
561 case ISD::VECREDUCE_SMIN: return "vecreduce_smin";
562 case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
563 case ISD::VECREDUCE_UMIN: return "vecreduce_umin";
564 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
565 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin";
566 case ISD::VECREDUCE_FMAXIMUM: return "vecreduce_fmaximum";
567 case ISD::VECREDUCE_FMINIMUM: return "vecreduce_fminimum";
568 case ISD::STACKMAP:
569 return "stackmap";
570 case ISD::PATCHPOINT:
571 return "patchpoint";
572 case ISD::CLEAR_CACHE:
573 return "clear_cache";
574
575 case ISD::EXPERIMENTAL_VECTOR_HISTOGRAM:
576 return "histogram";
577
578 case ISD::VECTOR_FIND_LAST_ACTIVE:
579 return "find_last_active";
580
581 case ISD::GET_ACTIVE_LANE_MASK:
582 return "get_active_lane_mask";
583
584 case ISD::PARTIAL_REDUCE_UMLA:
585 return "partial_reduce_umla";
586 case ISD::PARTIAL_REDUCE_SMLA:
587 return "partial_reduce_smla";
588 case ISD::PARTIAL_REDUCE_SUMLA:
589 return "partial_reduce_sumla";
590 case ISD::LOOP_DEPENDENCE_WAR_MASK:
591 return "loop_dep_war";
592 case ISD::LOOP_DEPENDENCE_RAW_MASK:
593 return "loop_dep_raw";
594
595 // Vector Predication
596#define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \
597 case ISD::SDID: \
598 return #NAME;
599#include "llvm/IR/VPIntrinsics.def"
600 }
601}
602
603const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
604 switch (AM) {
605 default: return "";
606 case ISD::PRE_INC: return "<pre-inc>";
607 case ISD::PRE_DEC: return "<pre-dec>";
608 case ISD::POST_INC: return "<post-inc>";
609 case ISD::POST_DEC: return "<post-dec>";
610 }
611}
612
613static Printable PrintNodeId(const SDNode &Node) {
614 return Printable([&Node](raw_ostream &OS) {
615#ifndef NDEBUG
616 static const raw_ostream::Colors Color[] = {
617 raw_ostream::BLACK, raw_ostream::RED, raw_ostream::GREEN,
618 raw_ostream::YELLOW, raw_ostream::BLUE, raw_ostream::MAGENTA,
619 raw_ostream::CYAN,
620 };
621 OS.changeColor(Color[Node.PersistentId % std::size(Color)]);
622 OS << 't' << Node.PersistentId;
623 OS.resetColor();
624#else
625 OS << (const void*)&Node;
626#endif
627 });
628}
629
630// Print the MMO with more information from the SelectionDAG.
631static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
632 const MachineFunction *MF, const Module *M,
633 const MachineFrameInfo *MFI,
634 const TargetInstrInfo *TII, LLVMContext &Ctx) {
635 ModuleSlotTracker MST(M);
636 if (MF)
637 MST.incorporateFunction(MF->getFunction());
638 SmallVector<StringRef, 0> SSNs;
639 MMO.print(OS, MST, SSNs, Ctx, MFI, TII);
640}
641
642static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
643 const SelectionDAG *G) {
644 if (G) {
645 const MachineFunction *MF = &G->getMachineFunction();
646 return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(),
647 &MF->getFrameInfo(),
648 G->getSubtarget().getInstrInfo(), *G->getContext());
649 }
650
651 LLVMContext Ctx;
652 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr,
653 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx);
654}
655
656#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
657LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
658
659LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const {
660 print(dbgs(), G);
661 dbgs() << '\n';
662}
663#endif
664
665void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
666 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
667 if (i) OS << ",";
668 if (getValueType(i) == MVT::Other)
669 OS << "ch";
670 else
671 OS << getValueType(i).getEVTString();
672 }
673}
674
675void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
676 if (getFlags().hasNoUnsignedWrap())
677 OS << " nuw";
678
679 if (getFlags().hasNoSignedWrap())
680 OS << " nsw";
681
682 if (getFlags().hasExact())
683 OS << " exact";
684
685 if (getFlags().hasDisjoint())
686 OS << " disjoint";
687
688 if (getFlags().hasSameSign())
689 OS << " samesign";
690
691 if (getFlags().hasNonNeg())
692 OS << " nneg";
693
694 if (getFlags().hasNoNaNs())
695 OS << " nnan";
696
697 if (getFlags().hasNoInfs())
698 OS << " ninf";
699
700 if (getFlags().hasNoSignedZeros())
701 OS << " nsz";
702
703 if (getFlags().hasAllowReciprocal())
704 OS << " arcp";
705
706 if (getFlags().hasAllowContract())
707 OS << " contract";
708
709 if (getFlags().hasApproximateFuncs())
710 OS << " afn";
711
712 if (getFlags().hasAllowReassociation())
713 OS << " reassoc";
714
715 if (getFlags().hasNoFPExcept())
716 OS << " nofpexcept";
717
718 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
719 if (!MN->memoperands_empty()) {
720 OS << "<";
721 OS << "Mem:";
722 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
723 e = MN->memoperands_end(); i != e; ++i) {
724 printMemOperand(OS, **i, G);
725 if (std::next(i) != e)
726 OS << " ";
727 }
728 OS << ">";
729 }
730 } else if (const ShuffleVectorSDNode *SVN =
731 dyn_cast<ShuffleVectorSDNode>(this)) {
732 OS << "<";
733 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
734 int Idx = SVN->getMaskElt(i);
735 if (i) OS << ",";
736 if (Idx < 0)
737 OS << "u";
738 else
739 OS << Idx;
740 }
741 OS << ">";
742 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
743 OS << '<' << CSDN->getAPIntValue() << '>';
744 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
745 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
746 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
747 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
748 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
749 else {
750 OS << "<APFloat(";
751 CSDN->getValueAPF().bitcastToAPInt().print(OS, false);
752 OS << ")>";
753 }
754 } else if (const GlobalAddressSDNode *GADN =
755 dyn_cast<GlobalAddressSDNode>(this)) {
756 int64_t offset = GADN->getOffset();
757 OS << '<';
758 GADN->getGlobal()->printAsOperand(OS);
759 OS << '>';
760 if (offset > 0)
761 OS << " + " << offset;
762 else
763 OS << " " << offset;
764 if (unsigned int TF = GADN->getTargetFlags())
765 OS << " [TF=" << TF << ']';
766 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
767 OS << "<" << FIDN->getIndex() << ">";
768 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
769 OS << "<" << JTDN->getIndex() << ">";
770 if (unsigned int TF = JTDN->getTargetFlags())
771 OS << " [TF=" << TF << ']';
772 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
773 int offset = CP->getOffset();
774 if (CP->isMachineConstantPoolEntry())
775 OS << "<" << *CP->getMachineCPVal() << ">";
776 else
777 OS << "<" << *CP->getConstVal() << ">";
778 if (offset > 0)
779 OS << " + " << offset;
780 else
781 OS << " " << offset;
782 if (unsigned int TF = CP->getTargetFlags())
783 OS << " [TF=" << TF << ']';
784 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) {
785 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
786 if (unsigned TF = TI->getTargetFlags())
787 OS << " [TF=" << TF << ']';
788 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
789 OS << "<";
790 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
791 if (LBB)
792 OS << LBB->getName() << " ";
793 OS << (const void*)BBDN->getBasicBlock() << ">";
794 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
795 OS << ' ' << printReg(R->getReg(),
796 G ? G->getSubtarget().getRegisterInfo() : nullptr);
797 } else if (const ExternalSymbolSDNode *ES =
798 dyn_cast<ExternalSymbolSDNode>(this)) {
799 OS << "'" << ES->getSymbol() << "'";
800 if (unsigned int TF = ES->getTargetFlags())
801 OS << " [TF=" << TF << ']';
802 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
803 if (M->getValue())
804 OS << "<" << M->getValue() << ">";
805 else
806 OS << "<null>";
807 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
808 if (MD->getMD())
809 OS << "<" << MD->getMD() << ">";
810 else
811 OS << "<null>";
812 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
813 OS << ":" << N->getVT();
814 }
815 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
816 OS << "<";
817
818 printMemOperand(OS, *LD->getMemOperand(), G);
819
820 bool doExt = true;
821 switch (LD->getExtensionType()) {
822 default: doExt = false; break;
823 case ISD::EXTLOAD: OS << ", anyext"; break;
824 case ISD::SEXTLOAD: OS << ", sext"; break;
825 case ISD::ZEXTLOAD: OS << ", zext"; break;
826 }
827 if (doExt)
828 OS << " from " << LD->getMemoryVT();
829
830 const char *AM = getIndexedModeName(LD->getAddressingMode());
831 if (*AM)
832 OS << ", " << AM;
833
834 OS << ">";
835 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
836 OS << "<";
837 printMemOperand(OS, *ST->getMemOperand(), G);
838
839 if (ST->isTruncatingStore())
840 OS << ", trunc to " << ST->getMemoryVT();
841
842 const char *AM = getIndexedModeName(ST->getAddressingMode());
843 if (*AM)
844 OS << ", " << AM;
845
846 OS << ">";
847 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) {
848 OS << "<";
849
850 printMemOperand(OS, *MLd->getMemOperand(), G);
851
852 bool doExt = true;
853 switch (MLd->getExtensionType()) {
854 default: doExt = false; break;
855 case ISD::EXTLOAD: OS << ", anyext"; break;
856 case ISD::SEXTLOAD: OS << ", sext"; break;
857 case ISD::ZEXTLOAD: OS << ", zext"; break;
858 }
859 if (doExt)
860 OS << " from " << MLd->getMemoryVT();
861
862 const char *AM = getIndexedModeName(MLd->getAddressingMode());
863 if (*AM)
864 OS << ", " << AM;
865
866 if (MLd->isExpandingLoad())
867 OS << ", expanding";
868
869 OS << ">";
870 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) {
871 OS << "<";
872 printMemOperand(OS, *MSt->getMemOperand(), G);
873
874 if (MSt->isTruncatingStore())
875 OS << ", trunc to " << MSt->getMemoryVT();
876
877 const char *AM = getIndexedModeName(MSt->getAddressingMode());
878 if (*AM)
879 OS << ", " << AM;
880
881 if (MSt->isCompressingStore())
882 OS << ", compressing";
883
884 OS << ">";
885 } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(this)) {
886 OS << "<";
887 printMemOperand(OS, *MGather->getMemOperand(), G);
888
889 bool doExt = true;
890 switch (MGather->getExtensionType()) {
891 default: doExt = false; break;
892 case ISD::EXTLOAD: OS << ", anyext"; break;
893 case ISD::SEXTLOAD: OS << ", sext"; break;
894 case ISD::ZEXTLOAD: OS << ", zext"; break;
895 }
896 if (doExt)
897 OS << " from " << MGather->getMemoryVT();
898
899 auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned";
900 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled";
901 OS << ", " << Signed << " " << Scaled << " offset";
902
903 OS << ">";
904 } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(this)) {
905 OS << "<";
906 printMemOperand(OS, *MScatter->getMemOperand(), G);
907
908 if (MScatter->isTruncatingStore())
909 OS << ", trunc to " << MScatter->getMemoryVT();
910
911 auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned";
912 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled";
913 OS << ", " << Signed << " " << Scaled << " offset";
914
915 OS << ">";
916 } else if (const MemSDNode *M = dyn_cast<MemSDNode>(this)) {
917 OS << "<";
918 printMemOperand(OS, *M->getMemOperand(), G);
919 if (auto *A = dyn_cast<AtomicSDNode>(M))
920 if (A->getOpcode() == ISD::ATOMIC_LOAD) {
921 bool doExt = true;
922 switch (A->getExtensionType()) {
923 default: doExt = false; break;
924 case ISD::EXTLOAD: OS << ", anyext"; break;
925 case ISD::SEXTLOAD: OS << ", sext"; break;
926 case ISD::ZEXTLOAD: OS << ", zext"; break;
927 }
928 if (doExt)
929 OS << " from " << A->getMemoryVT();
930 }
931 OS << ">";
932 } else if (const BlockAddressSDNode *BA =
933 dyn_cast<BlockAddressSDNode>(this)) {
934 int64_t offset = BA->getOffset();
935 OS << "<";
936 BA->getBlockAddress()->getFunction()->printAsOperand(OS, false);
937 OS << ", ";
938 BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false);
939 OS << ">";
940 if (offset > 0)
941 OS << " + " << offset;
942 else
943 OS << " " << offset;
944 if (unsigned int TF = BA->getTargetFlags())
945 OS << " [TF=" << TF << ']';
946 } else if (const AddrSpaceCastSDNode *ASC =
947 dyn_cast<AddrSpaceCastSDNode>(this)) {
948 OS << '['
949 << ASC->getSrcAddressSpace()
950 << " -> "
951 << ASC->getDestAddressSpace()
952 << ']';
953 } else if (const auto *AA = dyn_cast<AssertAlignSDNode>(this)) {
954 OS << '<' << AA->getAlign().value() << '>';
955 }
956
957 if (VerboseDAGDumping) {
958 if (unsigned Order = getIROrder())
959 OS << " [ORD=" << Order << ']';
960
961 if (getNodeId() != -1)
962 OS << " [ID=" << getNodeId() << ']';
963 if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this))))
964 OS << " # D:" << isDivergent();
965
966 if (G && !G->GetDbgValues(this).empty()) {
967 OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']';
968 for (SDDbgValue *Dbg : G->GetDbgValues(this))
969 if (!Dbg->isInvalidated())
970 Dbg->print(OS);
971 } else if (getHasDebugValue())
972 OS << " [NoOfDbgValues>0]";
973
974 if (const auto *MD = G ? G->getPCSections(this) : nullptr) {
975 OS << " [pcsections ";
976 MD->printAsOperand(OS, G->getMachineFunction().getFunction().getParent());
977 OS << ']';
978 }
979
980 if (MDNode *MMRA = G ? G->getMMRAMetadata(this) : nullptr) {
981 OS << " [mmra ";
982 MMRA->printAsOperand(OS,
983 G->getMachineFunction().getFunction().getParent());
984 OS << ']';
985 }
986 }
987}
988
989LLVM_DUMP_METHOD void SDDbgValue::print(raw_ostream &OS) const {
990 OS << " DbgVal(Order=" << getOrder() << ')';
991 if (isInvalidated())
992 OS << "(Invalidated)";
993 if (isEmitted())
994 OS << "(Emitted)";
995 OS << "(";
996 bool Comma = false;
997 for (const SDDbgOperand &Op : getLocationOps()) {
998 if (Comma)
999 OS << ", ";
1000 switch (Op.getKind()) {
1001 case SDDbgOperand::SDNODE:
1002 if (Op.getSDNode())
1003 OS << "SDNODE=" << PrintNodeId(*Op.getSDNode()) << ':' << Op.getResNo();
1004 else
1005 OS << "SDNODE";
1006 break;
1007 case SDDbgOperand::CONST:
1008 OS << "CONST";
1009 break;
1010 case SDDbgOperand::FRAMEIX:
1011 OS << "FRAMEIX=" << Op.getFrameIx();
1012 break;
1013 case SDDbgOperand::VREG:
1014 OS << "VREG=" << printReg(Op.getVReg());
1015 break;
1016 }
1017 Comma = true;
1018 }
1019 OS << ")";
1020 if (isIndirect()) OS << "(Indirect)";
1021 if (isVariadic())
1022 OS << "(Variadic)";
1023 OS << ":\"" << Var->getName() << '"';
1024#ifndef NDEBUG
1025 if (Expr->getNumElements())
1026 Expr->dump();
1027#endif
1028}
1029
1030#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1031LLVM_DUMP_METHOD void SDDbgValue::dump() const {
1032 if (isInvalidated())
1033 return;
1034 print(dbgs());
1035 dbgs() << "\n";
1036}
1037#endif
1038
1039/// Return true if this node is so simple that we should just print it inline
1040/// if it appears as an operand.
1041static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) {
1042 // Avoid lots of cluttering when inline printing nodes with associated
1043 // DbgValues in verbose mode.
1044 if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty())
1045 return false;
1046 if (Node.getOpcode() == ISD::EntryToken)
1047 return false;
1048 return Node.getNumOperands() == 0;
1049}
1050
1051#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1052static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
1053 for (const SDValue &Op : N->op_values()) {
1054 if (shouldPrintInline(*Op.getNode(), G))
1055 continue;
1056 if (Op.getNode()->hasOneUse())
1057 DumpNodes(Op.getNode(), indent+2, G);
1058 }
1059
1060 dbgs().indent(indent);
1061 N->dump(G);
1062}
1063
1064LLVM_DUMP_METHOD void SelectionDAG::dump() const {
1065 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
1066
1067 for (const SDNode &N : allnodes()) {
1068 if (!N.hasOneUse() && &N != getRoot().getNode() &&
1069 (!shouldPrintInline(N, this) || N.use_empty()))
1070 DumpNodes(&N, 2, this);
1071 }
1072
1073 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
1074 dbgs() << "\n";
1075
1076 if (VerboseDAGDumping) {
1077 if (DbgBegin() != DbgEnd())
1078 dbgs() << "SDDbgValues:\n";
1079 for (auto *Dbg : make_range(DbgBegin(), DbgEnd()))
1080 Dbg->dump();
1081 if (ByvalParmDbgBegin() != ByvalParmDbgEnd())
1082 dbgs() << "Byval SDDbgValues:\n";
1083 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd()))
1084 Dbg->dump();
1085 }
1086 dbgs() << "\n";
1087}
1088#endif
1089
1090void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
1091 OS << PrintNodeId(*this) << ": ";
1092 print_types(OS, G);
1093 OS << " = " << getOperationName(G);
1094 print_details(OS, G);
1095}
1096
1097static bool printOperand(raw_ostream &OS, const SelectionDAG *G,
1098 const SDValue Value) {
1099 if (!Value.getNode()) {
1100 OS << "<null>";
1101 return false;
1102 }
1103
1104 if (shouldPrintInline(*Value.getNode(), G)) {
1105 OS << Value->getOperationName(G) << ':';
1106 Value->print_types(OS, G);
1107 Value->print_details(OS, G);
1108 return true;
1109 }
1110
1111 OS << PrintNodeId(*Value.getNode());
1112 if (unsigned RN = Value.getResNo())
1113 OS << ':' << RN;
1114 return false;
1115}
1116
1117#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1118using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>;
1119
1120static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
1121 const SelectionDAG *G, VisitedSDNodeSet &once) {
1122 if (!once.insert(N).second) // If we've been here before, return now.
1123 return;
1124
1125 // Dump the current SDNode, but don't end the line yet.
1126 OS.indent(indent);
1127 N->printr(OS, G);
1128
1129 // Having printed this SDNode, walk the children:
1130 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
1131 if (i) OS << ",";
1132 OS << " ";
1133
1134 const SDValue Op = N->getOperand(i);
1135 bool printedInline = printOperand(OS, G, Op);
1136 if (printedInline)
1137 once.insert(Op.getNode());
1138 }
1139
1140 OS << "\n";
1141
1142 // Dump children that have grandchildren on their own line(s).
1143 for (const SDValue &Op : N->op_values())
1144 DumpNodesr(OS, Op.getNode(), indent+2, G, once);
1145}
1146
1147LLVM_DUMP_METHOD void SDNode::dumpr() const {
1148 VisitedSDNodeSet once;
1149 DumpNodesr(dbgs(), this, 0, nullptr, once);
1150}
1151
1152LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const {
1153 VisitedSDNodeSet once;
1154 DumpNodesr(dbgs(), this, 0, G, once);
1155}
1156#endif
1157
1158static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
1159 const SelectionDAG *G, unsigned depth,
1160 unsigned indent) {
1161 if (depth == 0)
1162 return;
1163
1164 OS.indent(indent);
1165
1166 N->print(OS, G);
1167
1168 for (const SDValue &Op : N->op_values()) {
1169 // Don't follow chain operands.
1170 if (Op.getValueType() == MVT::Other)
1171 continue;
1172 // Don't print children that were fully rendered inline.
1173 if (shouldPrintInline(*Op.getNode(), G))
1174 continue;
1175 OS << '\n';
1176 printrWithDepthHelper(OS, Op.getNode(), G, depth - 1, indent + 2);
1177 }
1178}
1179
1180void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
1181 unsigned depth) const {
1182 printrWithDepthHelper(OS, this, G, depth, 0);
1183}
1184
1185void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
1186 // Don't print impossibly deep things.
1187 printrWithDepth(OS, G, 10);
1188}
1189
1190#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1191LLVM_DUMP_METHOD
1192void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
1193 printrWithDepth(dbgs(), G, depth);
1194}
1195
1196LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const {
1197 // Don't print impossibly deep things.
1198 dumprWithDepth(G, 10);
1199}
1200#endif
1201
1202void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
1203 printr(OS, G);
1204 // Under VerboseDAGDumping divergence will be printed always.
1205 if (isDivergent() && !VerboseDAGDumping)
1206 OS << " # D:1";
1207 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
1208 if (i) OS << ", "; else OS << " ";
1209 printOperand(OS, G, getOperand(i));
1210 }
1211 if (DebugLoc DL = getDebugLoc()) {
1212 OS << ", ";
1213 DL.print(OS);
1214 }
1215}
APFloat.h
This file declares a class to represent arbitrary precision floating point values and provide a varie...
APInt.h
This file implements a class to represent arbitrary precision integral constant values and operations...
Scaled
@ Scaled
Definition ARCInstrInfo.cpp:35
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition ARMSLSHardening.cpp:73
A
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
LLVM_DUMP_METHOD
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds.
Definition Compiler.h:638
Constants.h
This file contains the declarations for the subclasses of Constant, which represent the different fla...
hasNoInfs
static bool hasNoInfs(const TargetOptions &Options, SDValue N)
Definition DAGCombiner.cpp:16969
TII
const HexagonInstrInfo * TII
Definition HexagonCopyToCombine.cpp:118
hasNoSignedWrap
static bool hasNoSignedWrap(BinaryOperator &I)
Definition InstructionCombining.cpp:386
hasNoUnsignedWrap
static bool hasNoUnsignedWrap(BinaryOperator &I)
Definition InstructionCombining.cpp:381
G
#define G(x, y, z)
Definition MD5.cpp:56
MachineConstantPool.h
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
PrintNodeId
static Printable PrintNodeId(const SDNode &Node)
Definition SelectionDAGDumper.cpp:613
VisitedSDNodeSet
SmallPtrSet< const SDNode *, 32 > VisitedSDNodeSet
Definition SelectionDAGDumper.cpp:1118
VerboseDAGDumping
static cl::opt< bool > VerboseDAGDumping("dag-dump-verbose", cl::Hidden, cl::desc("Display more information when dumping selection " "DAG nodes."))
printOperand
static bool printOperand(raw_ostream &OS, const SelectionDAG *G, const SDValue Value)
Definition SelectionDAGDumper.cpp:1097
shouldPrintInline
static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G)
Return true if this node is so simple that we should just print it inline if it appears as an operand...
Definition SelectionDAGDumper.cpp:1041
DumpNodesr
static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, const SelectionDAG *G, VisitedSDNodeSet &once)
Definition SelectionDAGDumper.cpp:1120
printMemOperand
static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, const MachineFunction *MF, const Module *M, const MachineFrameInfo *MFI, const TargetInstrInfo *TII, LLVMContext &Ctx)
Definition SelectionDAGDumper.cpp:631
DumpNodes
static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G)
Definition SelectionDAGDumper.cpp:1052
printrWithDepthHelper
static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, const SelectionDAG *G, unsigned depth, unsigned indent)
Definition SelectionDAGDumper.cpp:1158
SmallPtrSet.h
This file defines the SmallPtrSet class.
StringExtras.h
This file contains some functions that are useful when dealing with strings.
TargetLowering.h
This file describes how to lower LLVM code to machine code.
llvm::DebugLoc
A debug info location.
Definition DebugLoc.h:124
llvm::GlobalValue::getParent
Module * getParent()
Get the module that this global value is contained inside of...
Definition GlobalValue.h:663
llvm::LLVMContext
This is an important class for using LLVM in a threaded context.
Definition LLVMContext.h:68
llvm::LoadSDNode
This class is used to represent ISD::LOAD nodes.
Definition SelectionDAGNodes.h:2533
llvm::MDNode
Metadata node.
Definition Metadata.h:1077
llvm::MachineFrameInfo
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
Definition MachineFrameInfo.h:108
llvm::MachineFunction::getFrameInfo
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Definition MachineFunction.h:778
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition MachineFunction.h:733
llvm::MachineMemOperand
A description of a memory reference used in the backend.
Definition MachineMemOperand.h:130
llvm::MachineMemOperand::print
LLVM_ABI void print(raw_ostream &OS, ModuleSlotTracker &MST, SmallVectorImpl< StringRef > &SSNs, const LLVMContext &Context, const MachineFrameInfo *MFI, const TargetInstrInfo *TII) const
Support for operator<<.
Definition MachineOperand.cpp:1142
llvm::MachineSDNode
An SDNode that represents everything that will be needed to construct a MachineInstr.
Definition SelectionDAGNodes.h:3143
llvm::MachineSDNode::mmo_iterator
ArrayRef< MachineMemOperand * >::const_iterator mmo_iterator
Definition SelectionDAGNodes.h:3173
llvm::MaskedLoadSDNode
This class is used to represent an MLOAD node.
Definition SelectionDAGNodes.h:2840
llvm::MaskedStoreSDNode
This class is used to represent an MSTORE node.
Definition SelectionDAGNodes.h:2869
llvm::MemSDNode
This is an abstract virtual class for memory operations.
Definition SelectionDAGNodes.h:1397
llvm::ModuleSlotTracker
Manage lifetime of a slot tracker for printing IR.
Definition ModuleSlotTracker.h:45
llvm::ModuleSlotTracker::incorporateFunction
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition AsmWriter.cpp:965
llvm::Module
A Module instance is used to store all the information related to an LLVM module.
Definition Module.h:67
llvm::Printable
Simple wrapper around std::function<void(raw_ostream&)>.
Definition Printable.h:38
llvm::SDDbgOperand
Holds the information for a single machine location through SDISel; either an SDNode,...
Definition SDNodeDbgValue.h:32
llvm::SDDbgOperand::VREG
@ VREG
Value is a virtual register.
Definition SDNodeDbgValue.h:38
llvm::SDDbgOperand::FRAMEIX
@ FRAMEIX
Value is contents of a stack location.
Definition SDNodeDbgValue.h:37
llvm::SDDbgOperand::SDNODE
@ SDNODE
Value is the result of an expression.
Definition SDNodeDbgValue.h:35
llvm::SDDbgOperand::CONST
@ CONST
Value is a constant.
Definition SDNodeDbgValue.h:36
llvm::SDDbgValue
Holds the information from a dbg_value node through SDISel.
Definition SDNodeDbgValue.h:134
llvm::SDDbgValue::isEmitted
bool isEmitted() const
Definition SDNodeDbgValue.h:230
llvm::SDDbgValue::print
LLVM_DUMP_METHOD void print(raw_ostream &OS) const
Definition SelectionDAGDumper.cpp:989
llvm::SDDbgValue::getOrder
unsigned getOrder() const
Returns the SDNodeOrder.
Definition SDNodeDbgValue.h:219
llvm::SDDbgValue::dump
LLVM_DUMP_METHOD void dump() const
Definition SelectionDAGDumper.cpp:1031
llvm::SDDbgValue::isInvalidated
bool isInvalidated() const
Definition SDNodeDbgValue.h:225
llvm::SDDbgValue::getLocationOps
ArrayRef< SDDbgOperand > getLocationOps() const
Definition SDNodeDbgValue.h:186
llvm::SDDbgValue::isIndirect
bool isIndirect() const
Returns whether this is an indirect value.
Definition SDNodeDbgValue.h:210
llvm::SDDbgValue::isVariadic
bool isVariadic() const
Definition SDNodeDbgValue.h:212
llvm::SDNode
Represents one node in the SelectionDAG.
Definition SelectionDAGNodes.h:501
llvm::SDNode::isMachineOpcode
bool isMachineOpcode() const
Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode.
Definition SelectionDAGNodes.h:745
llvm::SDNode::dumprFull
LLVM_ABI void dumprFull(const SelectionDAG *G=nullptr) const
printrFull to dbgs().
Definition SelectionDAGDumper.cpp:1196
llvm::SDNode::getNodeId
int getNodeId() const
Return the unique node id.
Definition SelectionDAGNodes.h:771
llvm::SDNode::dump
LLVM_ABI void dump() const
Dump this node, for debugging.
Definition SelectionDAGDumper.cpp:657
llvm::SDNode::getOpcode
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
Definition SelectionDAGNodes.h:692
llvm::SDNode::isDivergent
bool isDivergent() const
Definition SelectionDAGNodes.h:758
llvm::SDNode::getIndexedModeName
static LLVM_ABI const char * getIndexedModeName(ISD::MemIndexedMode AM)
Definition SelectionDAGDumper.cpp:603
llvm::SDNode::getIROrder
unsigned getIROrder() const
Return the node ordering.
Definition SelectionDAGNodes.h:783
llvm::SDNode::getHasDebugValue
bool getHasDebugValue() const
Definition SelectionDAGNodes.h:755
llvm::SDNode::dumpr
LLVM_ABI void dumpr() const
Dump (recursively) this node and its use-def subgraph.
Definition SelectionDAGDumper.cpp:1147
llvm::SDNode::getFlags
SDNodeFlags getFlags() const
Definition SelectionDAGNodes.h:1085
llvm::SDNode::getOperationName
LLVM_ABI std::string getOperationName(const SelectionDAG *G=nullptr) const
Return the opcode of this operation for printing.
Definition SelectionDAGDumper.cpp:58
llvm::SDNode::printrFull
LLVM_ABI void printrFull(raw_ostream &O, const SelectionDAG *G=nullptr) const
Print a SelectionDAG node and all children down to the leaves.
Definition SelectionDAGDumper.cpp:1185
llvm::SDNode::SelectionDAG
friend class SelectionDAG
Definition SelectionDAGNodes.h:642
llvm::SDNode::printr
LLVM_ABI void printr(raw_ostream &OS, const SelectionDAG *G=nullptr) const
Definition SelectionDAGDumper.cpp:1090
llvm::SDNode::getAsZExtVal
uint64_t getAsZExtVal() const
Helper method returns the zero-extended integer value of a ConstantSDNode.
Definition SelectionDAGNodes.h:1783
llvm::SDNode::getNumValues
unsigned getNumValues() const
Return the number of values defined/returned by this operator.
Definition SelectionDAGNodes.h:1101
llvm::SDNode::getNumOperands
unsigned getNumOperands() const
Return the number of values used by this operation.
Definition SelectionDAGNodes.h:1013
llvm::SDNode::getMachineOpcode
unsigned getMachineOpcode() const
This may only be called if isMachineOpcode returns true.
Definition SelectionDAGNodes.h:750
llvm::SDNode::getOperand
const SDValue & getOperand(unsigned Num) const
Definition SelectionDAGNodes.h:1034
llvm::SDNode::print
LLVM_ABI void print(raw_ostream &OS, const SelectionDAG *G=nullptr) const
Definition SelectionDAGDumper.cpp:1202
llvm::SDNode::getDebugLoc
const DebugLoc & getDebugLoc() const
Return the source location info.
Definition SelectionDAGNodes.h:789
llvm::SDNode::printrWithDepth
LLVM_ABI void printrWithDepth(raw_ostream &O, const SelectionDAG *G=nullptr, unsigned depth=100) const
Print a SelectionDAG node and children up to depth "depth." The given SelectionDAG allows target-spec...
Definition SelectionDAGDumper.cpp:1180
llvm::SDNode::dumprWithDepth
LLVM_ABI void dumprWithDepth(const SelectionDAG *G=nullptr, unsigned depth=100) const
printrWithDepth to dbgs().
Definition SelectionDAGDumper.cpp:1192
llvm::SDNode::getValueType
EVT getValueType(unsigned ResNo) const
Return the type of a specified result.
Definition SelectionDAGNodes.h:1104
llvm::SDNode::print_details
LLVM_ABI void print_details(raw_ostream &OS, const SelectionDAG *G) const
Definition SelectionDAGDumper.cpp:675
llvm::SDNode::print_types
LLVM_ABI void print_types(raw_ostream &OS, const SelectionDAG *G) const
Definition SelectionDAGDumper.cpp:665
llvm::SDValue
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Definition SelectionDAGNodes.h:147
llvm::SelectionDAGTargetInfo
Targets can subclass this to parameterize the SelectionDAG lowering and instruction selection process...
Definition SelectionDAGTargetInfo.h:33
llvm::SelectionDAGTargetInfo::getTargetNodeName
virtual const char * getTargetNodeName(unsigned Opcode) const
Returns the name of the given target-specific opcode, suitable for debug printing.
Definition SelectionDAGTargetInfo.h:42
llvm::SelectionDAG
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition SelectionDAG.h:229
llvm::SelectionDAG::getRoot
const SDValue & getRoot() const
Return the root tag of the SelectionDAG.
Definition SelectionDAG.h:578
llvm::SelectionDAG::ByvalParmDbgEnd
SDDbgInfo::DbgIterator ByvalParmDbgEnd() const
Definition SelectionDAG.h:1994
llvm::SelectionDAG::ByvalParmDbgBegin
SDDbgInfo::DbgIterator ByvalParmDbgBegin() const
Definition SelectionDAG.h:1991
llvm::SelectionDAG::DbgEnd
SDDbgInfo::DbgIterator DbgEnd() const
Definition SelectionDAG.h:1989
llvm::SelectionDAG::dump
LLVM_ABI void dump() const
Definition SelectionDAGDumper.cpp:1064
llvm::SelectionDAG::DbgBegin
SDDbgInfo::DbgIterator DbgBegin() const
Definition SelectionDAG.h:1988
llvm::SelectionDAG::allnodes
iterator_range< allnodes_iterator > allnodes()
Definition SelectionDAG.h:570
llvm::SelectionDAG::getNode
LLVM_ABI SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
Definition SelectionDAG.cpp:10801
llvm::ShuffleVectorSDNode
This SDNode is used to implement the code generator support for the llvm IR shufflevector instruction...
Definition SelectionDAGNodes.h:1680
llvm::SmallPtrSetImpl::insert
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition SmallPtrSet.h:401
llvm::SmallPtrSet
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
Definition SmallPtrSet.h:541
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition SmallVector.h:1197
llvm::SrcValueSDNode
An SDNode that holds an arbitrary LLVM IR Value.
Definition SelectionDAGNodes.h:2314
llvm::StoreSDNode
This class is used to represent ISD::STORE nodes.
Definition SelectionDAGNodes.h:2561
llvm::StringRef::str
std::string str() const
str - Get the contents as an std::string.
Definition StringRef.h:233
llvm::TargetIndexSDNode
Completely target-dependent object reference.
Definition SelectionDAGNodes.h:2132
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition TargetInstrInfo.h:114
llvm::TargetLowering
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Definition TargetLowering.h:3937
llvm::TargetLowering::getTargetNodeName
virtual const char * getTargetNodeName(unsigned Opcode) const
This method returns the name of a target specific DAG node.
Definition TargetLowering.cpp:50
llvm::VTSDNode
This class is used to represent EVT's, which are used to parameterize some operations.
Definition SelectionDAGNodes.h:2482
llvm::Value
LLVM Value Representation.
Definition Value.h:75
llvm::Value::getName
LLVM_ABI StringRef getName() const
Return a constant reference to the value's name.
Definition Value.cpp:322
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition raw_ostream.h:53
llvm::raw_ostream::YELLOW
static constexpr Colors YELLOW
Definition raw_ostream.h:118
llvm::raw_ostream::CYAN
static constexpr Colors CYAN
Definition raw_ostream.h:121
llvm::raw_ostream::Colors
Colors
Definition raw_ostream.h:94
llvm::raw_ostream::changeColor
virtual raw_ostream & changeColor(enum Colors Color, bool Bold=false, bool BG=false)
Changes the foreground color of text that will be output from this point forward.
Definition raw_ostream.cpp:520
llvm::raw_ostream::resetColor
virtual raw_ostream & resetColor()
Resets the colors to terminal defaults.
Definition raw_ostream.cpp:533
llvm::raw_ostream::BLUE
static constexpr Colors BLUE
Definition raw_ostream.h:119
llvm::raw_ostream::indent
raw_ostream & indent(unsigned NumSpaces)
indent - Insert 'NumSpaces' spaces.
Definition raw_ostream.cpp:495
llvm::raw_ostream::MAGENTA
static constexpr Colors MAGENTA
Definition raw_ostream.h:120
llvm::raw_ostream::BLACK
static constexpr Colors BLACK
Definition raw_ostream.h:115
llvm::raw_ostream::GREEN
static constexpr Colors GREEN
Definition raw_ostream.h:117
llvm::raw_ostream::RED
static constexpr Colors RED
Definition raw_ostream.h:116
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition ErrorHandling.h:164
llvm::AA
Abstract Attribute helper functions.
Definition Attributor.h:165
llvm::ISD::SETCC
@ SETCC
SetCC operator - This evaluates to a true value iff the condition is true.
Definition ISDOpcodes.h:801
llvm::ISD::MERGE_VALUES
@ MERGE_VALUES
MERGE_VALUES - This node takes multiple discrete operands and returns them all as its individual resu...
Definition ISDOpcodes.h:256
llvm::ISD::CTLZ_ZERO_UNDEF
@ CTLZ_ZERO_UNDEF
Definition ISDOpcodes.h:774
llvm::ISD::TargetConstantPool
@ TargetConstantPool
Definition ISDOpcodes.h:184
llvm::ISD::STRICT_FSETCC
@ STRICT_FSETCC
STRICT_FSETCC/STRICT_FSETCCS - Constrained versions of SETCC, used for floating-point operands only.
Definition ISDOpcodes.h:504
llvm::ISD::DELETED_NODE
@ DELETED_NODE
DELETED_NODE - This is an illegal value that is used to catch errors.
Definition ISDOpcodes.h:45
llvm::ISD::POISON
@ POISON
POISON - A poison node.
Definition ISDOpcodes.h:231
llvm::ISD::LOOP_DEPENDENCE_RAW_MASK
@ LOOP_DEPENDENCE_RAW_MASK
Definition ISDOpcodes.h:1565
llvm::ISD::EH_SJLJ_LONGJMP
@ EH_SJLJ_LONGJMP
OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer) This corresponds to the eh.sjlj.longjmp intrinsic.
Definition ISDOpcodes.h:163
llvm::ISD::FGETSIGN
@ FGETSIGN
INT = FGETSIGN(FP) - Return the sign bit of the specified floating point value as an integer 0/1 valu...
Definition ISDOpcodes.h:525
llvm::ISD::SMUL_LOHI
@ SMUL_LOHI
SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing a signed/unsigned value of type i[2...
Definition ISDOpcodes.h:270
llvm::ISD::INSERT_SUBVECTOR
@ INSERT_SUBVECTOR
INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector with VECTOR2 inserted into VECTOR1.
Definition ISDOpcodes.h:587
llvm::ISD::BSWAP
@ BSWAP
Byte Swap and Counting operators.
Definition ISDOpcodes.h:765
llvm::ISD::SMULFIX
@ SMULFIX
RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on 2 integers with the same...
Definition ISDOpcodes.h:387
llvm::ISD::TargetBlockAddress
@ TargetBlockAddress
Definition ISDOpcodes.h:186
llvm::ISD::ADDC
@ ADDC
Carry-setting nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:289
llvm::ISD::FRAME_TO_ARGS_OFFSET
@ FRAME_TO_ARGS_OFFSET
FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to first (possible) on-stack ar...
Definition ISDOpcodes.h:140
llvm::ISD::FMAD
@ FMAD
FMAD - Perform a * b + c, while getting the same result as the separately rounded operations.
Definition ISDOpcodes.h:515
llvm::ISD::ADD
@ ADD
Simple integer binary arithmetic operators.
Definition ISDOpcodes.h:259
llvm::ISD::SMULFIXSAT
@ SMULFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition ISDOpcodes.h:393
llvm::ISD::ANY_EXTEND
@ ANY_EXTEND
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition ISDOpcodes.h:835
llvm::ISD::FMA
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
Definition ISDOpcodes.h:511
llvm::ISD::INTRINSIC_VOID
@ INTRINSIC_VOID
OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) This node represents a target intrin...
Definition ISDOpcodes.h:215
llvm::ISD::EH_SJLJ_SETUP_DISPATCH
@ EH_SJLJ_SETUP_DISPATCH
OUTCHAIN = EH_SJLJ_SETUP_DISPATCH(INCHAIN) The target initializes the dispatch table here.
Definition ISDOpcodes.h:167
llvm::ISD::GlobalAddress
@ GlobalAddress
Definition ISDOpcodes.h:88
llvm::ISD::STRICT_FMINIMUM
@ STRICT_FMINIMUM
Definition ISDOpcodes.h:464
llvm::ISD::SINT_TO_FP
@ SINT_TO_FP
[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter)...
Definition ISDOpcodes.h:862
llvm::ISD::CONCAT_VECTORS
@ CONCAT_VECTORS
CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of vector type with the same length ...
Definition ISDOpcodes.h:571
llvm::ISD::FADD
@ FADD
Simple binary floating point operators.
Definition ISDOpcodes.h:410
llvm::ISD::ABS
@ ABS
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth.
Definition ISDOpcodes.h:738
llvm::ISD::SIGN_EXTEND_VECTOR_INREG
@ SIGN_EXTEND_VECTOR_INREG
SIGN_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register sign-extension of the low ...
Definition ISDOpcodes.h:892
llvm::ISD::SDIVREM
@ SDIVREM
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition ISDOpcodes.h:275
llvm::ISD::FPTRUNC_ROUND
@ FPTRUNC_ROUND
FPTRUNC_ROUND - This corresponds to the fptrunc_round intrinsic.
Definition ISDOpcodes.h:508
llvm::ISD::BUILD_PAIR
@ BUILD_PAIR
BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
Definition ISDOpcodes.h:249
llvm::ISD::SDIVFIX
@ SDIVFIX
RESULT = [US]DIVFIX(LHS, RHS, SCALE) - Perform fixed point division on 2 integers with the same width...
Definition ISDOpcodes.h:400
llvm::ISD::STRICT_FSQRT
@ STRICT_FSQRT
Constrained versions of libm-equivalent floating point intrinsics.
Definition ISDOpcodes.h:431
llvm::ISD::BUILTIN_OP_END
@ BUILTIN_OP_END
BUILTIN_OP_END - This must be the last enum value in this list.
Definition ISDOpcodes.h:1574
llvm::ISD::GlobalTLSAddress
@ GlobalTLSAddress
Definition ISDOpcodes.h:89
llvm::ISD::EH_RETURN
@ EH_RETURN
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 'eh_return' gcc dwarf builtin,...
Definition ISDOpcodes.h:151
llvm::ISD::SIGN_EXTEND
@ SIGN_EXTEND
Conversion operators.
Definition ISDOpcodes.h:826
llvm::ISD::AVGCEILS
@ AVGCEILS
AVGCEILS/AVGCEILU - Rounding averaging add - Add two integers using an integer of type i[N+2],...
Definition ISDOpcodes.h:706
llvm::ISD::STRICT_UINT_TO_FP
@ STRICT_UINT_TO_FP
Definition ISDOpcodes.h:478
llvm::ISD::SCALAR_TO_VECTOR
@ SCALAR_TO_VECTOR
SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a scalar value into element 0 of the...
Definition ISDOpcodes.h:656
llvm::ISD::ADDROFRETURNADDR
@ ADDROFRETURNADDR
ADDROFRETURNADDR - Represents the llvm.addressofreturnaddress intrinsic.
Definition ISDOpcodes.h:117
llvm::ISD::TargetExternalSymbol
@ TargetExternalSymbol
Definition ISDOpcodes.h:185
llvm::ISD::CTTZ_ZERO_UNDEF
@ CTTZ_ZERO_UNDEF
Bit counting operators with an undefined result for zero inputs.
Definition ISDOpcodes.h:773
llvm::ISD::TargetJumpTable
@ TargetJumpTable
Definition ISDOpcodes.h:183
llvm::ISD::TargetIndex
@ TargetIndex
TargetIndex - Like a constant pool entry, but with completely target-dependent semantics.
Definition ISDOpcodes.h:193
llvm::ISD::TRUNCATE_SSAT_U
@ TRUNCATE_SSAT_U
Definition ISDOpcodes.h:855
llvm::ISD::SETCCCARRY
@ SETCCCARRY
Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but op #2 is a boolean indicating ...
Definition ISDOpcodes.h:809
llvm::ISD::SSUBO
@ SSUBO
Same for subtraction.
Definition ISDOpcodes.h:347
llvm::ISD::VECTOR_INTERLEAVE
@ VECTOR_INTERLEAVE
VECTOR_INTERLEAVE(VEC1, VEC2, ...) - Returns N vectors from N input vectors, where N is the factor to...
Definition ISDOpcodes.h:622
llvm::ISD::STEP_VECTOR
@ STEP_VECTOR
STEP_VECTOR(IMM) - Returns a scalable vector whose lanes are comprised of a linear sequence of unsign...
Definition ISDOpcodes.h:682
llvm::ISD::FCANONICALIZE
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
Definition ISDOpcodes.h:528
llvm::ISD::IS_FPCLASS
@ IS_FPCLASS
Performs a check of floating point class property, defined by IEEE-754.
Definition ISDOpcodes.h:535
llvm::ISD::SSUBSAT
@ SSUBSAT
RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 integers with the same bit width ...
Definition ISDOpcodes.h:369
llvm::ISD::SELECT
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
Definition ISDOpcodes.h:778
llvm::ISD::UNDEF
@ UNDEF
UNDEF - An undefined node.
Definition ISDOpcodes.h:228
llvm::ISD::EXTRACT_ELEMENT
@ EXTRACT_ELEMENT
EXTRACT_ELEMENT - This is used to get the lower or upper (determined by a Constant,...
Definition ISDOpcodes.h:242
llvm::ISD::SPLAT_VECTOR
@ SPLAT_VECTOR
SPLAT_VECTOR(VAL) - Returns a vector with the scalar value VAL duplicated in all lanes.
Definition ISDOpcodes.h:663
llvm::ISD::AssertAlign
@ AssertAlign
AssertAlign - These nodes record if a register contains a value that has a known alignment and the tr...
Definition ISDOpcodes.h:69
llvm::ISD::BasicBlock
@ BasicBlock
Various leaf nodes.
Definition ISDOpcodes.h:81
llvm::ISD::CopyFromReg
@ CopyFromReg
CopyFromReg - This node indicates that the input value is a virtual or physical register that is defi...
Definition ISDOpcodes.h:225
llvm::ISD::SADDO
@ SADDO
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition ISDOpcodes.h:343
llvm::ISD::TargetGlobalAddress
@ TargetGlobalAddress
TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node...
Definition ISDOpcodes.h:180
llvm::ISD::GET_ROUNDING
@ GET_ROUNDING
Returns current rounding mode: -1 Undefined 0 Round to 0 1 Round to nearest, ties to even 2 Round to ...
Definition ISDOpcodes.h:952
llvm::ISD::MULHU
@ MULHU
MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing an unsigned/signed value of...
Definition ISDOpcodes.h:695
llvm::ISD::SHL
@ SHL
Shift and rotation operations.
Definition ISDOpcodes.h:756
llvm::ISD::AssertNoFPClass
@ AssertNoFPClass
AssertNoFPClass - These nodes record if a register contains a float value that is known to be not som...
Definition ISDOpcodes.h:78
llvm::ISD::VECTOR_SHUFFLE
@ VECTOR_SHUFFLE
VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as VEC1/VEC2.
Definition ISDOpcodes.h:636
llvm::ISD::PtrAuthGlobalAddress
@ PtrAuthGlobalAddress
A ptrauth constant.
Definition ISDOpcodes.h:100
llvm::ISD::EXTRACT_SUBVECTOR
@ EXTRACT_SUBVECTOR
EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR.
Definition ISDOpcodes.h:601
llvm::ISD::STRICT_FMAXIMUM
@ STRICT_FMAXIMUM
Definition ISDOpcodes.h:463
llvm::ISD::EntryToken
@ EntryToken
EntryToken - This is the marker used to indicate the start of a region.
Definition ISDOpcodes.h:48
llvm::ISD::READ_REGISTER
@ READ_REGISTER
READ_REGISTER, WRITE_REGISTER - This node represents llvm.register on the DAG, which implements the n...
Definition ISDOpcodes.h:134
llvm::ISD::EXTRACT_VECTOR_ELT
@ EXTRACT_VECTOR_ELT
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
Definition ISDOpcodes.h:563
llvm::ISD::CopyToReg
@ CopyToReg
CopyToReg - This node has three operands: a chain, a register number to set to this value,...
Definition ISDOpcodes.h:219
llvm::ISD::ZERO_EXTEND
@ ZERO_EXTEND
ZERO_EXTEND - Used for integer types, zeroing the new bits.
Definition ISDOpcodes.h:832
llvm::ISD::TargetConstantFP
@ TargetConstantFP
Definition ISDOpcodes.h:175
llvm::ISD::SELECT_CC
@ SELECT_CC
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
Definition ISDOpcodes.h:793
llvm::ISD::LOCAL_RECOVER
@ LOCAL_RECOVER
LOCAL_RECOVER - Represents the llvm.localrecover intrinsic.
Definition ISDOpcodes.h:130
llvm::ISD::SSHLSAT
@ SSHLSAT
RESULT = [US]SHLSAT(LHS, RHS) - Perform saturation left shift.
Definition ISDOpcodes.h:379
llvm::ISD::SMULO
@ SMULO
Same for multiplication.
Definition ISDOpcodes.h:351
llvm::ISD::TargetFrameIndex
@ TargetFrameIndex
Definition ISDOpcodes.h:182
llvm::ISD::ANY_EXTEND_VECTOR_INREG
@ ANY_EXTEND_VECTOR_INREG
ANY_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register any-extension of the low la...
Definition ISDOpcodes.h:881
llvm::ISD::SIGN_EXTEND_INREG
@ SIGN_EXTEND_INREG
SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to sign extend a small value in ...
Definition ISDOpcodes.h:870
llvm::ISD::SMIN
@ SMIN
[US]{MIN/MAX} - Binary minimum or maximum of signed or unsigned integers.
Definition ISDOpcodes.h:718
llvm::ISD::VECTOR_REVERSE
@ VECTOR_REVERSE
VECTOR_REVERSE(VECTOR) - Returns a vector, of the same type as VECTOR, whose elements are shuffled us...
Definition ISDOpcodes.h:627
llvm::ISD::SDIVFIXSAT
@ SDIVFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition ISDOpcodes.h:406
llvm::ISD::GLOBAL_OFFSET_TABLE
@ GLOBAL_OFFSET_TABLE
The address of the GOT.
Definition ISDOpcodes.h:103
llvm::ISD::VSELECT
@ VSELECT
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition ISDOpcodes.h:787
llvm::ISD::UADDO_CARRY
@ UADDO_CARRY
Carry-using nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:323
llvm::ISD::STRICT_SINT_TO_FP
@ STRICT_SINT_TO_FP
STRICT_[US]INT_TO_FP - Convert a signed or unsigned integer to a floating point value.
Definition ISDOpcodes.h:477
llvm::ISD::STRICT_FROUNDEVEN
@ STRICT_FROUNDEVEN
Definition ISDOpcodes.h:457
llvm::ISD::EH_DWARF_CFA
@ EH_DWARF_CFA
EH_DWARF_CFA - This node represents the pointer to the DWARF Canonical Frame Address (CFA),...
Definition ISDOpcodes.h:145
llvm::ISD::FRAMEADDR
@ FRAMEADDR
FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and llvm.returnaddress on the DAG.
Definition ISDOpcodes.h:110
llvm::ISD::STRICT_FP_TO_UINT
@ STRICT_FP_TO_UINT
Definition ISDOpcodes.h:471
llvm::ISD::STRICT_FP_ROUND
@ STRICT_FP_ROUND
X = STRICT_FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision ...
Definition ISDOpcodes.h:493
llvm::ISD::STRICT_FP_TO_SINT
@ STRICT_FP_TO_SINT
STRICT_FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition ISDOpcodes.h:470
llvm::ISD::FP_TO_SINT
@ FP_TO_SINT
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition ISDOpcodes.h:908
llvm::ISD::TargetConstant
@ TargetConstant
TargetConstant* - Like Constant*, but the DAG does not do any folding, simplification,...
Definition ISDOpcodes.h:174
llvm::ISD::STRICT_FP_EXTEND
@ STRICT_FP_EXTEND
X = STRICT_FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition ISDOpcodes.h:498
llvm::ISD::AND
@ AND
Bitwise operators - logical and, logical or, logical xor.
Definition ISDOpcodes.h:730
llvm::ISD::INTRINSIC_WO_CHAIN
@ INTRINSIC_WO_CHAIN
RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic fun...
Definition ISDOpcodes.h:200
llvm::ISD::SCMP
@ SCMP
[US]CMP - 3-way comparison of signed or unsigned integers.
Definition ISDOpcodes.h:726
llvm::ISD::CARRY_FALSE
@ CARRY_FALSE
CARRY_FALSE - This node is used when folding other nodes, like ADDC/SUBC, which indicate the carry re...
Definition ISDOpcodes.h:280
llvm::ISD::AVGFLOORS
@ AVGFLOORS
AVGFLOORS/AVGFLOORU - Averaging add - Add two integers using an integer of type i[N+1],...
Definition ISDOpcodes.h:701
llvm::ISD::ADDE
@ ADDE
Carry-using nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:299
llvm::ISD::STRICT_FADD
@ STRICT_FADD
Constrained versions of the binary floating point operators.
Definition ISDOpcodes.h:420
llvm::ISD::SPLAT_VECTOR_PARTS
@ SPLAT_VECTOR_PARTS
SPLAT_VECTOR_PARTS(SCALAR1, SCALAR2, ...) - Returns a vector with the scalar values joined together a...
Definition ISDOpcodes.h:672
llvm::ISD::FREEZE
@ FREEZE
FREEZE - FREEZE(VAL) returns an arbitrary value if VAL is UNDEF (or is evaluated to UNDEF),...
Definition ISDOpcodes.h:236
llvm::ISD::INSERT_VECTOR_ELT
@ INSERT_VECTOR_ELT
INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL.
Definition ISDOpcodes.h:552
llvm::ISD::TokenFactor
@ TokenFactor
TokenFactor - This node takes multiple tokens as input and produces a single token result.
Definition ISDOpcodes.h:53
llvm::ISD::VECTOR_SPLICE
@ VECTOR_SPLICE
VECTOR_SPLICE(VEC1, VEC2, IMM) - Returns a subvector of the same type as VEC1/VEC2 from CONCAT_VECTOR...
Definition ISDOpcodes.h:648
llvm::ISD::ExternalSymbol
@ ExternalSymbol
Definition ISDOpcodes.h:93
llvm::ISD::FP_ROUND
@ FP_ROUND
X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision of the ...
Definition ISDOpcodes.h:941
llvm::ISD::VECTOR_COMPRESS
@ VECTOR_COMPRESS
VECTOR_COMPRESS(Vec, Mask, Passthru) consecutively place vector elements based on mask e....
Definition ISDOpcodes.h:690
llvm::ISD::SPONENTRY
@ SPONENTRY
SPONENTRY - Represents the llvm.sponentry intrinsic.
Definition ISDOpcodes.h:122
llvm::ISD::ZERO_EXTEND_VECTOR_INREG
@ ZERO_EXTEND_VECTOR_INREG
ZERO_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register zero-extension of the low ...
Definition ISDOpcodes.h:903
llvm::ISD::STRICT_FNEARBYINT
@ STRICT_FNEARBYINT
Definition ISDOpcodes.h:451
llvm::ISD::FP_TO_SINT_SAT
@ FP_TO_SINT_SAT
FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a signed or unsigned scalar integer ...
Definition ISDOpcodes.h:927
llvm::ISD::EH_SJLJ_SETJMP
@ EH_SJLJ_SETJMP
RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer) This corresponds to the eh.sjlj....
Definition ISDOpcodes.h:157
llvm::ISD::TRUNCATE
@ TRUNCATE
TRUNCATE - Completely drop the high bits.
Definition ISDOpcodes.h:838
llvm::ISD::SHL_PARTS
@ SHL_PARTS
SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded integer shift operations.
Definition ISDOpcodes.h:815
llvm::ISD::AssertSext
@ AssertSext
AssertSext, AssertZext - These nodes record if a register contains a value that has already been zero...
Definition ISDOpcodes.h:62
llvm::ISD::FCOPYSIGN
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition ISDOpcodes.h:521
llvm::ISD::SADDSAT
@ SADDSAT
RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 integers with the same bit width (W)...
Definition ISDOpcodes.h:360
llvm::ISD::VECTOR_DEINTERLEAVE
@ VECTOR_DEINTERLEAVE
VECTOR_DEINTERLEAVE(VEC1, VEC2, ...) - Returns N vectors from N input vectors, where N is the factor ...
Definition ISDOpcodes.h:611
llvm::ISD::TRUNCATE_SSAT_S
@ TRUNCATE_SSAT_S
TRUNCATE_[SU]SAT_[SU] - Truncate for saturated operand [SU] located in middle, prefix for SAT means i...
Definition ISDOpcodes.h:853
llvm::ISD::ABDS
@ ABDS
ABDS/ABDU - Absolute difference - Return the absolute difference between two numbers interpreted as s...
Definition ISDOpcodes.h:713
llvm::ISD::TRUNCATE_USAT_U
@ TRUNCATE_USAT_U
Definition ISDOpcodes.h:857
llvm::ISD::SADDO_CARRY
@ SADDO_CARRY
Carry-using overflow-aware nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:333
llvm::ISD::INTRINSIC_W_CHAIN
@ INTRINSIC_W_CHAIN
RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) This node represents a target in...
Definition ISDOpcodes.h:208
llvm::ISD::TargetGlobalTLSAddress
@ TargetGlobalTLSAddress
Definition ISDOpcodes.h:181
llvm::ISD::BUILD_VECTOR
@ BUILD_VECTOR
BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a fixed-width vector with the specified,...
Definition ISDOpcodes.h:543
llvm::ISD::LOOP_DEPENDENCE_WAR_MASK
@ LOOP_DEPENDENCE_WAR_MASK
Set rounding mode.
Definition ISDOpcodes.h:1564
llvm::ISD::MemIndexedMode
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
Definition ISDOpcodes.h:1640
llvm::Intrinsic::getBaseName
LLVM_ABI StringRef getBaseName(ID id)
Return the LLVM name for an intrinsic, without encoded types for overloading, such as "llvm....
Definition Intrinsics.cpp:44
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition AddressRanges.h:18
llvm::dyn_cast
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:649
llvm::make_range
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
Definition iterator_range.h:70
llvm::utostr
std::string utostr(uint64_t X, bool isNeg=false)
Definition StringExtras.h:322
llvm::get
decltype(auto) get(const PointerIntPair< PointerTy, IntBits, IntType, PtrTraits, Info > &Pair)
Definition PointerIntPair.h:268
llvm::dbgs
LLVM_ABI raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition Debug.cpp:207
llvm::isa
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
Definition Casting.h:548
llvm::Op
DWARFExpression::Operation Op
Definition DWARFExpressionPrinter.cpp:22
llvm::cast
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:565
llvm::printReg
LLVM_ABI Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
Definition TargetRegisterInfo.cpp:107
raw_ostream.h
N
#define N
llvm::APFloatBase::IEEEsingle
static LLVM_ABI const fltSemantics & IEEEsingle() LLVM_READNONE
Definition APFloat.cpp:266
llvm::APFloatBase::IEEEdouble
static LLVM_ABI const fltSemantics & IEEEdouble() LLVM_READNONE
Definition APFloat.cpp:267
llvm::EVT::getEVTString
LLVM_ABI std::string getEVTString() const
This function returns value type as a string, e.g. "i32".
Definition ValueTypes.cpp:162
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