LLVM 22.0.0git
ShrinkWrap.cpp
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1//===- ShrinkWrap.cpp - Compute safe point for prolog/epilog insertion ----===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This pass looks for safe point where the prologue and epilogue can be
10// inserted.
11// The safe point for the prologue (resp. epilogue) is called Save
12// (resp. Restore).
13// A point is safe for prologue (resp. epilogue) if and only if
14// it 1) dominates (resp. post-dominates) all the frame related operations and
15// between 2) two executions of the Save (resp. Restore) point there is an
16// execution of the Restore (resp. Save) point.
17//
18// For instance, the following points are safe:
19// for (int i = 0; i < 10; ++i) {
20// Save
21// ...
22// Restore
23// }
24// Indeed, the execution looks like Save -> Restore -> Save -> Restore ...
25// And the following points are not:
26// for (int i = 0; i < 10; ++i) {
27// Save
28// ...
29// }
30// for (int i = 0; i < 10; ++i) {
31// ...
32// Restore
33// }
34// Indeed, the execution looks like Save -> Save -> ... -> Restore -> Restore.
35//
36// This pass also ensures that the safe points are 3) cheaper than the regular
37// entry and exits blocks.
38//
39// Property #1 is ensured via the use of MachineDominatorTree and
40// MachinePostDominatorTree.
41// Property #2 is ensured via property #1 and MachineLoopInfo, i.e., both
42// points must be in the same loop.
43// Property #3 is ensured via the MachineBlockFrequencyInfo.
44//
45// If this pass found points matching all these properties, then
46// MachineFrameInfo is updated with this information.
47//
48//===----------------------------------------------------------------------===//
49
51#include "llvm/ADT/BitVector.h"
53#include "llvm/ADT/SetVector.h"
55#include "llvm/ADT/Statistic.h"
56#include "llvm/Analysis/CFG.h"
76#include "llvm/IR/Attributes.h"
77#include "llvm/IR/Function.h"
79#include "llvm/MC/MCAsmInfo.h"
80#include "llvm/Pass.h"
82#include "llvm/Support/Debug.h"
86#include <cassert>
87#include <memory>
88
89using namespace llvm;
90
91#define DEBUG_TYPE "shrink-wrap"
92
93STATISTIC(NumFunc, "Number of functions");
94STATISTIC(NumCandidates, "Number of shrink-wrapping candidates");
95STATISTIC(NumCandidatesDropped,
96 "Number of shrink-wrapping candidates dropped because of frequency");
97
99EnableShrinkWrapOpt("enable-shrink-wrap", cl::Hidden,
100 cl::desc("enable the shrink-wrapping pass"));
102 "enable-shrink-wrap-region-split", cl::init(true), cl::Hidden,
103 cl::desc("enable splitting of the restore block if possible"));
104
105namespace {
106
107/// Class to determine where the safe point to insert the
108/// prologue and epilogue are.
109/// Unlike the paper from Fred C. Chow, PLDI'88, that introduces the
110/// shrink-wrapping term for prologue/epilogue placement, this pass
111/// does not rely on expensive data-flow analysis. Instead we use the
112/// dominance properties and loop information to decide which point
113/// are safe for such insertion.
114class ShrinkWrapImpl {
115 /// Hold callee-saved information.
117 MachineDominatorTree *MDT = nullptr;
118 MachinePostDominatorTree *MPDT = nullptr;
119
120 /// Current safe point found for the prologue.
121 /// The prologue will be inserted before the first instruction
122 /// in this basic block.
123 MachineBasicBlock *Save = nullptr;
124
125 /// Current safe point found for the epilogue.
126 /// The epilogue will be inserted before the first terminator instruction
127 /// in this basic block.
128 MachineBasicBlock *Restore = nullptr;
129
130 /// Hold the information of the basic block frequency.
131 /// Use to check the profitability of the new points.
132 MachineBlockFrequencyInfo *MBFI = nullptr;
133
134 /// Hold the loop information. Used to determine if Save and Restore
135 /// are in the same loop.
136 MachineLoopInfo *MLI = nullptr;
137
138 // Emit remarks.
140
141 /// Frequency of the Entry block.
142 BlockFrequency EntryFreq;
143
144 /// Current opcode for frame setup.
145 unsigned FrameSetupOpcode = ~0u;
146
147 /// Current opcode for frame destroy.
148 unsigned FrameDestroyOpcode = ~0u;
149
150 /// Stack pointer register, used by llvm.{savestack,restorestack}
151 Register SP;
152
153 /// Entry block.
154 const MachineBasicBlock *Entry = nullptr;
155
156 using SetOfRegs = SmallSetVector<unsigned, 16>;
157
158 /// Registers that need to be saved for the current function.
159 mutable SetOfRegs CurrentCSRs;
160
161 /// Current MachineFunction.
162 MachineFunction *MachineFunc = nullptr;
163
164 /// Is `true` for the block numbers where we assume possible stack accesses
165 /// or computation of stack-relative addresses on any CFG path including the
166 /// block itself. Is `false` for basic blocks where we can guarantee the
167 /// opposite. False positives won't lead to incorrect analysis results,
168 /// therefore this approach is fair.
169 BitVector StackAddressUsedBlockInfo;
170
171 /// Check if \p MI uses or defines a callee-saved register or
172 /// a frame index. If this is the case, this means \p MI must happen
173 /// after Save and before Restore.
174 bool useOrDefCSROrFI(const MachineInstr &MI, RegScavenger *RS,
175 bool StackAddressUsed) const;
176
177 const SetOfRegs &getCurrentCSRs(RegScavenger *RS) const {
178 if (CurrentCSRs.empty()) {
179 BitVector SavedRegs;
180 const TargetFrameLowering *TFI =
181 MachineFunc->getSubtarget().getFrameLowering();
182
183 TFI->determineCalleeSaves(*MachineFunc, SavedRegs, RS);
184
185 for (int Reg = SavedRegs.find_first(); Reg != -1;
186 Reg = SavedRegs.find_next(Reg))
187 CurrentCSRs.insert((unsigned)Reg);
188 }
189 return CurrentCSRs;
190 }
191
192 /// Update the Save and Restore points such that \p MBB is in
193 /// the region that is dominated by Save and post-dominated by Restore
194 /// and Save and Restore still match the safe point definition.
195 /// Such point may not exist and Save and/or Restore may be null after
196 /// this call.
197 void updateSaveRestorePoints(MachineBasicBlock &MBB, RegScavenger *RS);
198
199 // Try to find safe point based on dominance and block frequency without
200 // any change in IR.
201 bool performShrinkWrapping(
202 const ReversePostOrderTraversal<MachineBasicBlock *> &RPOT,
203 RegScavenger *RS);
204
205 /// This function tries to split the restore point if doing so can shrink the
206 /// save point further. \return True if restore point is split.
207 bool postShrinkWrapping(bool HasCandidate, MachineFunction &MF,
208 RegScavenger *RS);
209
210 /// This function analyzes if the restore point can split to create a new
211 /// restore point. This function collects
212 /// 1. Any preds of current restore that are reachable by callee save/FI
213 /// blocks
214 /// - indicated by DirtyPreds
215 /// 2. Any preds of current restore that are not DirtyPreds - indicated by
216 /// CleanPreds
217 /// Both sets should be non-empty for considering restore point split.
218 bool checkIfRestoreSplittable(
219 const MachineBasicBlock *CurRestore,
220 const DenseSet<const MachineBasicBlock *> &ReachableByDirty,
221 SmallVectorImpl<MachineBasicBlock *> &DirtyPreds,
222 SmallVectorImpl<MachineBasicBlock *> &CleanPreds,
223 const TargetInstrInfo *TII, RegScavenger *RS);
224
225 /// Initialize the pass for \p MF.
226 void init(MachineFunction &MF) {
227 RCI.runOnMachineFunction(MF);
228 Save = nullptr;
229 Restore = nullptr;
230 EntryFreq = MBFI->getEntryFreq();
231 const TargetSubtargetInfo &Subtarget = MF.getSubtarget();
232 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
233 FrameSetupOpcode = TII.getCallFrameSetupOpcode();
234 FrameDestroyOpcode = TII.getCallFrameDestroyOpcode();
236 Entry = &MF.front();
237 CurrentCSRs.clear();
238 MachineFunc = &MF;
239
240 ++NumFunc;
241 }
242
243 /// Check whether or not Save and Restore points are still interesting for
244 /// shrink-wrapping.
245 bool ArePointsInteresting() const { return Save != Entry && Save && Restore; }
246
247public:
248 ShrinkWrapImpl(MachineDominatorTree *MDT, MachinePostDominatorTree *MPDT,
249 MachineBlockFrequencyInfo *MBFI, MachineLoopInfo *MLI,
250 MachineOptimizationRemarkEmitter *ORE)
251 : MDT(MDT), MPDT(MPDT), MBFI(MBFI), MLI(MLI), ORE(ORE) {}
252
253 /// Check if shrink wrapping is enabled for this target and function.
254 static bool isShrinkWrapEnabled(const MachineFunction &MF);
255
256 bool run(MachineFunction &MF);
257};
258
259class ShrinkWrapLegacy : public MachineFunctionPass {
260public:
261 static char ID;
262
263 ShrinkWrapLegacy() : MachineFunctionPass(ID) {
265 }
266
267 void getAnalysisUsage(AnalysisUsage &AU) const override {
268 AU.setPreservesAll();
269 AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
270 AU.addRequired<MachineDominatorTreeWrapperPass>();
271 AU.addRequired<MachinePostDominatorTreeWrapperPass>();
272 AU.addRequired<MachineLoopInfoWrapperPass>();
273 AU.addRequired<MachineOptimizationRemarkEmitterPass>();
275 }
276
277 MachineFunctionProperties getRequiredProperties() const override {
278 return MachineFunctionProperties().setNoVRegs();
279 }
280
281 StringRef getPassName() const override { return "Shrink Wrapping analysis"; }
282
283 /// Perform the shrink-wrapping analysis and update
284 /// the MachineFrameInfo attached to \p MF with the results.
285 bool runOnMachineFunction(MachineFunction &MF) override;
286};
287
288} // end anonymous namespace
289
290char ShrinkWrapLegacy::ID = 0;
291
292char &llvm::ShrinkWrapID = ShrinkWrapLegacy::ID;
293
294INITIALIZE_PASS_BEGIN(ShrinkWrapLegacy, DEBUG_TYPE, "Shrink Wrap Pass", false,
295 false)
301INITIALIZE_PASS_END(ShrinkWrapLegacy, DEBUG_TYPE, "Shrink Wrap Pass", false,
302 false)
303
304bool ShrinkWrapImpl::useOrDefCSROrFI(const MachineInstr &MI, RegScavenger *RS,
305 bool StackAddressUsed) const {
306 /// Check if \p Op is known to access an address not on the function's stack .
307 /// At the moment, accesses where the underlying object is a global, function
308 /// argument, or jump table are considered non-stack accesses. Note that the
309 /// caller's stack may get accessed when passing an argument via the stack,
310 /// but not the stack of the current function.
311 ///
312 auto IsKnownNonStackPtr = [](MachineMemOperand *Op) {
313 if (Op->getValue()) {
314 const Value *UO = getUnderlyingObject(Op->getValue());
315 if (!UO)
316 return false;
317 if (auto *Arg = dyn_cast<Argument>(UO))
318 return !Arg->hasPassPointeeByValueCopyAttr();
319 return isa<GlobalValue>(UO);
320 }
321 if (const PseudoSourceValue *PSV = Op->getPseudoValue())
322 return PSV->isJumpTable();
323 return false;
324 };
325 // Load/store operations may access the stack indirectly when we previously
326 // computed an address to a stack location.
327 if (StackAddressUsed && MI.mayLoadOrStore() &&
328 (MI.isCall() || MI.hasUnmodeledSideEffects() || MI.memoperands_empty() ||
329 !all_of(MI.memoperands(), IsKnownNonStackPtr)))
330 return true;
331
332 if (MI.getOpcode() == FrameSetupOpcode ||
333 MI.getOpcode() == FrameDestroyOpcode) {
334 LLVM_DEBUG(dbgs() << "Frame instruction: " << MI << '\n');
335 return true;
336 }
337 const MachineFunction *MF = MI.getParent()->getParent();
339 for (const MachineOperand &MO : MI.operands()) {
340 bool UseOrDefCSR = false;
341 if (MO.isReg()) {
342 // Ignore instructions like DBG_VALUE which don't read/def the register.
343 if (!MO.isDef() && !MO.readsReg())
344 continue;
345 Register PhysReg = MO.getReg();
346 if (!PhysReg)
347 continue;
348 assert(PhysReg.isPhysical() && "Unallocated register?!");
349 // The stack pointer is not normally described as a callee-saved register
350 // in calling convention definitions, so we need to watch for it
351 // separately. An SP mentioned by a call instruction, we can ignore,
352 // though, as it's harmless and we do not want to effectively disable tail
353 // calls by forcing the restore point to post-dominate them.
354 // PPC's LR is also not normally described as a callee-saved register in
355 // calling convention definitions, so we need to watch for it, too. An LR
356 // mentioned implicitly by a return (or "branch to link register")
357 // instruction we can ignore, otherwise we may pessimize shrinkwrapping.
358 // PPC's Frame pointer (FP) is also not described as a callee-saved
359 // register. Until the FP is assigned a Physical Register PPC's FP needs
360 // to be checked separately.
361 UseOrDefCSR = (!MI.isCall() && PhysReg == SP) ||
362 RCI.getLastCalleeSavedAlias(PhysReg) ||
363 (!MI.isReturn() &&
364 TRI->isNonallocatableRegisterCalleeSave(PhysReg)) ||
365 TRI->isVirtualFrameRegister(PhysReg);
366 } else if (MO.isRegMask()) {
367 // Check if this regmask clobbers any of the CSRs.
368 for (unsigned Reg : getCurrentCSRs(RS)) {
369 if (MO.clobbersPhysReg(Reg)) {
370 UseOrDefCSR = true;
371 break;
372 }
373 }
374 }
375 // Skip FrameIndex operands in DBG_VALUE instructions.
376 if (UseOrDefCSR || (MO.isFI() && !MI.isDebugValue())) {
377 LLVM_DEBUG(dbgs() << "Use or define CSR(" << UseOrDefCSR << ") or FI("
378 << MO.isFI() << "): " << MI << '\n');
379 return true;
380 }
381 }
382 return false;
383}
384
385/// Helper function to find the immediate (post) dominator.
386template <typename ListOfBBs, typename DominanceAnalysis>
388 DominanceAnalysis &Dom, bool Strict = true) {
389 MachineBasicBlock *IDom = Dom.findNearestCommonDominator(iterator_range(BBs));
390 if (Strict && IDom == &Block)
391 return nullptr;
392 return IDom;
393}
394
396 MachineBasicBlock &Entry) {
397 // Check if the block is analyzable.
398 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
400 return !TII.analyzeBranch(Entry, TBB, FBB, Cond);
401}
402
403/// Determines if any predecessor of MBB is on the path from block that has use
404/// or def of CSRs/FI to MBB.
405/// ReachableByDirty: All blocks reachable from block that has use or def of
406/// CSR/FI.
407static bool
409 const MachineBasicBlock &MBB) {
410 for (const MachineBasicBlock *PredBB : MBB.predecessors())
411 if (ReachableByDirty.count(PredBB))
412 return true;
413 return false;
414}
415
416/// Derives the list of all the basic blocks reachable from MBB.
418 const MachineBasicBlock &MBB) {
419 SmallVector<MachineBasicBlock *, 4> Worklist(MBB.successors());
420 Visited.insert(&MBB);
421 while (!Worklist.empty()) {
422 MachineBasicBlock *SuccMBB = Worklist.pop_back_val();
423 if (!Visited.insert(SuccMBB).second)
424 continue;
425 Worklist.append(SuccMBB->succ_begin(), SuccMBB->succ_end());
426 }
427}
428
429/// Collect blocks reachable by use or def of CSRs/FI.
432 DenseSet<const MachineBasicBlock *> &ReachableByDirty) {
433 for (const MachineBasicBlock *MBB : DirtyBBs) {
434 if (ReachableByDirty.count(MBB))
435 continue;
436 // Mark all offsprings as reachable.
437 markAllReachable(ReachableByDirty, *MBB);
438 }
439}
440
441/// \return true if there is a clean path from SavePoint to the original
442/// Restore.
443static bool
447 SmallVector<MachineBasicBlock *, 4> Worklist(CleanPreds);
448 while (!Worklist.empty()) {
449 MachineBasicBlock *CleanBB = Worklist.pop_back_val();
450 if (CleanBB == SavePoint)
451 return true;
452 if (!Visited.insert(CleanBB).second || !CleanBB->pred_size())
453 continue;
454 Worklist.append(CleanBB->pred_begin(), CleanBB->pred_end());
455 }
456 return false;
457}
458
459/// This function updates the branches post restore point split.
460///
461/// Restore point has been split.
462/// Old restore point: MBB
463/// New restore point: NMBB
464/// Any basic block(say BBToUpdate) which had a fallthrough to MBB
465/// previously should
466/// 1. Fallthrough to NMBB iff NMBB is inserted immediately above MBB in the
467/// block layout OR
468/// 2. Branch unconditionally to NMBB iff NMBB is inserted at any other place.
469static void updateTerminator(MachineBasicBlock *BBToUpdate,
470 MachineBasicBlock *NMBB,
471 const TargetInstrInfo *TII) {
472 DebugLoc DL = BBToUpdate->findBranchDebugLoc();
473 // if NMBB isn't the new layout successor for BBToUpdate, insert unconditional
474 // branch to it
475 if (!BBToUpdate->isLayoutSuccessor(NMBB))
476 TII->insertUnconditionalBranch(*BBToUpdate, NMBB, DL);
477}
478
479/// This function splits the restore point and returns new restore point/BB.
480///
481/// DirtyPreds: Predessors of \p MBB that are ReachableByDirty
482///
483/// Decision has been made to split the restore point.
484/// old restore point: \p MBB
485/// new restore point: \p NMBB
486/// This function makes the necessary block layout changes so that
487/// 1. \p NMBB points to \p MBB unconditionally
488/// 2. All dirtyPreds that previously pointed to \p MBB point to \p NMBB
489static MachineBasicBlock *
492 const TargetInstrInfo *TII) {
493 MachineFunction *MF = MBB->getParent();
494
495 // get the list of DirtyPreds who have a fallthrough to MBB
496 // before the block layout change. This is just to ensure that if the NMBB is
497 // inserted after MBB, then we create unconditional branch from
498 // DirtyPred/CleanPred to NMBB
500 for (MachineBasicBlock *BB : DirtyPreds)
501 if (BB->getFallThrough(false) == MBB)
502 MBBFallthrough.insert(BB);
503
505 // Insert this block at the end of the function. Inserting in between may
506 // interfere with control flow optimizer decisions.
507 MF->insert(MF->end(), NMBB);
508
509 for (const MachineBasicBlock::RegisterMaskPair &LI : MBB->liveins())
510 NMBB->addLiveIn(LI.PhysReg);
511
512 TII->insertUnconditionalBranch(*NMBB, MBB, DebugLoc());
513
514 // After splitting, all predecessors of the restore point should be dirty
515 // blocks.
516 for (MachineBasicBlock *SuccBB : DirtyPreds)
517 SuccBB->ReplaceUsesOfBlockWith(MBB, NMBB);
518
519 NMBB->addSuccessor(MBB);
520
521 for (MachineBasicBlock *BBToUpdate : MBBFallthrough)
522 updateTerminator(BBToUpdate, NMBB, TII);
523
524 return NMBB;
525}
526
527/// This function undoes the restore point split done earlier.
528///
529/// DirtyPreds: All predecessors of \p NMBB that are ReachableByDirty.
530///
531/// Restore point was split and the change needs to be unrolled. Make necessary
532/// changes to reset restore point from \p NMBB to \p MBB.
536 const TargetInstrInfo *TII) {
537 // For a BB, if NMBB is fallthrough in the current layout, then in the new
538 // layout a. BB should fallthrough to MBB OR b. BB should undconditionally
539 // branch to MBB
541 for (MachineBasicBlock *BB : DirtyPreds)
542 if (BB->getFallThrough(false) == NMBB)
543 NMBBFallthrough.insert(BB);
544
545 NMBB->removeSuccessor(MBB);
546 for (MachineBasicBlock *SuccBB : DirtyPreds)
547 SuccBB->ReplaceUsesOfBlockWith(NMBB, MBB);
548
549 NMBB->erase(NMBB->begin(), NMBB->end());
550 NMBB->eraseFromParent();
551
552 for (MachineBasicBlock *BBToUpdate : NMBBFallthrough)
553 updateTerminator(BBToUpdate, MBB, TII);
554}
555
556// A block is deemed fit for restore point split iff there exist
557// 1. DirtyPreds - preds of CurRestore reachable from use or def of CSR/FI
558// 2. CleanPreds - preds of CurRestore that arent DirtyPreds
559bool ShrinkWrapImpl::checkIfRestoreSplittable(
560 const MachineBasicBlock *CurRestore,
561 const DenseSet<const MachineBasicBlock *> &ReachableByDirty,
564 const TargetInstrInfo *TII, RegScavenger *RS) {
565 for (const MachineInstr &MI : *CurRestore)
566 if (useOrDefCSROrFI(MI, RS, /*StackAddressUsed=*/true))
567 return false;
568
569 for (MachineBasicBlock *PredBB : CurRestore->predecessors()) {
570 if (!isAnalyzableBB(*TII, *PredBB))
571 return false;
572
573 if (ReachableByDirty.count(PredBB))
574 DirtyPreds.push_back(PredBB);
575 else
576 CleanPreds.push_back(PredBB);
577 }
578
579 return !(CleanPreds.empty() || DirtyPreds.empty());
580}
581
582bool ShrinkWrapImpl::postShrinkWrapping(bool HasCandidate, MachineFunction &MF,
583 RegScavenger *RS) {
585 return false;
586
587 MachineBasicBlock *InitSave = nullptr;
588 MachineBasicBlock *InitRestore = nullptr;
589
590 if (HasCandidate) {
591 InitSave = Save;
592 InitRestore = Restore;
593 } else {
594 InitRestore = nullptr;
595 InitSave = &MF.front();
596 for (MachineBasicBlock &MBB : MF) {
597 if (MBB.isEHFuncletEntry())
598 return false;
599 if (MBB.isReturnBlock()) {
600 // Do not support multiple restore points.
601 if (InitRestore)
602 return false;
603 InitRestore = &MBB;
604 }
605 }
606 }
607
608 if (!InitSave || !InitRestore || InitRestore == InitSave ||
609 !MDT->dominates(InitSave, InitRestore) ||
610 !MPDT->dominates(InitRestore, InitSave))
611 return false;
612
613 // Bail out of the optimization if any of the basic block is target of
614 // INLINEASM_BR instruction
615 for (MachineBasicBlock &MBB : MF)
617 return false;
618
619 DenseSet<const MachineBasicBlock *> DirtyBBs;
620 for (MachineBasicBlock &MBB : MF) {
621 if (MBB.isEHPad()) {
622 DirtyBBs.insert(&MBB);
623 continue;
624 }
625 for (const MachineInstr &MI : MBB)
626 if (useOrDefCSROrFI(MI, RS, /*StackAddressUsed=*/true)) {
627 DirtyBBs.insert(&MBB);
628 break;
629 }
630 }
631
632 // Find blocks reachable from the use or def of CSRs/FI.
633 DenseSet<const MachineBasicBlock *> ReachableByDirty;
634 collectBlocksReachableByDirty(DirtyBBs, ReachableByDirty);
635
636 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
639 if (!checkIfRestoreSplittable(InitRestore, ReachableByDirty, DirtyPreds,
640 CleanPreds, TII, RS))
641 return false;
642
643 // Trying to reach out to the new save point which dominates all dirty blocks.
644 MachineBasicBlock *NewSave =
645 FindIDom<>(**DirtyPreds.begin(), DirtyPreds, *MDT, false);
646
647 while (NewSave && (hasDirtyPred(ReachableByDirty, *NewSave) ||
648 EntryFreq < MBFI->getBlockFreq(NewSave) ||
649 /*Entry freq has been observed more than a loop block in
650 some cases*/
651 MLI->getLoopFor(NewSave)))
652 NewSave = FindIDom<>(**NewSave->pred_begin(), NewSave->predecessors(), *MDT,
653 false);
654
655 const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
656 if (!NewSave || NewSave == InitSave ||
657 isSaveReachableThroughClean(NewSave, CleanPreds) ||
658 !TFI->canUseAsPrologue(*NewSave))
659 return false;
660
661 // Now we know that splitting a restore point can isolate the restore point
662 // from clean blocks and doing so can shrink the save point.
663 MachineBasicBlock *NewRestore =
664 tryToSplitRestore(InitRestore, DirtyPreds, TII);
665
666 // Make sure if the new restore point is valid as an epilogue, depending on
667 // targets.
668 if (!TFI->canUseAsEpilogue(*NewRestore)) {
669 rollbackRestoreSplit(MF, NewRestore, InitRestore, DirtyPreds, TII);
670 return false;
671 }
672
673 Save = NewSave;
674 Restore = NewRestore;
675
676 MDT->recalculate(MF);
677 MPDT->recalculate(MF);
678
679 assert((MDT->dominates(Save, Restore) && MPDT->dominates(Restore, Save)) &&
680 "Incorrect save or restore point due to dominance relations");
681 assert((!MLI->getLoopFor(Save) && !MLI->getLoopFor(Restore)) &&
682 "Unexpected save or restore point in a loop");
683 assert((EntryFreq >= MBFI->getBlockFreq(Save) &&
684 EntryFreq >= MBFI->getBlockFreq(Restore)) &&
685 "Incorrect save or restore point based on block frequency");
686 return true;
687}
688
689void ShrinkWrapImpl::updateSaveRestorePoints(MachineBasicBlock &MBB,
690 RegScavenger *RS) {
691 // Get rid of the easy cases first.
692 if (!Save)
693 Save = &MBB;
694 else
695 Save = MDT->findNearestCommonDominator(Save, &MBB);
696 assert(Save);
697
698 if (!Restore)
699 Restore = &MBB;
700 else if (MPDT->getNode(&MBB)) // If the block is not in the post dom tree, it
701 // means the block never returns. If that's the
702 // case, we don't want to call
703 // `findNearestCommonDominator`, which will
704 // return `Restore`.
705 Restore = MPDT->findNearestCommonDominator(Restore, &MBB);
706 else
707 Restore = nullptr; // Abort, we can't find a restore point in this case.
708
709 // Make sure we would be able to insert the restore code before the
710 // terminator.
711 if (Restore == &MBB) {
712 for (const MachineInstr &Terminator : MBB.terminators()) {
713 if (!useOrDefCSROrFI(Terminator, RS, /*StackAddressUsed=*/true))
714 continue;
715 // One of the terminator needs to happen before the restore point.
716 if (MBB.succ_empty()) {
717 Restore = nullptr; // Abort, we can't find a restore point in this case.
718 break;
719 }
720 // Look for a restore point that post-dominates all the successors.
721 // The immediate post-dominator is what we are looking for.
722 Restore = FindIDom<>(*Restore, Restore->successors(), *MPDT);
723 break;
724 }
725 }
726
727 if (!Restore) {
729 dbgs() << "Restore point needs to be spanned on several blocks\n");
730 return;
731 }
732
733 // Make sure Save and Restore are suitable for shrink-wrapping:
734 // 1. all path from Save needs to lead to Restore before exiting.
735 // 2. all path to Restore needs to go through Save from Entry.
736 // We achieve that by making sure that:
737 // A. Save dominates Restore.
738 // B. Restore post-dominates Save.
739 // C. Save and Restore are in the same loop.
740 bool SaveDominatesRestore = false;
741 bool RestorePostDominatesSave = false;
742 while (Restore &&
743 (!(SaveDominatesRestore = MDT->dominates(Save, Restore)) ||
744 !(RestorePostDominatesSave = MPDT->dominates(Restore, Save)) ||
745 // Post-dominance is not enough in loops to ensure that all uses/defs
746 // are after the prologue and before the epilogue at runtime.
747 // E.g.,
748 // while(1) {
749 // Save
750 // Restore
751 // if (...)
752 // break;
753 // use/def CSRs
754 // }
755 // All the uses/defs of CSRs are dominated by Save and post-dominated
756 // by Restore. However, the CSRs uses are still reachable after
757 // Restore and before Save are executed.
758 //
759 // For now, just push the restore/save points outside of loops.
760 // FIXME: Refine the criteria to still find interesting cases
761 // for loops.
762 MLI->getLoopFor(Save) || MLI->getLoopFor(Restore))) {
763 // Fix (A).
764 if (!SaveDominatesRestore) {
765 Save = MDT->findNearestCommonDominator(Save, Restore);
766 continue;
767 }
768 // Fix (B).
769 if (!RestorePostDominatesSave)
770 Restore = MPDT->findNearestCommonDominator(Restore, Save);
771
772 // Fix (C).
773 if (Restore && (MLI->getLoopFor(Save) || MLI->getLoopFor(Restore))) {
774 if (MLI->getLoopDepth(Save) > MLI->getLoopDepth(Restore)) {
775 // Push Save outside of this loop if immediate dominator is different
776 // from save block. If immediate dominator is not different, bail out.
777 Save = FindIDom<>(*Save, Save->predecessors(), *MDT);
778 if (!Save)
779 break;
780 } else {
781 // If the loop does not exit, there is no point in looking
782 // for a post-dominator outside the loop.
783 SmallVector<MachineBasicBlock*, 4> ExitBlocks;
784 MLI->getLoopFor(Restore)->getExitingBlocks(ExitBlocks);
785 // Push Restore outside of this loop.
786 // Look for the immediate post-dominator of the loop exits.
787 MachineBasicBlock *IPdom = Restore;
788 for (MachineBasicBlock *LoopExitBB: ExitBlocks) {
789 IPdom = FindIDom<>(*IPdom, LoopExitBB->successors(), *MPDT);
790 if (!IPdom)
791 break;
792 }
793 // If the immediate post-dominator is not in a less nested loop,
794 // then we are stuck in a program with an infinite loop.
795 // In that case, we will not find a safe point, hence, bail out.
796 if (IPdom && MLI->getLoopDepth(IPdom) < MLI->getLoopDepth(Restore))
797 Restore = IPdom;
798 else {
799 Restore = nullptr;
800 break;
801 }
802 }
803 }
804 }
805}
806
808 StringRef RemarkName, StringRef RemarkMessage,
809 const DiagnosticLocation &Loc,
810 const MachineBasicBlock *MBB) {
811 ORE->emit([&]() {
813 << RemarkMessage;
814 });
815
816 LLVM_DEBUG(dbgs() << RemarkMessage << '\n');
817 return false;
818}
819
820bool ShrinkWrapImpl::performShrinkWrapping(
821 const ReversePostOrderTraversal<MachineBasicBlock *> &RPOT,
822 RegScavenger *RS) {
823 for (MachineBasicBlock *MBB : RPOT) {
824 LLVM_DEBUG(dbgs() << "Look into: " << printMBBReference(*MBB) << '\n');
825
826 if (MBB->isEHFuncletEntry())
827 return giveUpWithRemarks(ORE, "UnsupportedEHFunclets",
828 "EH Funclets are not supported yet.",
829 MBB->front().getDebugLoc(), MBB);
830
832 // Push the prologue and epilogue outside of the region that may throw (or
833 // jump out via inlineasm_br), by making sure that all the landing pads
834 // are at least at the boundary of the save and restore points. The
835 // problem is that a basic block can jump out from the middle in these
836 // cases, which we do not handle.
837 updateSaveRestorePoints(*MBB, RS);
838 if (!ArePointsInteresting()) {
839 LLVM_DEBUG(dbgs() << "EHPad/inlineasm_br prevents shrink-wrapping\n");
840 return false;
841 }
842 continue;
843 }
844
845 bool StackAddressUsed = false;
846 // Check if we found any stack accesses in the predecessors. We are not
847 // doing a full dataflow analysis here to keep things simple but just
848 // rely on a reverse portorder traversal (RPOT) to guarantee predecessors
849 // are already processed except for loops (and accept the conservative
850 // result for loops).
851 for (const MachineBasicBlock *Pred : MBB->predecessors()) {
852 if (StackAddressUsedBlockInfo.test(Pred->getNumber())) {
853 StackAddressUsed = true;
854 break;
855 }
856 }
857
858 for (const MachineInstr &MI : *MBB) {
859 if (useOrDefCSROrFI(MI, RS, StackAddressUsed)) {
860 // Save (resp. restore) point must dominate (resp. post dominate)
861 // MI. Look for the proper basic block for those.
862 updateSaveRestorePoints(*MBB, RS);
863 // If we are at a point where we cannot improve the placement of
864 // save/restore instructions, just give up.
865 if (!ArePointsInteresting()) {
866 LLVM_DEBUG(dbgs() << "No Shrink wrap candidate found\n");
867 return false;
868 }
869 // No need to look for other instructions, this basic block
870 // will already be part of the handled region.
871 StackAddressUsed = true;
872 break;
873 }
874 }
875 StackAddressUsedBlockInfo[MBB->getNumber()] = StackAddressUsed;
876 }
877 if (!ArePointsInteresting()) {
878 // If the points are not interesting at this point, then they must be null
879 // because it means we did not encounter any frame/CSR related code.
880 // Otherwise, we would have returned from the previous loop.
881 assert(!Save && !Restore && "We miss a shrink-wrap opportunity?!");
882 LLVM_DEBUG(dbgs() << "Nothing to shrink-wrap\n");
883 return false;
884 }
885
886 LLVM_DEBUG(dbgs() << "\n ** Results **\nFrequency of the Entry: "
887 << EntryFreq.getFrequency() << '\n');
888
889 const TargetFrameLowering *TFI =
890 MachineFunc->getSubtarget().getFrameLowering();
891 do {
892 LLVM_DEBUG(dbgs() << "Shrink wrap candidates (#, Name, Freq):\nSave: "
893 << printMBBReference(*Save) << ' '
894 << printBlockFreq(*MBFI, *Save)
895 << "\nRestore: " << printMBBReference(*Restore) << ' '
896 << printBlockFreq(*MBFI, *Restore) << '\n');
897
898 bool IsSaveCheap, TargetCanUseSaveAsPrologue = false;
899 if (((IsSaveCheap = EntryFreq >= MBFI->getBlockFreq(Save)) &&
900 EntryFreq >= MBFI->getBlockFreq(Restore)) &&
901 ((TargetCanUseSaveAsPrologue = TFI->canUseAsPrologue(*Save)) &&
902 TFI->canUseAsEpilogue(*Restore)))
903 break;
905 dbgs() << "New points are too expensive or invalid for the target\n");
906 MachineBasicBlock *NewBB;
907 if (!IsSaveCheap || !TargetCanUseSaveAsPrologue) {
908 Save = FindIDom<>(*Save, Save->predecessors(), *MDT);
909 if (!Save)
910 break;
911 NewBB = Save;
912 } else {
913 // Restore is expensive.
914 Restore = FindIDom<>(*Restore, Restore->successors(), *MPDT);
915 if (!Restore)
916 break;
917 NewBB = Restore;
918 }
919 updateSaveRestorePoints(*NewBB, RS);
920 } while (Save && Restore);
921
922 if (!ArePointsInteresting()) {
923 ++NumCandidatesDropped;
924 return false;
925 }
926 return true;
927}
928
929bool ShrinkWrapImpl::run(MachineFunction &MF) {
930 LLVM_DEBUG(dbgs() << "**** Analysing " << MF.getName() << '\n');
931
932 init(MF);
933
934 ReversePostOrderTraversal<MachineBasicBlock *> RPOT(&*MF.begin());
936 // If MF is irreducible, a block may be in a loop without
937 // MachineLoopInfo reporting it. I.e., we may use the
938 // post-dominance property in loops, which lead to incorrect
939 // results. Moreover, we may miss that the prologue and
940 // epilogue are not in the same loop, leading to unbalanced
941 // construction/deconstruction of the stack frame.
942 return giveUpWithRemarks(ORE, "UnsupportedIrreducibleCFG",
943 "Irreducible CFGs are not supported yet.",
944 MF.getFunction().getSubprogram(), &MF.front());
945 }
946
947 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
948 std::unique_ptr<RegScavenger> RS(
949 TRI->requiresRegisterScavenging(MF) ? new RegScavenger() : nullptr);
950
951 bool Changed = false;
952
953 // Initially, conservatively assume that stack addresses can be used in each
954 // basic block and change the state only for those basic blocks for which we
955 // were able to prove the opposite.
956 StackAddressUsedBlockInfo.resize(MF.getNumBlockIDs(), true);
957 bool HasCandidate = performShrinkWrapping(RPOT, RS.get());
958 StackAddressUsedBlockInfo.clear();
959 Changed = postShrinkWrapping(HasCandidate, MF, RS.get());
960 if (!HasCandidate && !Changed)
961 return false;
962 if (!ArePointsInteresting())
963 return Changed;
964
965 LLVM_DEBUG(dbgs() << "Final shrink wrap candidates:\nSave: "
966 << printMBBReference(*Save) << ' '
967 << "\nRestore: " << printMBBReference(*Restore) << '\n');
968
969 MachineFrameInfo &MFI = MF.getFrameInfo();
970 SmallVector<MachineBasicBlock *, 4> SavePoints;
971 SmallVector<MachineBasicBlock *, 4> RestorePoints;
972 if (Save) {
973 SavePoints.push_back(Save);
974 RestorePoints.push_back(Restore);
975 }
976 MFI.setSavePoints(SavePoints);
977 MFI.setRestorePoints(RestorePoints);
978 ++NumCandidates;
979 return Changed;
980}
981
982bool ShrinkWrapLegacy::runOnMachineFunction(MachineFunction &MF) {
983 if (skipFunction(MF.getFunction()) || MF.empty() ||
984 !ShrinkWrapImpl::isShrinkWrapEnabled(MF))
985 return false;
986
987 MachineDominatorTree *MDT =
988 &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
989 MachinePostDominatorTree *MPDT =
990 &getAnalysis<MachinePostDominatorTreeWrapperPass>().getPostDomTree();
991 MachineBlockFrequencyInfo *MBFI =
992 &getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI();
993 MachineLoopInfo *MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
994 MachineOptimizationRemarkEmitter *ORE =
995 &getAnalysis<MachineOptimizationRemarkEmitterPass>().getORE();
996
997 return ShrinkWrapImpl(MDT, MPDT, MBFI, MLI, ORE).run(MF);
998}
999
1002 MFPropsModifier _(*this, MF);
1003 if (MF.empty() || !ShrinkWrapImpl::isShrinkWrapEnabled(MF))
1004 return PreservedAnalyses::all();
1005
1014
1015 ShrinkWrapImpl(&MDT, &MPDT, &MBFI, &MLI, &ORE).run(MF);
1016 return PreservedAnalyses::all();
1017}
1018
1019bool ShrinkWrapImpl::isShrinkWrapEnabled(const MachineFunction &MF) {
1021
1022 switch (EnableShrinkWrapOpt) {
1023 case cl::BOU_UNSET:
1024 return TFI->enableShrinkWrapping(MF) &&
1025 // Windows with CFI has some limitations that make it impossible
1026 // to use shrink-wrapping.
1028 // Sanitizers look at the value of the stack at the location
1029 // of the crash. Since a crash can happen anywhere, the
1030 // frame must be lowered before anything else happen for the
1031 // sanitizers to be able to get a correct stack frame.
1032 !(MF.getFunction().hasFnAttribute(Attribute::SanitizeAddress) ||
1033 MF.getFunction().hasFnAttribute(Attribute::SanitizeThread) ||
1034 MF.getFunction().hasFnAttribute(Attribute::SanitizeMemory) ||
1035 MF.getFunction().hasFnAttribute(Attribute::SanitizeType) ||
1036 MF.getFunction().hasFnAttribute(Attribute::SanitizeHWAddress));
1037 // If EnableShrinkWrap is set, it takes precedence on whatever the
1038 // target sets. The rational is that we assume we want to test
1039 // something related to shrink-wrapping.
1040 case cl::BOU_TRUE:
1041 return true;
1042 case cl::BOU_FALSE:
1043 return false;
1044 }
1045 llvm_unreachable("Invalid shrink-wrapping state");
1046}
for(const MachineOperand &MO :llvm::drop_begin(OldMI.operands(), Desc.getNumOperands()))
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
aarch64 promote const
MachineBasicBlock & MBB
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
This file contains the simple types necessary to represent the attributes associated with functions a...
This file implements the BitVector class.
#define DEBUG_TYPE
const HexagonInstrInfo * TII
#define _
IRTranslator LLVM IR MI
===- MachineOptimizationRemarkEmitter.h - Opt Diagnostics -*- C++ -*-—===//
Register Reg
Register const TargetRegisterInfo * TRI
if(PassOpts->AAPipeline)
#define INITIALIZE_PASS_DEPENDENCY(depName)
Definition PassSupport.h:42
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
Definition PassSupport.h:44
#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)
Definition PassSupport.h:39
This file builds on the ADT/GraphTraits.h file to build a generic graph post order iterator.
const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB
const SmallVectorImpl< MachineOperand > & Cond
This file declares the machine register scavenger class.
This file implements a set that has insertion order iteration characteristics.
static void markAllReachable(DenseSet< const MachineBasicBlock * > &Visited, const MachineBasicBlock &MBB)
Derives the list of all the basic blocks reachable from MBB.
static void updateTerminator(MachineBasicBlock *BBToUpdate, MachineBasicBlock *NMBB, const TargetInstrInfo *TII)
This function updates the branches post restore point split.
static MachineBasicBlock * tryToSplitRestore(MachineBasicBlock *MBB, ArrayRef< MachineBasicBlock * > DirtyPreds, const TargetInstrInfo *TII)
This function splits the restore point and returns new restore point/BB.
static bool hasDirtyPred(const DenseSet< const MachineBasicBlock * > &ReachableByDirty, const MachineBasicBlock &MBB)
Determines if any predecessor of MBB is on the path from block that has use or def of CSRs/FI to MBB.
static bool giveUpWithRemarks(MachineOptimizationRemarkEmitter *ORE, StringRef RemarkName, StringRef RemarkMessage, const DiagnosticLocation &Loc, const MachineBasicBlock *MBB)
static cl::opt< bool > EnablePostShrinkWrapOpt("enable-shrink-wrap-region-split", cl::init(true), cl::Hidden, cl::desc("enable splitting of the restore block if possible"))
static void rollbackRestoreSplit(MachineFunction &MF, MachineBasicBlock *NMBB, MachineBasicBlock *MBB, ArrayRef< MachineBasicBlock * > DirtyPreds, const TargetInstrInfo *TII)
This function undoes the restore point split done earlier.
static bool isAnalyzableBB(const TargetInstrInfo &TII, MachineBasicBlock &Entry)
static bool isSaveReachableThroughClean(const MachineBasicBlock *SavePoint, ArrayRef< MachineBasicBlock * > CleanPreds)
static cl::opt< cl::boolOrDefault > EnableShrinkWrapOpt("enable-shrink-wrap", cl::Hidden, cl::desc("enable the shrink-wrapping pass"))
static void collectBlocksReachableByDirty(const DenseSet< const MachineBasicBlock * > &DirtyBBs, DenseSet< const MachineBasicBlock * > &ReachableByDirty)
Collect blocks reachable by use or def of CSRs/FI.
static MachineBasicBlock * FindIDom(MachineBasicBlock &Block, ListOfBBs BBs, DominanceAnalysis &Dom, bool Strict=true)
Helper function to find the immediate (post) dominator.
This file defines the SmallVector class.
This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...
#define STATISTIC(VARNAME, DESC)
Definition Statistic.h:167
#define LLVM_DEBUG(...)
Definition Debug.h:119
This file describes how to lower LLVM code to machine code.
PassT::Result & getResult(IRUnitT &IR, ExtraArgTs... ExtraArgs)
Get the result of an analysis pass for a given IR unit.
AnalysisUsage & addRequired()
void setPreservesAll()
Set by analyses that do not transform their input at all.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition ArrayRef.h:41
bool test(unsigned Idx) const
Definition BitVector.h:461
int find_first() const
find_first - Returns the index of the first set bit, -1 if none of the bits are set.
Definition BitVector.h:300
void resize(unsigned N, bool t=false)
resize - Grow or shrink the bitvector.
Definition BitVector.h:341
void clear()
clear - Removes all bits from the bitvector.
Definition BitVector.h:335
int find_next(unsigned Prev) const
find_next - Returns the index of the next set bit following the "Prev" bit.
Definition BitVector.h:308
uint64_t getFrequency() const
Returns the frequency as a fixpoint number scaled by the entry frequency.
A debug info location.
Definition DebugLoc.h:124
Implements a dense probed hash-table based set.
Definition DenseSet.h:261
NodeT * findNearestCommonDominator(NodeT *A, NodeT *B) const
Find nearest common dominator basic block for basic block A and B.
bool dominates(const DomTreeNodeBase< NodeT > *A, const DomTreeNodeBase< NodeT > *B) const
dominates - Returns true iff A dominates B.
void recalculate(ParentType &Func)
recalculate - compute a dominator tree for the given function
DomTreeNodeBase< NodeT > * getNode(const NodeT *BB) const
getNode - return the (Post)DominatorTree node for the specified basic block.
DISubprogram * getSubprogram() const
Get the attached subprogram.
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition Function.cpp:727
void getExitingBlocks(SmallVectorImpl< BlockT * > &ExitingBlocks) const
Return all blocks inside the loop that have successors outside of the loop.
unsigned getLoopDepth(const BlockT *BB) const
Return the loop nesting level of the specified block.
LoopT * getLoopFor(const BlockT *BB) const
Return the inner most loop that BB lives in.
bool usesWindowsCFI() const
Definition MCAsmInfo.h:652
An RAII based helper class to modify MachineFunctionProperties when running pass.
bool isInlineAsmBrIndirectTarget() const
Returns true if this is the indirect dest of an INLINEASM_BR.
bool isEHPad() const
Returns true if the block is a landing pad.
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...
bool isEHFuncletEntry() const
Returns true if this is the entry block of an EH funclet.
bool isReturnBlock() const
Convenience function that returns true if the block ends in a return instruction.
LLVM_ABI void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
LLVM_ABI void removeSuccessor(MachineBasicBlock *Succ, bool NormalizeSuccProbs=false)
Remove successor from the successors list of this MachineBasicBlock.
LLVM_ABI bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...
LLVM_ABI void eraseFromParent()
This method unlinks 'this' from the containing function and deletes it.
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
LLVM_ABI instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
iterator_range< iterator > terminators()
LLVM_ABI DebugLoc findBranchDebugLoc()
Find and return the merged DebugLoc of the branch instructions of the block.
iterator_range< succ_iterator > successors()
iterator_range< pred_iterator > predecessors()
MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...
LLVM_ABI BlockFrequency getBlockFreq(const MachineBasicBlock *MBB) const
getblockFreq - Return block frequency.
Analysis pass which computes a MachineDominatorTree.
Analysis pass which computes a MachineDominatorTree.
DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...
bool dominates(const MachineInstr *A, const MachineInstr *B) const
void setRestorePoints(ArrayRef< MachineBasicBlock * > NewRestorePoints)
void setSavePoints(ArrayRef< MachineBasicBlock * > NewSavePoints)
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Function & getFunction()
Return the LLVM function that this machine code represents.
unsigned getNumBlockIDs() const
getNumBlockIDs - Return the number of MBB ID's allocated.
const MachineBasicBlock & front() const
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *BB=nullptr, std::optional< UniqueBBID > BBID=std::nullopt)
CreateMachineInstr - Allocate a new MachineInstr.
void insert(iterator MBBI, MachineBasicBlock *MBB)
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
Representation of each machine instruction.
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Analysis pass that exposes the MachineLoopInfo for a machine function.
A description of a memory reference used in the backend.
MachineOperand class - Representation of each machine instruction operand.
LLVM_ABI Result run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)
LLVM_ABI void emit(DiagnosticInfoOptimizationBase &OptDiag)
Emit an optimization remark.
Diagnostic information for missed-optimization remarks.
MachinePostDominatorTree - an analysis pass wrapper for DominatorTree used to compute the post-domina...
LLVM_ABI MachineBasicBlock * findNearestCommonDominator(ArrayRef< MachineBasicBlock * > Blocks) const
Returns the nearest common dominator of the given blocks.
static LLVM_ABI PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
A set of analyses that are preserved following a run of a transformation pass.
Definition Analysis.h:112
static PreservedAnalyses all()
Construct a special preserved set that preserves all passes.
Definition Analysis.h:118
Special value supplied for machine level alias analysis.
Wrapper class representing virtual and physical registers.
Definition Register.h:19
PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
A SetVector that performs no allocations if smaller than a certain size.
Definition SetVector.h:356
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void append(ItTy in_start, ItTy in_end)
Add the specified range to the end of the SmallVector.
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StringRef - Represent a constant reference to a string, i.e.
Definition StringRef.h:55
Information about stack frame layout on the target.
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
virtual bool enableShrinkWrapping(const MachineFunction &MF) const
Returns true if the target will correctly handle shrink wrapping.
virtual bool canUseAsEpilogue(const MachineBasicBlock &MBB) const
Check whether or not the given MBB can be used as a epilogue for the target.
virtual bool canUseAsPrologue(const MachineBasicBlock &MBB) const
Check whether or not the given MBB can be used as a prologue for the target.
TargetInstrInfo - Interface to description of machine instruction set.
Register getStackPointerRegisterToSaveRestore() const
If a physical register, this specifies the register that llvm.savestack/llvm.restorestack should save...
const MCAsmInfo * getMCAsmInfo() const
Return target specific asm information.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
virtual const TargetFrameLowering * getFrameLowering() const
virtual const TargetInstrInfo * getInstrInfo() const
virtual const TargetRegisterInfo * getRegisterInfo() const =0
Return the target's register information.
virtual const TargetLowering * getTargetLowering() const
LLVM Value Representation.
Definition Value.h:75
std::pair< iterator, bool > insert(const ValueT &V)
Definition DenseSet.h:194
size_type count(const_arg_type_t< ValueT > V) const
Return 1 if the specified key is in the set, 0 otherwise.
Definition DenseSet.h:174
Changed
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
initializer< Ty > init(const Ty &Val)
PointerTypeMap run(const Module &M)
Compute the PointerTypeMap for the module M.
This is an optimization pass for GlobalISel generic memory operations.
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
Definition STLExtras.h:1727
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:649
LLVM_ABI void initializeShrinkWrapLegacyPass(PassRegistry &)
AnalysisManager< MachineFunction > MachineFunctionAnalysisManager
LLVM_ABI char & ShrinkWrapID
ShrinkWrap pass. Look for the best place to insert save and restore.
bool containsIrreducibleCFG(RPOTraversalT &RPOTraversal, const LoopInfoT &LI)
Return true if the control flow in RPOTraversal is irreducible.
Definition CFG.h:149
LLVM_ABI raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition Debug.cpp:207
class LLVM_GSL_OWNER SmallVector
Forward declaration of SmallVector so that calculateSmallVectorDefaultInlinedElements can reference s...
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
Definition Casting.h:548
iterator_range(Container &&) -> iterator_range< llvm::detail::IterOfRange< Container > >
DWARFExpression::Operation Op
LLVM_ABI Printable printBlockFreq(const BlockFrequencyInfo &BFI, BlockFrequency Freq)
Print the block frequency Freq relative to the current functions entry frequency.
LLVM_ABI const Value * getUnderlyingObject(const Value *V, unsigned MaxLookup=MaxLookupSearchDepth)
This method strips off any GEP address adjustments, pointer casts or llvm.threadlocal....
LLVM_ABI Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
Pair of physical register and lane mask.