LLVM 22.0.0git
TargetTransformInfo.cpp
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1//===- llvm/Analysis/TargetTransformInfo.cpp ------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
10#include "llvm/Analysis/CFG.h"
14#include "llvm/IR/CFG.h"
15#include "llvm/IR/Dominators.h"
16#include "llvm/IR/Instruction.h"
19#include "llvm/IR/Module.h"
20#include "llvm/IR/Operator.h"
23#include <optional>
24#include <utility>
25
26using namespace llvm;
27using namespace PatternMatch;
28
29#define DEBUG_TYPE "tti"
30
31static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(false),
33 cl::desc("Recognize reduction patterns."));
34
36 "cache-line-size", cl::init(0), cl::Hidden,
37 cl::desc("Use this to override the target cache line size when "
38 "specified by the user."));
39
41 "min-page-size", cl::init(0), cl::Hidden,
42 cl::desc("Use this to override the target's minimum page size."));
43
45 "predictable-branch-threshold", cl::init(99), cl::Hidden,
47 "Use this to override the target's predictable branch threshold (%)."));
48
49namespace {
50/// No-op implementation of the TTI interface using the utility base
51/// classes.
52///
53/// This is used when no target specific information is available.
54struct NoTTIImpl : TargetTransformInfoImplCRTPBase<NoTTIImpl> {
55 explicit NoTTIImpl(const DataLayout &DL)
56 : TargetTransformInfoImplCRTPBase<NoTTIImpl>(DL) {}
57};
58} // namespace
59
61 std::unique_ptr<const TargetTransformInfoImplBase> Impl)
62 : TTIImpl(std::move(Impl)) {}
63
65 // If the loop has irreducible control flow, it can not be converted to
66 // Hardware loop.
67 LoopBlocksRPO RPOT(L);
68 RPOT.perform(&LI);
69 if (containsIrreducibleCFG<const BasicBlock *>(RPOT, LI))
70 return false;
71 return true;
72}
73
75 Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarizationCost,
76 bool TypeBasedOnly, const TargetLibraryInfo *LibInfo)
77 : II(dyn_cast<IntrinsicInst>(&CI)), RetTy(CI.getType()), IID(Id),
78 ScalarizationCost(ScalarizationCost), LibInfo(LibInfo) {
79
80 if (const auto *FPMO = dyn_cast<FPMathOperator>(&CI))
81 FMF = FPMO->getFastMathFlags();
82
83 if (!TypeBasedOnly)
84 Arguments.insert(Arguments.begin(), CI.arg_begin(), CI.arg_end());
86 ParamTys.insert(ParamTys.begin(), FTy->param_begin(), FTy->param_end());
87}
88
91 FastMathFlags Flags,
92 const IntrinsicInst *I,
93 InstructionCost ScalarCost)
94 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
95 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end());
96}
97
100 : RetTy(Ty), IID(Id) {
101
102 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
103 ParamTys.reserve(Arguments.size());
104 for (const Value *Argument : Arguments)
105 ParamTys.push_back(Argument->getType());
106}
107
111 InstructionCost ScalarCost, TargetLibraryInfo const *LibInfo)
112 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost),
113 LibInfo(LibInfo) {
114 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end());
115 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
116}
117
119 // Match default options:
120 // - hardware-loop-counter-bitwidth = 32
121 // - hardware-loop-decrement = 1
123 LoopDecrement = ConstantInt::get(CountType, 1);
124}
125
127 LoopInfo &LI, DominatorTree &DT,
128 bool ForceNestedLoop,
130 SmallVector<BasicBlock *, 4> ExitingBlocks;
131 L->getExitingBlocks(ExitingBlocks);
132
133 for (BasicBlock *BB : ExitingBlocks) {
134 // If we pass the updated counter back through a phi, we need to know
135 // which latch the updated value will be coming from.
136 if (!L->isLoopLatch(BB)) {
138 continue;
139 }
140
141 const SCEV *EC = SE.getExitCount(L, BB);
142 if (isa<SCEVCouldNotCompute>(EC))
143 continue;
144 if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) {
145 if (ConstEC->getValue()->isZero())
146 continue;
147 } else if (!SE.isLoopInvariant(EC, L))
148 continue;
149
150 if (SE.getTypeSizeInBits(EC->getType()) > CountType->getBitWidth())
151 continue;
152
153 // If this exiting block is contained in a nested loop, it is not eligible
154 // for insertion of the branch-and-decrement since the inner loop would
155 // end up messing up the value in the CTR.
156 if (!IsNestingLegal && LI.getLoopFor(BB) != L && !ForceNestedLoop)
157 continue;
158
159 // We now have a loop-invariant count of loop iterations (which is not the
160 // constant zero) for which we know that this loop will not exit via this
161 // existing block.
162
163 // We need to make sure that this block will run on every loop iteration.
164 // For this to be true, we must dominate all blocks with backedges. Such
165 // blocks are in-loop predecessors to the header block.
166 bool NotAlways = false;
167 for (BasicBlock *Pred : predecessors(L->getHeader())) {
168 if (!L->contains(Pred))
169 continue;
170
171 if (!DT.dominates(BB, Pred)) {
172 NotAlways = true;
173 break;
174 }
175 }
176
177 if (NotAlways)
178 continue;
179
180 // Make sure this blocks ends with a conditional branch.
181 Instruction *TI = BB->getTerminator();
182 if (!TI)
183 continue;
184
185 if (BranchInst *BI = dyn_cast<BranchInst>(TI)) {
186 if (!BI->isConditional())
187 continue;
188
189 ExitBranch = BI;
190 } else
191 continue;
192
193 // Note that this block may not be the loop latch block, even if the loop
194 // has a latch block.
195 ExitBlock = BB;
196 ExitCount = EC;
197 break;
198 }
199
200 if (!ExitBlock)
201 return false;
202 return true;
203}
204
206 : TTIImpl(std::make_unique<NoTTIImpl>(DL)) {}
207
209
211 : TTIImpl(std::move(Arg.TTIImpl)) {}
212
214 TTIImpl = std::move(RHS.TTIImpl);
215 return *this;
216}
217
219 return TTIImpl->getInliningThresholdMultiplier();
220}
221
222unsigned
224 return TTIImpl->getInliningCostBenefitAnalysisSavingsMultiplier();
225}
226
227unsigned
229 const {
230 return TTIImpl->getInliningCostBenefitAnalysisProfitableMultiplier();
231}
232
234 return TTIImpl->getInliningLastCallToStaticBonus();
235}
236
237unsigned
239 return TTIImpl->adjustInliningThreshold(CB);
240}
241
243 const AllocaInst *AI) const {
244 return TTIImpl->getCallerAllocaCost(CB, AI);
245}
246
248 return TTIImpl->getInlinerVectorBonusPercent();
249}
250
252 Type *PointeeType, const Value *Ptr, ArrayRef<const Value *> Operands,
253 Type *AccessType, TTI::TargetCostKind CostKind) const {
254 return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, AccessType, CostKind);
255}
256
259 const TTI::PointersChainInfo &Info, Type *AccessTy,
261 assert((Base || !Info.isSameBase()) &&
262 "If pointers have same base address it has to be provided.");
263 return TTIImpl->getPointersChainCost(Ptrs, Base, Info, AccessTy, CostKind);
264}
265
267 const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI,
268 BlockFrequencyInfo *BFI) const {
269 return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI);
270}
271
275 enum TargetCostKind CostKind) const {
276 InstructionCost Cost = TTIImpl->getInstructionCost(U, Operands, CostKind);
278 "TTI should not produce negative costs!");
279 return Cost;
280}
281
283 return PredictableBranchThreshold.getNumOccurrences() > 0
285 : TTIImpl->getPredictableBranchThreshold();
286}
287
289 return TTIImpl->getBranchMispredictPenalty();
290}
291
293 return TTIImpl->hasBranchDivergence(F);
294}
295
297 if (const auto *Call = dyn_cast<CallBase>(V)) {
298 if (Call->hasFnAttr(Attribute::NoDivergenceSource))
299 return false;
300 }
301 return TTIImpl->isSourceOfDivergence(V);
302}
303
305 return TTIImpl->isAlwaysUniform(V);
306}
307
309 unsigned ToAS) const {
310 return TTIImpl->isValidAddrSpaceCast(FromAS, ToAS);
311}
312
314 unsigned ToAS) const {
315 return TTIImpl->addrspacesMayAlias(FromAS, ToAS);
316}
317
319 return TTIImpl->getFlatAddressSpace();
320}
321
323 SmallVectorImpl<int> &OpIndexes, Intrinsic::ID IID) const {
324 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID);
325}
326
328 unsigned ToAS) const {
329 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS);
330}
331
333 unsigned AS) const {
334 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS);
335}
336
338 return TTIImpl->getAssumedAddrSpace(V);
339}
340
342 return TTIImpl->isSingleThreaded();
343}
344
345std::pair<const Value *, unsigned>
347 return TTIImpl->getPredicatedAddrSpace(V);
348}
349
351 IntrinsicInst *II, Value *OldV, Value *NewV) const {
352 return TTIImpl->rewriteIntrinsicWithAddressSpace(II, OldV, NewV);
353}
354
356 return TTIImpl->isLoweredToCall(F);
357}
358
361 TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const {
362 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
363}
364
366 return TTIImpl->getEpilogueVectorizationMinVF();
367}
368
370 TailFoldingInfo *TFI) const {
371 return TTIImpl->preferPredicateOverEpilogue(TFI);
372}
373
375 bool IVUpdateMayOverflow) const {
376 return TTIImpl->getPreferredTailFoldingStyle(IVUpdateMayOverflow);
377}
378
379std::optional<Instruction *>
381 IntrinsicInst &II) const {
382 return TTIImpl->instCombineIntrinsic(IC, II);
383}
384
386 InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known,
387 bool &KnownBitsComputed) const {
388 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
389 KnownBitsComputed);
390}
391
393 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
394 APInt &UndefElts2, APInt &UndefElts3,
395 std::function<void(Instruction *, unsigned, APInt, APInt &)>
396 SimplifyAndSetOp) const {
397 return TTIImpl->simplifyDemandedVectorEltsIntrinsic(
398 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
399 SimplifyAndSetOp);
400}
401
404 OptimizationRemarkEmitter *ORE) const {
405 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE);
406}
407
409 PeelingPreferences &PP) const {
410 return TTIImpl->getPeelingPreferences(L, SE, PP);
411}
412
414 return TTIImpl->isLegalAddImmediate(Imm);
415}
416
418 return TTIImpl->isLegalAddScalableImmediate(Imm);
419}
420
422 return TTIImpl->isLegalICmpImmediate(Imm);
423}
424
426 int64_t BaseOffset,
427 bool HasBaseReg, int64_t Scale,
428 unsigned AddrSpace,
429 Instruction *I,
430 int64_t ScalableOffset) const {
431 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
432 Scale, AddrSpace, I, ScalableOffset);
433}
434
436 const LSRCost &C2) const {
437 return TTIImpl->isLSRCostLess(C1, C2);
438}
439
441 return TTIImpl->isNumRegsMajorCostOfLSR();
442}
443
445 return TTIImpl->shouldDropLSRSolutionIfLessProfitable();
446}
447
449 return TTIImpl->isProfitableLSRChainElement(I);
450}
451
453 return TTIImpl->canMacroFuseCmp();
454}
455
457 ScalarEvolution *SE, LoopInfo *LI,
459 TargetLibraryInfo *LibInfo) const {
460 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
461}
462
465 ScalarEvolution *SE) const {
466 return TTIImpl->getPreferredAddressingMode(L, SE);
467}
468
470 unsigned AddressSpace) const {
471 return TTIImpl->isLegalMaskedStore(DataType, Alignment, AddressSpace);
472}
473
475 unsigned AddressSpace) const {
476 return TTIImpl->isLegalMaskedLoad(DataType, Alignment, AddressSpace);
477}
478
480 Align Alignment) const {
481 return TTIImpl->isLegalNTStore(DataType, Alignment);
482}
483
484bool TargetTransformInfo::isLegalNTLoad(Type *DataType, Align Alignment) const {
485 return TTIImpl->isLegalNTLoad(DataType, Alignment);
486}
487
489 ElementCount NumElements) const {
490 return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements);
491}
492
494 Align Alignment) const {
495 return TTIImpl->isLegalMaskedGather(DataType, Alignment);
496}
497
499 VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
500 const SmallBitVector &OpcodeMask) const {
501 return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask);
502}
503
505 Align Alignment) const {
506 return TTIImpl->isLegalMaskedScatter(DataType, Alignment);
507}
508
510 Align Alignment) const {
511 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment);
512}
513
515 Align Alignment) const {
516 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment);
517}
518
520 Align Alignment) const {
521 return TTIImpl->isLegalMaskedCompressStore(DataType, Alignment);
522}
523
525 Align Alignment) const {
526 return TTIImpl->isLegalMaskedExpandLoad(DataType, Alignment);
527}
528
530 Align Alignment) const {
531 return TTIImpl->isLegalStridedLoadStore(DataType, Alignment);
532}
533
535 VectorType *VTy, unsigned Factor, Align Alignment,
536 unsigned AddrSpace) const {
537 return TTIImpl->isLegalInterleavedAccessType(VTy, Factor, Alignment,
538 AddrSpace);
539}
540
542 Type *DataType) const {
543 return TTIImpl->isLegalMaskedVectorHistogram(AddrType, DataType);
544}
545
547 return TTIImpl->enableOrderedReductions();
548}
549
550bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const {
551 return TTIImpl->hasDivRemOp(DataType, IsSigned);
552}
553
555 unsigned AddrSpace) const {
556 return TTIImpl->hasVolatileVariant(I, AddrSpace);
557}
558
560 return TTIImpl->prefersVectorizedAddressing();
561}
562
564 Type *Ty, GlobalValue *BaseGV, StackOffset BaseOffset, bool HasBaseReg,
565 int64_t Scale, unsigned AddrSpace) const {
566 InstructionCost Cost = TTIImpl->getScalingFactorCost(
567 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);
568 assert(Cost >= 0 && "TTI should not produce negative costs!");
569 return Cost;
570}
571
573 return TTIImpl->LSRWithInstrQueries();
574}
575
577 return TTIImpl->isTruncateFree(Ty1, Ty2);
578}
579
581 return TTIImpl->isProfitableToHoist(I);
582}
583
584bool TargetTransformInfo::useAA() const { return TTIImpl->useAA(); }
585
587 return TTIImpl->isTypeLegal(Ty);
588}
589
591 return TTIImpl->getRegUsageForType(Ty);
592}
593
595 return TTIImpl->shouldBuildLookupTables();
596}
597
599 Constant *C) const {
600 return TTIImpl->shouldBuildLookupTablesForConstant(C);
601}
602
604 return TTIImpl->shouldBuildRelLookupTables();
605}
606
608 return TTIImpl->useColdCCForColdCall(F);
609}
610
612 Intrinsic::ID ID) const {
613 return TTIImpl->isTargetIntrinsicTriviallyScalarizable(ID);
614}
615
617 Intrinsic::ID ID, unsigned ScalarOpdIdx) const {
618 return TTIImpl->isTargetIntrinsicWithScalarOpAtArg(ID, ScalarOpdIdx);
619}
620
622 Intrinsic::ID ID, int OpdIdx) const {
623 return TTIImpl->isTargetIntrinsicWithOverloadTypeAtArg(ID, OpdIdx);
624}
625
627 Intrinsic::ID ID, int RetIdx) const {
628 return TTIImpl->isTargetIntrinsicWithStructReturnOverloadAtField(ID, RetIdx);
629}
630
632 VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,
633 TTI::TargetCostKind CostKind, bool ForPoisonSrc,
634 ArrayRef<Value *> VL) const {
635 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
636 CostKind, ForPoisonSrc, VL);
637}
638
641 return TTIImpl->getOperandsScalarizationOverhead(Tys, CostKind);
642}
643
645 return TTIImpl->supportsEfficientVectorElementLoadStore();
646}
647
649 return TTIImpl->supportsTailCalls();
650}
651
653 return TTIImpl->supportsTailCallFor(CB);
654}
655
657 bool LoopHasReductions) const {
658 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
659}
660
662TargetTransformInfo::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const {
663 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp);
664}
665
667 return TTIImpl->enableSelectOptimize();
668}
669
671 const Instruction *I) const {
672 return TTIImpl->shouldTreatInstructionLikeSelect(I);
673}
674
676 return TTIImpl->enableInterleavedAccessVectorization();
677}
678
680 return TTIImpl->enableMaskedInterleavedAccessVectorization();
681}
682
684 return TTIImpl->isFPVectorizationPotentiallyUnsafe();
685}
686
687bool
689 unsigned BitWidth,
690 unsigned AddressSpace,
691 Align Alignment,
692 unsigned *Fast) const {
693 return TTIImpl->allowsMisalignedMemoryAccesses(Context, BitWidth,
694 AddressSpace, Alignment, Fast);
695}
696
698TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const {
699 return TTIImpl->getPopcntSupport(IntTyWidthInBit);
700}
701
703 return TTIImpl->haveFastSqrt(Ty);
704}
705
707 const Instruction *I) const {
708 return TTIImpl->isExpensiveToSpeculativelyExecute(I);
709}
710
712 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
713}
714
716 InstructionCost Cost = TTIImpl->getFPOpCost(Ty);
717 assert(Cost >= 0 && "TTI should not produce negative costs!");
718 return Cost;
719}
720
722 unsigned Idx,
723 const APInt &Imm,
724 Type *Ty) const {
725 InstructionCost Cost = TTIImpl->getIntImmCodeSizeCost(Opcode, Idx, Imm, Ty);
726 assert(Cost >= 0 && "TTI should not produce negative costs!");
727 return Cost;
728}
729
733 InstructionCost Cost = TTIImpl->getIntImmCost(Imm, Ty, CostKind);
734 assert(Cost >= 0 && "TTI should not produce negative costs!");
735 return Cost;
736}
737
739 unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty,
742 TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty, CostKind, Inst);
743 assert(Cost >= 0 && "TTI should not produce negative costs!");
744 return Cost;
745}
746
749 const APInt &Imm, Type *Ty,
752 TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind);
753 assert(Cost >= 0 && "TTI should not produce negative costs!");
754 return Cost;
755}
756
758 const Instruction &Inst, const Function &Fn) const {
759 return TTIImpl->preferToKeepConstantsAttached(Inst, Fn);
760}
761
762unsigned TargetTransformInfo::getNumberOfRegisters(unsigned ClassID) const {
763 return TTIImpl->getNumberOfRegisters(ClassID);
764}
765
767 bool IsStore) const {
768 return TTIImpl->hasConditionalLoadStoreForType(Ty, IsStore);
769}
770
772 Type *Ty) const {
773 return TTIImpl->getRegisterClassForType(Vector, Ty);
774}
775
776const char *TargetTransformInfo::getRegisterClassName(unsigned ClassID) const {
777 return TTIImpl->getRegisterClassName(ClassID);
778}
779
782 return TTIImpl->getRegisterBitWidth(K);
783}
784
786 return TTIImpl->getMinVectorRegisterBitWidth();
787}
788
789std::optional<unsigned> TargetTransformInfo::getMaxVScale() const {
790 return TTIImpl->getMaxVScale();
791}
792
793std::optional<unsigned> TargetTransformInfo::getVScaleForTuning() const {
794 return TTIImpl->getVScaleForTuning();
795}
796
798 return TTIImpl->isVScaleKnownToBeAPowerOfTwo();
799}
800
803 return TTIImpl->shouldMaximizeVectorBandwidth(K);
804}
805
807 bool IsScalable) const {
808 return TTIImpl->getMinimumVF(ElemWidth, IsScalable);
809}
810
811unsigned TargetTransformInfo::getMaximumVF(unsigned ElemWidth,
812 unsigned Opcode) const {
813 return TTIImpl->getMaximumVF(ElemWidth, Opcode);
814}
815
816unsigned TargetTransformInfo::getStoreMinimumVF(unsigned VF, Type *ScalarMemTy,
817 Type *ScalarValTy) const {
818 return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy);
819}
820
822 const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const {
823 return TTIImpl->shouldConsiderAddressTypePromotion(
824 I, AllowPromotionWithoutCommonHeader);
825}
826
828 return CacheLineSize.getNumOccurrences() > 0 ? CacheLineSize
829 : TTIImpl->getCacheLineSize();
830}
831
832std::optional<unsigned>
834 return TTIImpl->getCacheSize(Level);
835}
836
837std::optional<unsigned>
839 return TTIImpl->getCacheAssociativity(Level);
840}
841
842std::optional<unsigned> TargetTransformInfo::getMinPageSize() const {
843 return MinPageSize.getNumOccurrences() > 0 ? MinPageSize
844 : TTIImpl->getMinPageSize();
845}
846
848 return TTIImpl->getPrefetchDistance();
849}
850
852 unsigned NumMemAccesses, unsigned NumStridedMemAccesses,
853 unsigned NumPrefetches, bool HasCall) const {
854 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
855 NumPrefetches, HasCall);
856}
857
859 return TTIImpl->getMaxPrefetchIterationsAhead();
860}
861
863 return TTIImpl->enableWritePrefetching();
864}
865
867 return TTIImpl->shouldPrefetchAddressSpace(AS);
868}
869
871 unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
873 PartialReductionExtendKind OpBExtend, std::optional<unsigned> BinOp,
875 return TTIImpl->getPartialReductionCost(Opcode, InputTypeA, InputTypeB,
876 AccumType, VF, OpAExtend, OpBExtend,
877 BinOp, CostKind);
878}
879
881 return TTIImpl->getMaxInterleaveFactor(VF);
882}
883
888
889 // undef/poison don't materialize constants.
890 if (isa<UndefValue>(V))
891 return {OK_AnyValue, OP_None};
892
893 if (isa<ConstantInt>(V) || isa<ConstantFP>(V)) {
894 if (const auto *CI = dyn_cast<ConstantInt>(V)) {
895 if (CI->getValue().isPowerOf2())
896 OpProps = OP_PowerOf2;
897 else if (CI->getValue().isNegatedPowerOf2())
898 OpProps = OP_NegatedPowerOf2;
899 }
900 return {OK_UniformConstantValue, OpProps};
901 }
902
903 // A broadcast shuffle creates a uniform value.
904 // TODO: Add support for non-zero index broadcasts.
905 // TODO: Add support for different source vector width.
906 if (const auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(V))
907 if (ShuffleInst->isZeroEltSplat())
908 OpInfo = OK_UniformValue;
909
910 const Value *Splat = getSplatValue(V);
911
912 // Check for a splat of a constant or for a non uniform vector of constants
913 // and check if the constant(s) are all powers of two.
914 if (Splat) {
915 // Check for a splat of a uniform value. This is not loop aware, so return
916 // true only for the obviously uniform cases (argument, globalvalue)
917 if (isa<Argument>(Splat) || isa<GlobalValue>(Splat)) {
918 OpInfo = OK_UniformValue;
919 } else if (isa<Constant>(Splat)) {
921 if (auto *CI = dyn_cast<ConstantInt>(Splat)) {
922 if (CI->getValue().isPowerOf2())
923 OpProps = OP_PowerOf2;
924 else if (CI->getValue().isNegatedPowerOf2())
925 OpProps = OP_NegatedPowerOf2;
926 }
927 }
928 } else if (const auto *CDS = dyn_cast<ConstantDataSequential>(V)) {
930 bool AllPow2 = true, AllNegPow2 = true;
931 for (uint64_t I = 0, E = CDS->getNumElements(); I != E; ++I) {
932 if (auto *CI = dyn_cast<ConstantInt>(CDS->getElementAsConstant(I))) {
933 AllPow2 &= CI->getValue().isPowerOf2();
934 AllNegPow2 &= CI->getValue().isNegatedPowerOf2();
935 if (AllPow2 || AllNegPow2)
936 continue;
937 }
938 AllPow2 = AllNegPow2 = false;
939 break;
940 }
941 OpProps = AllPow2 ? OP_PowerOf2 : OpProps;
942 OpProps = AllNegPow2 ? OP_NegatedPowerOf2 : OpProps;
943 } else if (isa<ConstantVector>(V) || isa<ConstantDataVector>(V)) {
945 }
946
947 return {OpInfo, OpProps};
948}
949
951 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
952 OperandValueInfo Op1Info, OperandValueInfo Op2Info,
953 ArrayRef<const Value *> Args, const Instruction *CxtI,
954 const TargetLibraryInfo *TLibInfo) const {
955
956 // Use call cost for frem intructions that have platform specific vector math
957 // functions, as those will be replaced with calls later by SelectionDAG or
958 // ReplaceWithVecLib pass.
959 if (TLibInfo && Opcode == Instruction::FRem) {
960 VectorType *VecTy = dyn_cast<VectorType>(Ty);
961 LibFunc Func;
962 if (VecTy &&
963 TLibInfo->getLibFunc(Instruction::FRem, Ty->getScalarType(), Func) &&
964 TLibInfo->isFunctionVectorizable(TLibInfo->getName(Func),
965 VecTy->getElementCount()))
966 return getCallInstrCost(nullptr, VecTy, {VecTy, VecTy}, CostKind);
967 }
968
970 TTIImpl->getArithmeticInstrCost(Opcode, Ty, CostKind,
971 Op1Info, Op2Info,
972 Args, CxtI);
973 assert(Cost >= 0 && "TTI should not produce negative costs!");
974 return Cost;
975}
976
978 VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
979 const SmallBitVector &OpcodeMask, TTI::TargetCostKind CostKind) const {
981 TTIImpl->getAltInstrCost(VecTy, Opcode0, Opcode1, OpcodeMask, CostKind);
982 assert(Cost >= 0 && "TTI should not produce negative costs!");
983 return Cost;
984}
985
987 ShuffleKind Kind, VectorType *DstTy, VectorType *SrcTy, ArrayRef<int> Mask,
988 TTI::TargetCostKind CostKind, int Index, VectorType *SubTp,
989 ArrayRef<const Value *> Args, const Instruction *CxtI) const {
990 assert((Mask.empty() || DstTy->isScalableTy() ||
991 Mask.size() == DstTy->getElementCount().getKnownMinValue()) &&
992 "Expected the Mask to match the return size if given");
993 assert(SrcTy->getScalarType() == DstTy->getScalarType() &&
994 "Expected the same scalar types");
995 InstructionCost Cost = TTIImpl->getShuffleCost(
996 Kind, DstTy, SrcTy, Mask, CostKind, Index, SubTp, Args, CxtI);
997 assert(Cost >= 0 && "TTI should not produce negative costs!");
998 return Cost;
999}
1000
1003 if (isa<SExtInst>(I))
1004 return PR_SignExtend;
1005 if (isa<ZExtInst>(I))
1006 return PR_ZeroExtend;
1007 return PR_None;
1008}
1009
1012 if (!I)
1013 return CastContextHint::None;
1014
1015 auto getLoadStoreKind = [](const Value *V, unsigned LdStOp, unsigned MaskedOp,
1016 unsigned GatScatOp) {
1017 const Instruction *I = dyn_cast<Instruction>(V);
1018 if (!I)
1019 return CastContextHint::None;
1020
1021 if (I->getOpcode() == LdStOp)
1023
1024 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) {
1025 if (II->getIntrinsicID() == MaskedOp)
1027 if (II->getIntrinsicID() == GatScatOp)
1029 }
1030
1032 };
1033
1034 switch (I->getOpcode()) {
1035 case Instruction::ZExt:
1036 case Instruction::SExt:
1037 case Instruction::FPExt:
1038 return getLoadStoreKind(I->getOperand(0), Instruction::Load,
1039 Intrinsic::masked_load, Intrinsic::masked_gather);
1040 case Instruction::Trunc:
1041 case Instruction::FPTrunc:
1042 if (I->hasOneUse())
1043 return getLoadStoreKind(*I->user_begin(), Instruction::Store,
1044 Intrinsic::masked_store,
1045 Intrinsic::masked_scatter);
1046 break;
1047 default:
1048 return CastContextHint::None;
1049 }
1050
1052}
1053
1055 unsigned Opcode, Type *Dst, Type *Src, CastContextHint CCH,
1056 TTI::TargetCostKind CostKind, const Instruction *I) const {
1057 assert((I == nullptr || I->getOpcode() == Opcode) &&
1058 "Opcode should reflect passed instruction.");
1060 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I);
1061 assert(Cost >= 0 && "TTI should not produce negative costs!");
1062 return Cost;
1063}
1064
1066 unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index,
1069 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index, CostKind);
1070 assert(Cost >= 0 && "TTI should not produce negative costs!");
1071 return Cost;
1072}
1073
1075 unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I) const {
1076 assert((I == nullptr || I->getOpcode() == Opcode) &&
1077 "Opcode should reflect passed instruction.");
1078 InstructionCost Cost = TTIImpl->getCFInstrCost(Opcode, CostKind, I);
1079 assert(Cost >= 0 && "TTI should not produce negative costs!");
1080 return Cost;
1081}
1082
1084 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred,
1086 OperandValueInfo Op2Info, const Instruction *I) const {
1087 assert((I == nullptr || I->getOpcode() == Opcode) &&
1088 "Opcode should reflect passed instruction.");
1089 InstructionCost Cost = TTIImpl->getCmpSelInstrCost(
1090 Opcode, ValTy, CondTy, VecPred, CostKind, Op1Info, Op2Info, I);
1091 assert(Cost >= 0 && "TTI should not produce negative costs!");
1092 return Cost;
1093}
1094
1096 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
1097 const Value *Op0, const Value *Op1) const {
1098 assert((Opcode == Instruction::InsertElement ||
1099 Opcode == Instruction::ExtractElement) &&
1100 "Expecting Opcode to be insertelement/extractelement.");
1102 TTIImpl->getVectorInstrCost(Opcode, Val, CostKind, Index, Op0, Op1);
1103 assert(Cost >= 0 && "TTI should not produce negative costs!");
1104 return Cost;
1105}
1106
1108 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
1109 Value *Scalar,
1110 ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx) const {
1111 assert((Opcode == Instruction::InsertElement ||
1112 Opcode == Instruction::ExtractElement) &&
1113 "Expecting Opcode to be insertelement/extractelement.");
1114 InstructionCost Cost = TTIImpl->getVectorInstrCost(
1115 Opcode, Val, CostKind, Index, Scalar, ScalarUserAndIdx);
1116 assert(Cost >= 0 && "TTI should not produce negative costs!");
1117 return Cost;
1118}
1119
1123 unsigned Index) const {
1124 // FIXME: Assert that Opcode is either InsertElement or ExtractElement.
1125 // This is mentioned in the interface description and respected by all
1126 // callers, but never asserted upon.
1127 InstructionCost Cost = TTIImpl->getVectorInstrCost(I, Val, CostKind, Index);
1128 assert(Cost >= 0 && "TTI should not produce negative costs!");
1129 return Cost;
1130}
1131
1133 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind,
1134 unsigned Index) const {
1136 TTIImpl->getIndexedVectorInstrCostFromEnd(Opcode, Val, CostKind, Index);
1137 assert(Cost >= 0 && "TTI should not produce negative costs!");
1138 return Cost;
1139}
1140
1142 unsigned Opcode, TTI::TargetCostKind CostKind) const {
1143 assert((Opcode == Instruction::InsertValue ||
1144 Opcode == Instruction::ExtractValue) &&
1145 "Expecting Opcode to be insertvalue/extractvalue.");
1146 InstructionCost Cost = TTIImpl->getInsertExtractValueCost(Opcode, CostKind);
1147 assert(Cost >= 0 && "TTI should not produce negative costs!");
1148 return Cost;
1149}
1150
1152 Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts,
1154 InstructionCost Cost = TTIImpl->getReplicationShuffleCost(
1155 EltTy, ReplicationFactor, VF, DemandedDstElts, CostKind);
1156 assert(Cost >= 0 && "TTI should not produce negative costs!");
1157 return Cost;
1158}
1159
1161 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
1163 const Instruction *I) const {
1164 assert((I == nullptr || I->getOpcode() == Opcode) &&
1165 "Opcode should reflect passed instruction.");
1166 InstructionCost Cost = TTIImpl->getMemoryOpCost(
1167 Opcode, Src, Alignment, AddressSpace, CostKind, OpInfo, I);
1168 assert(Cost >= 0 && "TTI should not produce negative costs!");
1169 return Cost;
1170}
1171
1173 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
1175 InstructionCost Cost = TTIImpl->getMaskedMemoryOpCost(Opcode, Src, Alignment,
1177 assert(Cost >= 0 && "TTI should not produce negative costs!");
1178 return Cost;
1179}
1180
1182 unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask,
1183 Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I) const {
1184 InstructionCost Cost = TTIImpl->getGatherScatterOpCost(
1185 Opcode, DataTy, Ptr, VariableMask, Alignment, CostKind, I);
1186 assert((!Cost.isValid() || Cost >= 0) &&
1187 "TTI should not produce negative costs!");
1188 return Cost;
1189}
1190
1192 unsigned Opcode, Type *DataTy, bool VariableMask, Align Alignment,
1193 TTI::TargetCostKind CostKind, const Instruction *I) const {
1194 InstructionCost Cost = TTIImpl->getExpandCompressMemoryOpCost(
1195 Opcode, DataTy, VariableMask, Alignment, CostKind, I);
1196 assert(Cost >= 0 && "TTI should not produce negative costs!");
1197 return Cost;
1198}
1199
1201 unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask,
1202 Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I) const {
1203 InstructionCost Cost = TTIImpl->getStridedMemoryOpCost(
1204 Opcode, DataTy, Ptr, VariableMask, Alignment, CostKind, I);
1205 assert(Cost >= 0 && "TTI should not produce negative costs!");
1206 return Cost;
1207}
1208
1210 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
1211 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
1212 bool UseMaskForCond, bool UseMaskForGaps) const {
1213 InstructionCost Cost = TTIImpl->getInterleavedMemoryOpCost(
1214 Opcode, VecTy, Factor, Indices, Alignment, AddressSpace, CostKind,
1215 UseMaskForCond, UseMaskForGaps);
1216 assert(Cost >= 0 && "TTI should not produce negative costs!");
1217 return Cost;
1218}
1219
1223 InstructionCost Cost = TTIImpl->getIntrinsicInstrCost(ICA, CostKind);
1224 assert(Cost >= 0 && "TTI should not produce negative costs!");
1225 return Cost;
1226}
1227
1230 ArrayRef<Type *> Tys,
1232 InstructionCost Cost = TTIImpl->getCallInstrCost(F, RetTy, Tys, CostKind);
1233 assert(Cost >= 0 && "TTI should not produce negative costs!");
1234 return Cost;
1235}
1236
1238 return TTIImpl->getNumberOfParts(Tp);
1239}
1240
1242 Type *PtrTy, ScalarEvolution *SE, const SCEV *Ptr,
1245 TTIImpl->getAddressComputationCost(PtrTy, SE, Ptr, CostKind);
1246 assert(Cost >= 0 && "TTI should not produce negative costs!");
1247 return Cost;
1248}
1249
1251 InstructionCost Cost = TTIImpl->getMemcpyCost(I);
1252 assert(Cost >= 0 && "TTI should not produce negative costs!");
1253 return Cost;
1254}
1255
1257 return TTIImpl->getMaxMemIntrinsicInlineSizeThreshold();
1258}
1259
1261 unsigned Opcode, VectorType *Ty, std::optional<FastMathFlags> FMF,
1264 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF, CostKind);
1265 assert(Cost >= 0 && "TTI should not produce negative costs!");
1266 return Cost;
1267}
1268
1273 TTIImpl->getMinMaxReductionCost(IID, Ty, FMF, CostKind);
1274 assert(Cost >= 0 && "TTI should not produce negative costs!");
1275 return Cost;
1276}
1277
1279 unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty,
1280 std::optional<FastMathFlags> FMF, TTI::TargetCostKind CostKind) const {
1281 return TTIImpl->getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,
1282 CostKind);
1283}
1284
1286 bool IsUnsigned, Type *ResTy, VectorType *Ty,
1288 return TTIImpl->getMulAccReductionCost(IsUnsigned, ResTy, Ty, CostKind);
1289}
1290
1293 return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
1294}
1295
1297 MemIntrinsicInfo &Info) const {
1298 return TTIImpl->getTgtMemIntrinsic(Inst, Info);
1299}
1300
1302 return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
1303}
1304
1306 IntrinsicInst *Inst, Type *ExpectedType, bool CanCreate) const {
1307 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType,
1308 CanCreate);
1309}
1310
1312 LLVMContext &Context, Value *Length, unsigned SrcAddrSpace,
1313 unsigned DestAddrSpace, Align SrcAlign, Align DestAlign,
1314 std::optional<uint32_t> AtomicElementSize) const {
1315 return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAddrSpace,
1316 DestAddrSpace, SrcAlign, DestAlign,
1317 AtomicElementSize);
1318}
1319
1321 SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context,
1322 unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace,
1323 Align SrcAlign, Align DestAlign,
1324 std::optional<uint32_t> AtomicCpySize) const {
1325 TTIImpl->getMemcpyLoopResidualLoweringType(
1326 OpsOut, Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign,
1327 DestAlign, AtomicCpySize);
1328}
1329
1331 const Function *Callee) const {
1332 return TTIImpl->areInlineCompatible(Caller, Callee);
1333}
1334
1335unsigned
1337 const CallBase &Call,
1338 unsigned DefaultCallPenalty) const {
1339 return TTIImpl->getInlineCallPenalty(F, Call, DefaultCallPenalty);
1340}
1341
1343 const Function *Caller, const Function *Callee,
1344 const ArrayRef<Type *> &Types) const {
1345 return TTIImpl->areTypesABICompatible(Caller, Callee, Types);
1346}
1347
1349 Type *Ty) const {
1350 return TTIImpl->isIndexedLoadLegal(Mode, Ty);
1351}
1352
1354 Type *Ty) const {
1355 return TTIImpl->isIndexedStoreLegal(Mode, Ty);
1356}
1357
1359 return TTIImpl->getLoadStoreVecRegBitWidth(AS);
1360}
1361
1363 return TTIImpl->isLegalToVectorizeLoad(LI);
1364}
1365
1367 return TTIImpl->isLegalToVectorizeStore(SI);
1368}
1369
1371 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const {
1372 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
1373 AddrSpace);
1374}
1375
1377 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const {
1378 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
1379 AddrSpace);
1380}
1381
1383 const RecurrenceDescriptor &RdxDesc, ElementCount VF) const {
1384 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF);
1385}
1386
1388 return TTIImpl->isElementTypeLegalForScalableVector(Ty);
1389}
1390
1392 unsigned LoadSize,
1393 unsigned ChainSizeInBytes,
1394 VectorType *VecTy) const {
1395 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
1396}
1397
1399 unsigned StoreSize,
1400 unsigned ChainSizeInBytes,
1401 VectorType *VecTy) const {
1402 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
1403}
1404
1406 return TTIImpl->preferFixedOverScalableIfEqualCost();
1407}
1408
1410 Type *Ty) const {
1411 return TTIImpl->preferInLoopReduction(Kind, Ty);
1412}
1413
1415 return TTIImpl->preferAlternateOpcodeVectorization();
1416}
1417
1419 return TTIImpl->preferPredicatedReductionSelect();
1420}
1421
1423 return TTIImpl->preferEpilogueVectorization();
1424}
1425
1428 return TTIImpl->getVPLegalizationStrategy(VPI);
1429}
1430
1432 return TTIImpl->hasArmWideBranch(Thumb);
1433}
1434
1436 return TTIImpl->getFeatureMask(F);
1437}
1438
1440 return TTIImpl->isMultiversionedFunction(F);
1441}
1442
1444 return TTIImpl->getMaxNumArgs();
1445}
1446
1448 return TTIImpl->shouldExpandReduction(II);
1449}
1450
1453 const IntrinsicInst *II) const {
1454 return TTIImpl->getPreferredExpandedReductionShuffle(II);
1455}
1456
1458 return TTIImpl->getGISelRematGlobalCost();
1459}
1460
1462 return TTIImpl->getMinTripCountTailFoldingThreshold();
1463}
1464
1466 return TTIImpl->supportsScalableVectors();
1467}
1468
1470 return TTIImpl->enableScalableVectorization();
1471}
1472
1474 return TTIImpl->hasActiveVectorLength();
1475}
1476
1478 Instruction *I, SmallVectorImpl<Use *> &OpsToSink) const {
1479 return TTIImpl->isProfitableToSinkOperands(I, OpsToSink);
1480}
1481
1483 return TTIImpl->isVectorShiftByScalarCheap(Ty);
1484}
1485
1486unsigned
1488 Type *ArrayType) const {
1489 return TTIImpl->getNumBytesToPadGlobalArray(Size, ArrayType);
1490}
1491
1493 const Function &F,
1494 SmallVectorImpl<std::pair<StringRef, int64_t>> &LB) const {
1495 return TTIImpl->collectKernelLaunchBounds(F, LB);
1496}
1497
1499 return TTIImpl->allowVectorElementIndexingUsingGEP();
1500}
1501
1503
1504TargetIRAnalysis::TargetIRAnalysis() : TTICallback(&getDefaultTTI) {}
1505
1507 std::function<Result(const Function &)> TTICallback)
1508 : TTICallback(std::move(TTICallback)) {}
1509
1512 assert(!F.isIntrinsic() && "Should not request TTI for intrinsics");
1513 return TTICallback(F);
1514}
1515
1516AnalysisKey TargetIRAnalysis::Key;
1517
1518TargetIRAnalysis::Result TargetIRAnalysis::getDefaultTTI(const Function &F) {
1519 return Result(F.getDataLayout());
1520}
1521
1522// Register the basic pass.
1524 "Target Transform Information", false, true)
1526
1527void TargetTransformInfoWrapperPass::anchor() {}
1528
1530 : ImmutablePass(ID) {}
1531
1533 TargetIRAnalysis TIRA)
1534 : ImmutablePass(ID), TIRA(std::move(TIRA)) {}
1535
1537 FunctionAnalysisManager DummyFAM;
1538 TTI = TIRA.run(F, DummyFAM);
1539 return *TTI;
1540}
1541
1544 return new TargetTransformInfoWrapperPass(std::move(TIRA));
1545}
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
static cl::opt< OutputCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(OutputCostKind::RecipThroughput), cl::values(clEnumValN(OutputCostKind::RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(OutputCostKind::Latency, "latency", "Instruction latency"), clEnumValN(OutputCostKind::CodeSize, "code-size", "Code size"), clEnumValN(OutputCostKind::SizeAndLatency, "size-latency", "Code size and latency"), clEnumValN(OutputCostKind::All, "all", "Print all cost kinds")))
return RetTy
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
uint64_t Size
static cl::opt< bool > ForceNestedLoop("force-nested-hardware-loop", cl::Hidden, cl::init(false), cl::desc("Force allowance of nested hardware loops"))
static cl::opt< bool > ForceHardwareLoopPHI("force-hardware-loop-phi", cl::Hidden, cl::init(false), cl::desc("Force hardware loop counter to be updated through a phi"))
This file provides various utilities for inspecting and working with the control flow graph in LLVM I...
Module.h This file contains the declarations for the Module class.
#define F(x, y, z)
Definition: MD5.cpp:55
#define I(x, y, z)
Definition: MD5.cpp:58
mir Rename Register Operands
uint64_t IntrinsicInst * II
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:56
static SymbolRef::Type getType(const Symbol *Sym)
Definition: TapiFile.cpp:39
This file provides helpers for the implementation of a TargetTransformInfo-conforming class.
static cl::opt< unsigned > PredictableBranchThreshold("predictable-branch-threshold", cl::init(99), cl::Hidden, cl::desc("Use this to override the target's predictable branch threshold (%)."))
static cl::opt< bool > EnableReduxCost("costmodel-reduxcost", cl::init(false), cl::Hidden, cl::desc("Recognize reduction patterns."))
static cl::opt< unsigned > MinPageSize("min-page-size", cl::init(0), cl::Hidden, cl::desc("Use this to override the target's minimum page size."))
static cl::opt< unsigned > CacheLineSize("cache-line-size", cl::init(0), cl::Hidden, cl::desc("Use this to override the target cache line size when " "specified by the user."))
This pass exposes codegen information to IR-level passes.
Value * RHS
Class for arbitrary precision integers.
Definition: APInt.h:78
an instruction to allocate memory on the stack
Definition: Instructions.h:64
A container for analyses that lazily runs them and caches their results.
Definition: PassManager.h:255
This class represents an incoming formal argument to a Function.
Definition: Argument.h:32
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
iterator end() const
Definition: ArrayRef.h:136
iterator begin() const
Definition: ArrayRef.h:135
Class to represent array types.
Definition: DerivedTypes.h:398
A cache of @llvm.assume calls within a function.
LLVM Basic Block Representation.
Definition: BasicBlock.h:62
LLVM_ABI LLVMContext & getContext() const
Get the context in which this basic block lives.
Definition: BasicBlock.cpp:131
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Conditional or Unconditional Branch instruction.
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
Definition: InstrTypes.h:1116
Function * getCalledFunction() const
Returns the function called, or null if this is an indirect function invocation or the function signa...
Definition: InstrTypes.h:1348
User::op_iterator arg_begin()
Return the iterator pointing to the beginning of the argument list.
Definition: InstrTypes.h:1267
User::op_iterator arg_end()
Return the iterator pointing to the end of the argument list.
Definition: InstrTypes.h:1273
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:678
This is an important base class in LLVM.
Definition: Constant.h:43
A parsed version of the target data layout string in and methods for querying it.
Definition: DataLayout.h:63
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
Definition: Dominators.h:165
LLVM_ABI bool dominates(const BasicBlock *BB, const Use &U) const
Return true if the (end of the) basic block BB dominates the use U.
Definition: Dominators.cpp:135
Convenience struct for specifying and reasoning about fast-math flags.
Definition: FMF.h:22
Class to represent function types.
Definition: DerivedTypes.h:105
param_iterator param_begin() const
Definition: DerivedTypes.h:130
param_iterator param_end() const
Definition: DerivedTypes.h:131
FunctionType * getFunctionType() const
Returns the FunctionType for me.
Definition: Function.h:209
ImmutablePass class - This class is used to provide information that does not need to be run.
Definition: Pass.h:285
The core instruction combiner logic.
Definition: InstCombiner.h:48
unsigned getBitWidth() const
Get the number of bits in this IntegerType.
Definition: DerivedTypes.h:74
LLVM_ABI IntrinsicCostAttributes(Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarCost=InstructionCost::getInvalid(), bool TypeBasedOnly=false, TargetLibraryInfo const *LibInfo=nullptr)
A wrapper class for inspecting calls to intrinsic functions.
Definition: IntrinsicInst.h:49
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:68
An instruction for reading from memory.
Definition: Instructions.h:180
bool contains(const LoopT *L) const
Return true if the specified loop is contained within in this loop.
void getExitingBlocks(SmallVectorImpl< BlockT * > &ExitingBlocks) const
Return all blocks inside the loop that have successors outside of the loop.
BlockT * getHeader() const
bool isLoopLatch(const BlockT *BB) const
Wrapper class to LoopBlocksDFS that provides a standard begin()/end() interface for the DFS reverse p...
Definition: LoopIterator.h:172
void perform(const LoopInfo *LI)
Traverse the loop blocks and store the DFS result.
Definition: LoopIterator.h:180
LoopT * getLoopFor(const BlockT *BB) const
Return the inner most loop that BB lives in.
Represents a single loop in the control flow graph.
Definition: LoopInfo.h:40
The optimization diagnostic interface.
Analysis providing profile information.
The RecurrenceDescriptor is used to identify recurrences variables in a loop.
Definition: IVDescriptors.h:90
This class represents a constant integer value.
This class represents an analyzed expression in the program.
The main scalar evolution driver.
LLVM_ABI uint64_t getTypeSizeInBits(Type *Ty) const
Return the size in bits of the specified type, for which isSCEVable must return true.
LLVM_ABI bool isLoopInvariant(const SCEV *S, const Loop *L)
Return true if the value of the given SCEV is unchanging in the specified loop.
LLVM_ABI const SCEV * getExitCount(const Loop *L, const BasicBlock *ExitingBlock, ExitCountKind Kind=Exact)
Return the number of times the backedge executes before the given exit would be taken; if not exactly...
This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:574
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1197
StackOffset holds a fixed and a scalable offset in bytes.
Definition: TypeSize.h:34
An instruction for storing to memory.
Definition: Instructions.h:296
Multiway switch.
Analysis pass providing the TargetTransformInfo.
LLVM_ABI Result run(const Function &F, FunctionAnalysisManager &)
TargetTransformInfo Result
LLVM_ABI TargetIRAnalysis()
Default construct a target IR analysis.
Provides information about what library functions are available for the current target.
bool getLibFunc(StringRef funcName, LibFunc &F) const
Searches for a particular function name.
StringRef getName(LibFunc F) const
bool isFunctionVectorizable(StringRef F, const ElementCount &VF) const
CRTP base class for use as a mix-in that aids implementing a TargetTransformInfo-compatible class.
Wrapper pass for TargetTransformInfo.
TargetTransformInfoWrapperPass()
We must provide a default constructor for the pass but it should never be used.
TargetTransformInfo & getTTI(const Function &F)
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
LLVM_ABI bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info) const
LLVM_ABI Value * getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst, Type *ExpectedType, bool CanCreate=true) const
LLVM_ABI bool isLegalToVectorizeLoad(LoadInst *LI) const
LLVM_ABI std::optional< unsigned > getVScaleForTuning() const
static LLVM_ABI CastContextHint getCastContextHint(const Instruction *I)
Calculates a CastContextHint from I.
LLVM_ABI unsigned getMaxNumArgs() const
LLVM_ABI bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const
Return false if a AS0 address cannot possibly alias a AS1 address.
LLVM_ABI bool isLegalMaskedScatter(Type *DataType, Align Alignment) const
Return true if the target supports masked scatter.
LLVM_ABI InstructionCost getStridedMemoryOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, const Instruction *I=nullptr) const
LLVM_ABI bool shouldBuildLookupTables() const
Return true if switches should be turned into lookup tables for the target.
LLVM_ABI bool isLegalToVectorizeStore(StoreInst *SI) const
LLVM_ABI InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index=-1, const Value *Op0=nullptr, const Value *Op1=nullptr) const
LLVM_ABI bool enableAggressiveInterleaving(bool LoopHasReductions) const
Don't restrict interleaved unrolling to small loops.
LLVM_ABI InstructionCost getScalarizationOverhead(VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}) const
Estimate the overhead of scalarizing an instruction.
LLVM_ABI bool isLegalMaskedLoad(Type *DataType, Align Alignment, unsigned AddressSpace) const
Return true if the target supports masked load.
LLVM_ABI bool isMultiversionedFunction(const Function &F) const
Returns true if this is an instance of a function with multiple versions.
LLVM_ABI bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const
Return true if it is faster to check if a floating-point value is NaN (or not-NaN) versus a compariso...
LLVM_ABI bool supportsEfficientVectorElementLoadStore() const
If target has efficient vector element load/store instructions, it can return true here so that inser...
LLVM_ABI bool isAlwaysUniform(const Value *V) const
LLVM_ABI unsigned getAssumedAddrSpace(const Value *V) const
LLVM_ABI bool preferAlternateOpcodeVectorization() const
LLVM_ABI bool shouldDropLSRSolutionIfLessProfitable() const
Return true if LSR should drop a found solution if it's calculated to be less profitable than the bas...
LLVM_ABI bool isLSRCostLess(const TargetTransformInfo::LSRCost &C1, const TargetTransformInfo::LSRCost &C2) const
Return true if LSR cost of C1 is lower than C2.
LLVM_ABI unsigned getPrefetchDistance() const
LLVM_ABI Type * getMemcpyLoopLoweringType(LLVMContext &Context, Value *Length, unsigned SrcAddrSpace, unsigned DestAddrSpace, Align SrcAlign, Align DestAlign, std::optional< uint32_t > AtomicElementSize=std::nullopt) const
LLVM_ABI bool isLegalMaskedExpandLoad(Type *DataType, Align Alignment) const
Return true if the target supports masked expand load.
LLVM_ABI bool prefersVectorizedAddressing() const
Return true if target doesn't mind addresses in vectors.
LLVM_ABI InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, OperandValueInfo Op1Info={OK_AnyValue, OP_None}, OperandValueInfo Op2Info={OK_AnyValue, OP_None}, const Instruction *I=nullptr) const
LLVM_ABI bool hasBranchDivergence(const Function *F=nullptr) const
Return true if branch divergence exists.
LLVM_ABI MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const
LLVM_ABI void getUnrollingPreferences(Loop *L, ScalarEvolution &, UnrollingPreferences &UP, OptimizationRemarkEmitter *ORE) const
Get target-customized preferences for the generic loop unrolling transformation.
LLVM_ABI bool shouldBuildLookupTablesForConstant(Constant *C) const
Return true if switches should be turned into lookup tables containing this constant value for the ta...
LLVM_ABI bool supportsTailCallFor(const CallBase *CB) const
If target supports tail call on CB.
LLVM_ABI std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const
Targets can implement their own combinations for target-specific intrinsics.
LLVM_ABI bool isProfitableLSRChainElement(Instruction *I) const
LLVM_ABI TypeSize getRegisterBitWidth(RegisterKind K) const
LLVM_ABI unsigned getInlineCallPenalty(const Function *F, const CallBase &Call, unsigned DefaultCallPenalty) const
Returns a penalty for invoking call Call in F.
LLVM_ABI bool hasActiveVectorLength() const
LLVM_ABI bool isExpensiveToSpeculativelyExecute(const Instruction *I) const
Return true if the cost of the instruction is too high to speculatively execute and should be kept be...
LLVM_ABI bool isLegalMaskedGather(Type *DataType, Align Alignment) const
Return true if the target supports masked gather.
LLVM_ABI InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, OperandValueInfo OpdInfo={OK_AnyValue, OP_None}, const Instruction *I=nullptr) const
LLVM_ABI std::optional< unsigned > getMaxVScale() const
LLVM_ABI InstructionCost getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, TTI::TargetCostKind CostKind) const
LLVM_ABI bool allowVectorElementIndexingUsingGEP() const
Returns true if GEP should not be used to index into vectors for this target.
LLVM_ABI InstructionCost getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, bool UseMaskForCond=false, bool UseMaskForGaps=false) const
LLVM_ABI bool isSingleThreaded() const
LLVM_ABI std::optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const
Can be used to implement target-specific instruction combining.
LLVM_ABI bool enableOrderedReductions() const
Return true if we should be enabling ordered reductions for the target.
LLVM_ABI unsigned getInliningCostBenefitAnalysisProfitableMultiplier() const
LLVM_ABI InstructionCost getShuffleCost(ShuffleKind Kind, VectorType *DstTy, VectorType *SrcTy, ArrayRef< int > Mask={}, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, int Index=0, VectorType *SubTp=nullptr, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const
LLVM_ABI InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const
LLVM_ABI InstructionCost getArithmeticReductionCost(unsigned Opcode, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
Calculate the cost of vector reduction intrinsics.
LLVM_ABI unsigned getAtomicMemIntrinsicMaxElementSize() const
LLVM_ABI InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency, const Instruction *I=nullptr) const
LLVM_ABI bool LSRWithInstrQueries() const
Return true if the loop strength reduce pass should make Instruction* based TTI queries to isLegalAdd...
LLVM_ABI unsigned getStoreVectorFactor(unsigned VF, unsigned StoreSize, unsigned ChainSizeInBytes, VectorType *VecTy) const
LLVM_ABI VPLegalization getVPLegalizationStrategy(const VPIntrinsic &PI) const
static LLVM_ABI PartialReductionExtendKind getPartialReductionExtendKind(Instruction *I)
Get the kind of extension that an instruction represents.
LLVM_ABI bool enableWritePrefetching() const
LLVM_ABI bool shouldTreatInstructionLikeSelect(const Instruction *I) const
Should the Select Optimization pass treat the given instruction like a select, potentially converting...
LLVM_ABI bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const
LLVM_ABI bool shouldMaximizeVectorBandwidth(TargetTransformInfo::RegisterKind K) const
LLVM_ABI TailFoldingStyle getPreferredTailFoldingStyle(bool IVUpdateMayOverflow=true) const
Query the target what the preferred style of tail folding is.
LLVM_ABI InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, Type *AccessType=nullptr, TargetCostKind CostKind=TCK_SizeAndLatency) const
Estimate the cost of a GEP operation when lowered.
LLVM_ABI bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const
LLVM_ABI bool isLegalInterleavedAccessType(VectorType *VTy, unsigned Factor, Align Alignment, unsigned AddrSpace) const
Return true is the target supports interleaved access for the given vector type VTy,...
LLVM_ABI unsigned getRegUsageForType(Type *Ty) const
Returns the estimated number of registers required to represent Ty.
LLVM_ABI bool isLegalBroadcastLoad(Type *ElementTy, ElementCount NumElements) const
\Returns true if the target supports broadcasting a load to a vector of type <NumElements x ElementTy...
LLVM_ABI bool isIndexedStoreLegal(enum MemIndexedMode Mode, Type *Ty) const
LLVM_ABI std::pair< const Value *, unsigned > getPredicatedAddrSpace(const Value *V) const
LLVM_ABI InstructionCost getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
Calculate the cost of an extended reduction pattern, similar to getArithmeticReductionCost of a reduc...
LLVM_ABI unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const
LLVM_ABI ReductionShuffle getPreferredExpandedReductionShuffle(const IntrinsicInst *II) const
static LLVM_ABI OperandValueInfo getOperandInfo(const Value *V)
Collect properties of V used in cost analysis, e.g. OP_PowerOf2.
LLVM_ABI InstructionCost getMulAccReductionCost(bool IsUnsigned, Type *ResTy, VectorType *Ty, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
Calculate the cost of an extended reduction pattern, similar to getArithmeticReductionCost of an Add ...
LLVM_ABI unsigned getRegisterClassForType(bool Vector, Type *Ty=nullptr) const
LLVM_ABI bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace=0, Instruction *I=nullptr, int64_t ScalableOffset=0) const
Return true if the addressing mode represented by AM is legal for this target, for a load/store of th...
LLVM_ABI PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) const
Return hardware support for population count.
LLVM_ABI unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const
LLVM_ABI bool isElementTypeLegalForScalableVector(Type *Ty) const
LLVM_ABI bool forceScalarizeMaskedGather(VectorType *Type, Align Alignment) const
Return true if the target forces scalarizing of llvm.masked.gather intrinsics.
LLVM_ABI unsigned getMaxPrefetchIterationsAhead() const
LLVM_ABI bool canHaveNonUndefGlobalInitializerInAddressSpace(unsigned AS) const
Return true if globals in this address space can have initializers other than undef.
LLVM_ABI ElementCount getMinimumVF(unsigned ElemWidth, bool IsScalable) const
LLVM_ABI InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm, Type *Ty, TargetCostKind CostKind) const
LLVM_ABI bool enableMaskedInterleavedAccessVectorization() const
Enable matching of interleaved access groups that contain predicated accesses or gaps and therefore v...
LLVM_ABI InstructionCost getIntImmCostInst(unsigned Opc, unsigned Idx, const APInt &Imm, Type *Ty, TargetCostKind CostKind, Instruction *Inst=nullptr) const
Return the expected cost of materialization for the given integer immediate of the specified type for...
LLVM_ABI bool isLegalStridedLoadStore(Type *DataType, Align Alignment) const
Return true if the target supports strided load.
LLVM_ABI TargetTransformInfo & operator=(TargetTransformInfo &&RHS)
LLVM_ABI InstructionCost getMinMaxReductionCost(Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF=FastMathFlags(), TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
TargetCostKind
The kind of cost model.
@ TCK_RecipThroughput
Reciprocal throughput.
LLVM_ABI InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, TTI::OperandValueInfo Opd1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Opd2Info={TTI::OK_AnyValue, TTI::OP_None}, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr, const TargetLibraryInfo *TLibInfo=nullptr) const
This is an approximation of reciprocal throughput of a math/logic op.
LLVM_ABI bool areTypesABICompatible(const Function *Caller, const Function *Callee, const ArrayRef< Type * > &Types) const
LLVM_ABI bool enableSelectOptimize() const
Should the Select Optimization pass be enabled and ran.
LLVM_ABI bool collectFlatAddressOperands(SmallVectorImpl< int > &OpIndexes, Intrinsic::ID IID) const
Return any intrinsic address operand indexes which may be rewritten if they use a flat address space ...
OperandValueProperties
Additional properties of an operand's values.
LLVM_ABI int getInliningLastCallToStaticBonus() const
LLVM_ABI InstructionCost getPointersChainCost(ArrayRef< const Value * > Ptrs, const Value *Base, const PointersChainInfo &Info, Type *AccessTy, TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
Estimate the cost of a chain of pointers (typically pointer operands of a chain of loads or stores wi...
LLVM_ABI bool isVScaleKnownToBeAPowerOfTwo() const
LLVM_ABI bool isIndexedLoadLegal(enum MemIndexedMode Mode, Type *Ty) const
LLVM_ABI unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const
LLVM_ABI bool isSourceOfDivergence(const Value *V) const
Returns whether V is a source of divergence.
LLVM_ABI bool isLegalICmpImmediate(int64_t Imm) const
Return true if the specified immediate is legal icmp immediate, that is the target has icmp instructi...
LLVM_ABI bool isTypeLegal(Type *Ty) const
Return true if this type is legal.
LLVM_ABI bool isLegalToVectorizeReduction(const RecurrenceDescriptor &RdxDesc, ElementCount VF) const
LLVM_ABI std::optional< unsigned > getCacheAssociativity(CacheLevel Level) const
LLVM_ABI bool isLegalNTLoad(Type *DataType, Align Alignment) const
Return true if the target supports nontemporal load.
LLVM_ABI InstructionCost getMemcpyCost(const Instruction *I) const
LLVM_ABI unsigned adjustInliningThreshold(const CallBase *CB) const
LLVM_ABI bool isLegalAddImmediate(int64_t Imm) const
Return true if the specified immediate is legal add immediate, that is the target has add instruction...
LLVM_ABI bool isTargetIntrinsicWithStructReturnOverloadAtField(Intrinsic::ID ID, int RetIdx) const
Identifies if the vector form of the intrinsic that returns a struct is overloaded at the struct elem...
LLVM_ABI unsigned getLoadVectorFactor(unsigned VF, unsigned LoadSize, unsigned ChainSizeInBytes, VectorType *VecTy) const
LLVM_ABI InstructionCost getMaskedMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
LLVM_ABI bool canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI, DominatorTree *DT, AssumptionCache *AC, TargetLibraryInfo *LibInfo) const
Return true if the target can save a compare for loop count, for example hardware loop saves a compar...
LLVM_ABI bool isTargetIntrinsicTriviallyScalarizable(Intrinsic::ID ID) const
LLVM_ABI Value * rewriteIntrinsicWithAddressSpace(IntrinsicInst *II, Value *OldV, Value *NewV) const
Rewrite intrinsic call II such that OldV will be replaced with NewV, which has a different address sp...
LLVM_ABI InstructionCost getCostOfKeepingLiveOverCall(ArrayRef< Type * > Tys) const
LLVM_ABI unsigned getMinPrefetchStride(unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const
Some HW prefetchers can handle accesses up to a certain constant stride.
LLVM_ABI bool shouldPrefetchAddressSpace(unsigned AS) const
LLVM_ABI InstructionCost getIntImmCost(const APInt &Imm, Type *Ty, TargetCostKind CostKind) const
Return the expected cost of materializing for the given integer immediate of the specified type.
LLVM_ABI unsigned getMinVectorRegisterBitWidth() const
LLVM_ABI InstructionCost getAddressComputationCost(Type *PtrTy, ScalarEvolution *SE, const SCEV *Ptr, TTI::TargetCostKind CostKind) const
LLVM_ABI bool isLegalNTStore(Type *DataType, Align Alignment) const
Return true if the target supports nontemporal store.
LLVM_ABI InstructionCost getPartialReductionCost(unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType, ElementCount VF, PartialReductionExtendKind OpAExtend, PartialReductionExtendKind OpBExtend, std::optional< unsigned > BinOp, TTI::TargetCostKind CostKind) const
LLVM_ABI unsigned getFlatAddressSpace() const
Returns the address space ID for a target's 'flat' address space.
LLVM_ABI bool preferToKeepConstantsAttached(const Instruction &Inst, const Function &Fn) const
It can be advantageous to detach complex constants from their uses to make their generation cheaper.
LLVM_ABI bool hasArmWideBranch(bool Thumb) const
LLVM_ABI const char * getRegisterClassName(unsigned ClassID) const
LLVM_ABI bool preferEpilogueVectorization() const
Return true if the loop vectorizer should consider vectorizing an otherwise scalar epilogue loop.
LLVM_ABI bool shouldConsiderAddressTypePromotion(const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const
LLVM_ABI BranchProbability getPredictableBranchThreshold() const
If a branch or a select condition is skewed in one direction by more than this factor,...
LLVM_ABI TargetTransformInfo(std::unique_ptr< const TargetTransformInfoImplBase > Impl)
Construct a TTI object using a type implementing the Concept API below.
LLVM_ABI bool preferInLoopReduction(RecurKind Kind, Type *Ty) const
LLVM_ABI unsigned getCallerAllocaCost(const CallBase *CB, const AllocaInst *AI) const
LLVM_ABI bool hasConditionalLoadStoreForType(Type *Ty, bool IsStore) const
LLVM_ABI unsigned getCacheLineSize() const
LLVM_ABI bool allowsMisalignedMemoryAccesses(LLVMContext &Context, unsigned BitWidth, unsigned AddressSpace=0, Align Alignment=Align(1), unsigned *Fast=nullptr) const
Determine if the target supports unaligned memory accesses.
LLVM_ABI InstructionCost getGatherScatterOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, const Instruction *I=nullptr) const
LLVM_ABI int getInlinerVectorBonusPercent() const
LLVM_ABI unsigned getEpilogueVectorizationMinVF() const
LLVM_ABI void collectKernelLaunchBounds(const Function &F, SmallVectorImpl< std::pair< StringRef, int64_t > > &LB) const
Collect kernel launch bounds for F into LB.
PopcntSupportKind
Flags indicating the kind of support for population count.
LLVM_ABI bool preferPredicatedReductionSelect() const
LLVM_ABI InstructionCost getIntImmCodeSizeCost(unsigned Opc, unsigned Idx, const APInt &Imm, Type *Ty) const
Return the expected cost for the given integer when optimising for size.
LLVM_ABI AddressingModeKind getPreferredAddressingMode(const Loop *L, ScalarEvolution *SE) const
Return the preferred addressing mode LSR should make efforts to generate.
LLVM_ABI bool isLoweredToCall(const Function *F) const
Test whether calls to a function lower to actual program function calls.
LLVM_ABI bool isLegalMaskedStore(Type *DataType, Align Alignment, unsigned AddressSpace) const
Return true if the target supports masked store.
LLVM_ABI bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const
LLVM_ABI bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const
Query the target whether it would be profitable to convert the given loop into a hardware loop.
LLVM_ABI unsigned getInliningThresholdMultiplier() const
LLVM_ABI InstructionCost getBranchMispredictPenalty() const
Returns estimated penalty of a branch misprediction in latency.
LLVM_ABI unsigned getNumberOfRegisters(unsigned ClassID) const
LLVM_ABI bool isLegalAltInstr(VectorType *VecTy, unsigned Opcode0, unsigned Opcode1, const SmallBitVector &OpcodeMask) const
Return true if this is an alternating opcode pattern that can be lowered to a single instruction on t...
LLVM_ABI bool isProfitableToHoist(Instruction *I) const
Return true if it is profitable to hoist instruction in the then/else to before if.
LLVM_ABI bool supportsScalableVectors() const
LLVM_ABI bool hasVolatileVariant(Instruction *I, unsigned AddrSpace) const
Return true if the given instruction (assumed to be a memory access instruction) has a volatile varia...
LLVM_ABI bool isLegalMaskedCompressStore(Type *DataType, Align Alignment) const
Return true if the target supports masked compress store.
LLVM_ABI std::optional< unsigned > getMinPageSize() const
LLVM_ABI bool isFPVectorizationPotentiallyUnsafe() const
Indicate that it is potentially unsafe to automatically vectorize floating-point operations because t...
LLVM_ABI InstructionCost getInsertExtractValueCost(unsigned Opcode, TTI::TargetCostKind CostKind) const
LLVM_ABI bool shouldBuildRelLookupTables() const
Return true if lookup tables should be turned into relative lookup tables.
LLVM_ABI unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy, Type *ScalarValTy) const
LLVM_ABI std::optional< unsigned > getCacheSize(CacheLevel Level) const
LLVM_ABI std::optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const
Can be used to implement target-specific instruction combining.
LLVM_ABI bool isLegalAddScalableImmediate(int64_t Imm) const
Return true if adding the specified scalable immediate is legal, that is the target has add instructi...
LLVM_ABI bool isTargetIntrinsicWithScalarOpAtArg(Intrinsic::ID ID, unsigned ScalarOpdIdx) const
Identifies if the vector form of the intrinsic has a scalar operand.
LLVM_ABI bool hasDivRemOp(Type *DataType, bool IsSigned) const
Return true if the target has a unified operation to calculate division and remainder.
LLVM_ABI InstructionCost getAltInstrCost(VectorType *VecTy, unsigned Opcode0, unsigned Opcode1, const SmallBitVector &OpcodeMask, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
Returns the cost estimation for alternating opcode pattern that can be lowered to a single instructio...
LLVM_ABI bool enableInterleavedAccessVectorization() const
Enable matching of interleaved access groups.
LLVM_ABI unsigned getMinTripCountTailFoldingThreshold() const
LLVM_ABI InstructionCost getInstructionCost(const User *U, ArrayRef< const Value * > Operands, TargetCostKind CostKind) const
Estimate the cost of a given IR user when lowered.
LLVM_ABI unsigned getMaxInterleaveFactor(ElementCount VF) const
LLVM_ABI bool enableScalableVectorization() const
LLVM_ABI bool isVectorShiftByScalarCheap(Type *Ty) const
Return true if it's significantly cheaper to shift a vector by a uniform scalar than by an amount whi...
LLVM_ABI bool isNumRegsMajorCostOfLSR() const
Return true if LSR major cost is number of registers.
LLVM_ABI unsigned getInliningCostBenefitAnalysisSavingsMultiplier() const
LLVM_ABI bool isLegalMaskedVectorHistogram(Type *AddrType, Type *DataType) const
LLVM_ABI InstructionCost getExpandCompressMemoryOpCost(unsigned Opcode, Type *DataTy, bool VariableMask, Align Alignment, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, const Instruction *I=nullptr) const
LLVM_ABI unsigned getGISelRematGlobalCost() const
LLVM_ABI unsigned getNumBytesToPadGlobalArray(unsigned Size, Type *ArrayType) const
MemIndexedMode
The type of load/store indexing.
LLVM_ABI InstructionCost getIndexedVectorInstrCostFromEnd(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index) const
LLVM_ABI bool areInlineCompatible(const Function *Caller, const Function *Callee) const
LLVM_ABI bool useColdCCForColdCall(Function &F) const
Return true if the input function which is cold at all call sites, should use coldcc calling conventi...
LLVM_ABI InstructionCost getFPOpCost(Type *Ty) const
Return the expected cost of supporting the floating point operation of the specified type.
LLVM_ABI bool supportsTailCalls() const
If the target supports tail calls.
LLVM_ABI bool canMacroFuseCmp() const
Return true if the target can fuse a compare and branch.
LLVM_ABI bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const
Query the target whether the specified address space cast from FromAS to ToAS is valid.
LLVM_ABI unsigned getNumberOfParts(Type *Tp) const
LLVM_ABI InstructionCost getOperandsScalarizationOverhead(ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const
Estimate the overhead of scalarizing operands with the given types.
LLVM_ABI InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, StackOffset BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace=0) const
Return the cost of the scaling factor used in the addressing mode represented by AM for this target,...
LLVM_ABI bool isTruncateFree(Type *Ty1, Type *Ty2) const
Return true if it's free to truncate a value of type Ty1 to type Ty2.
LLVM_ABI bool isProfitableToSinkOperands(Instruction *I, SmallVectorImpl< Use * > &Ops) const
Return true if sinking I's operands to the same basic block as I is profitable, e....
LLVM_ABI void getMemcpyLoopResidualLoweringType(SmallVectorImpl< Type * > &OpsOut, LLVMContext &Context, unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace, Align SrcAlign, Align DestAlign, std::optional< uint32_t > AtomicCpySize=std::nullopt) const
LLVM_ABI bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) const
Query the target whether it would be prefered to create a predicated vector loop, which can avoid the...
LLVM_ABI bool forceScalarizeMaskedScatter(VectorType *Type, Align Alignment) const
Return true if the target forces scalarizing of llvm.masked.scatter intrinsics.
LLVM_ABI bool isTargetIntrinsicWithOverloadTypeAtArg(Intrinsic::ID ID, int OpdIdx) const
Identifies if the vector form of the intrinsic is overloaded on the type of the operand at index OpdI...
LLVM_ABI bool haveFastSqrt(Type *Ty) const
Return true if the hardware has a fast square-root instruction.
LLVM_ABI bool shouldExpandReduction(const IntrinsicInst *II) const
LLVM_ABI uint64_t getMaxMemIntrinsicInlineSizeThreshold() const
Returns the maximum memset / memcpy size in bytes that still makes it profitable to inline the call.
ShuffleKind
The various kinds of shuffle patterns for vector queries.
LLVM_ABI APInt getFeatureMask(const Function &F) const
Returns a bitmask constructed from the target-features or fmv-features metadata of a function.
LLVM_ABI void getPeelingPreferences(Loop *L, ScalarEvolution &SE, PeelingPreferences &PP) const
Get target-customized preferences for the generic loop peeling transformation.
LLVM_ABI InstructionCost getCallInstrCost(Function *F, Type *RetTy, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency) const
LLVM_ABI InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency, const Instruction *I=nullptr) const
CastContextHint
Represents a hint about the context in which a cast is used.
@ Masked
The cast is used with a masked load/store.
@ None
The cast is not used with a load/store of any kind.
@ Normal
The cast is used with a normal load/store.
@ GatherScatter
The cast is used with a gather/scatter.
LLVM_ABI InstructionCost getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index, TTI::TargetCostKind CostKind) const
OperandValueKind
Additional information about an operand's possible values.
CacheLevel
The possible cache levels.
LLVM_ABI bool preferFixedOverScalableIfEqualCost() const
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
static LLVM_ABI IntegerType * getInt32Ty(LLVMContext &C)
LLVM_ABI bool isScalableTy(SmallPtrSetImpl< const Type * > &Visited) const
Return true if this is a type whose size is a known multiple of vscale.
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
Definition: Type.h:352
This is the common base class for vector predication intrinsics.
LLVM Value Representation.
Definition: Value.h:75
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:256
Base class of all SIMD vector types.
Definition: DerivedTypes.h:430
ElementCount getElementCount() const
Return an ElementCount instance to represent the (possibly scalable) number of elements in the vector...
Definition: DerivedTypes.h:695
constexpr ScalarTy getKnownMinValue() const
Returns the minimum value this quantity can represent.
Definition: TypeSize.h:169
@ Fast
Attempts to make calls as fast as possible (e.g.
Definition: CallingConv.h:41
@ C
The default llvm calling convention, compatible with C.
Definition: CallingConv.h:34
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:444
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ Length
Definition: DWP.cpp:477
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Definition: Casting.h:649
LLVM_ABI Value * getSplatValue(const Value *V)
Get splat value if the input is a splat vector or return nullptr.
LLVM_ABI ImmutablePass * createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA)
Create an analysis pass wrapper around a TTI object.
RecurKind
These are the kinds of recurrences that we support.
Definition: IVDescriptors.h:34
constexpr unsigned BitWidth
Definition: BitmaskEnum.h:223
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1886
auto predecessors(const MachineBasicBlock *BB)
InstructionCost Cost
Implement std::hash so that hash_code can be used in STL containers.
Definition: BitVector.h:856
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
A special type used by analysis passes to provide an address that identifies that particular analysis...
Definition: Analysis.h:29
Attributes of a target dependent hardware loop.
LLVM_ABI bool canAnalyze(LoopInfo &LI)
LLVM_ABI bool isHardwareLoopCandidate(ScalarEvolution &SE, LoopInfo &LI, DominatorTree &DT, bool ForceNestedLoop=false, bool ForceHardwareLoopPHI=false)
Information about a load/store intrinsic defined by the target.
Returns options for expansion of memcmp. IsZeroCmp is.
Describe known properties for a set of pointers.
Parameters that control the generic loop unrolling transformation.