This file implements the WebAssemblyTargetLowering class. More...

#include "WebAssemblyISelLowering.h"
#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
#include "Utils/WebAssemblyTypeUtilities.h"
#include "WebAssemblyMachineFunctionInfo.h"
#include "WebAssemblySubtarget.h"
#include "WebAssemblyTargetMachine.h"
#include "WebAssemblyUtilities.h"
#include "llvm/CodeGen/CallingConvLower.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SDPatternMatch.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/IR/DiagnosticInfo.h"
#include "llvm/IR/DiagnosticPrinter.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/IntrinsicInst.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/IR/IntrinsicsWebAssembly.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/KnownBits.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Target/TargetOptions.h"
#include "WebAssemblyISD.def"

Macros
#define	DEBUG_TYPE "wasm-lower"
#define	HANDLE_NODETYPE(NODE)

Functions
static MachineBasicBlock *	LowerFPToInt (MachineInstr &MI, DebugLoc DL, MachineBasicBlock *BB, const TargetInstrInfo &TII, bool IsUnsigned, bool Int64, bool Float64, unsigned LoweredOpcode)
static MachineBasicBlock *	LowerMemcpy (MachineInstr &MI, DebugLoc DL, MachineBasicBlock *BB, const TargetInstrInfo &TII, bool Int64)
static MachineBasicBlock *	LowerMemset (MachineInstr &MI, DebugLoc DL, MachineBasicBlock *BB, const TargetInstrInfo &TII, bool Int64)
static MachineBasicBlock *	LowerCallResults (MachineInstr &CallResults, DebugLoc DL, MachineBasicBlock BB, const WebAssemblySubtarget Subtarget, const TargetInstrInfo &TII)
static void	fail (const SDLoc &DL, SelectionDAG &DAG, const char *Msg)
static bool	callingConvSupported (CallingConv::ID CallConv)
static bool	IsWebAssemblyGlobal (SDValue Op)
static std::optional< unsigned >	IsWebAssemblyLocal (SDValue Op, SelectionDAG &DAG)
SDValue	performLowerPartialReduction (SDNode *N, SelectionDAG &DAG)
static SDValue	GetExtendHigh (SDValue Op, unsigned UserOpc, EVT VT, SelectionDAG &DAG)
static SDValue	LowerConvertLow (SDValue Op, SelectionDAG &DAG)
static SDValue	unrollVectorShift (SDValue Op, SelectionDAG &DAG)
static SDValue	performVECTOR_SHUFFLECombine (SDNode *N, TargetLowering::DAGCombinerInfo &DCI)
static SDValue	performVectorExtendToFPCombine (SDNode *N, TargetLowering::DAGCombinerInfo &DCI)
	Convert ({u,s}itofp vec) --> ({u,s}itofp ({s,z}ext vec)) so it doesn't get split up into scalar instructions during legalization, and the vector extending instructions are selected in performVectorExtendCombine below.
static SDValue	performVectorNonNegToFPCombine (SDNode *N, TargetLowering::DAGCombinerInfo &DCI)
static SDValue	performVectorExtendCombine (SDNode *N, TargetLowering::DAGCombinerInfo &DCI)
static SDValue	performVectorTruncZeroCombine (SDNode *N, TargetLowering::DAGCombinerInfo &DCI)
static SDValue	extractSubVector (SDValue Vec, unsigned IdxVal, SelectionDAG &DAG, const SDLoc &DL, unsigned VectorWidth)
static SDValue	truncateVectorWithNARROW (EVT DstVT, SDValue In, const SDLoc &DL, SelectionDAG &DAG)
static SDValue	performTruncateCombine (SDNode *N, TargetLowering::DAGCombinerInfo &DCI)
static SDValue	performBitcastCombine (SDNode *N, TargetLowering::DAGCombinerInfo &DCI)
static SDValue	performAnyAllCombine (SDNode *N, SelectionDAG &DAG)
template<int MatchRHS, ISD::CondCode MatchCond, bool RequiresNegate, Intrinsic::ID Intrin>
static SDValue	TryMatchTrue (SDNode *N, EVT VecVT, SelectionDAG &DAG)
static SDValue	combineVectorSizedSetCCEquality (SDNode N, TargetLowering::DAGCombinerInfo &DCI, const WebAssemblySubtarget Subtarget)
	Try to convert a i128 comparison to a v16i8 comparison before type legalization splits it up into chunks.
static SDValue	performSETCCCombine (SDNode N, TargetLowering::DAGCombinerInfo &DCI, const WebAssemblySubtarget Subtarget)
static SDValue	TryWideExtMulCombine (SDNode *N, SelectionDAG &DAG)
static SDValue	performMulCombine (SDNode *N, TargetLowering::DAGCombinerInfo &DCI)

Detailed Description

This file implements the WebAssemblyTargetLowering class.

Definition in file WebAssemblyISelLowering.cpp.

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE "wasm-lower"

Definition at line 42 of file WebAssemblyISelLowering.cpp.

◆ HANDLE_NODETYPE

#define HANDLE_NODETYPE ( NODE )

Value:

case WebAssemblyISD::NODE: \

return "WebAssemblyISD::" #NODE;

NODE

#define NODE(NodeKind)

Definition ItaniumDemangle.h:169

Function Documentation

◆ callingConvSupported()

bool callingConvSupported ( CallingConv::ID CallConv )

static

Definition at line 1192 of file WebAssemblyISelLowering.cpp.

References llvm::CallingConv::C, llvm::CallingConv::Cold, llvm::CallingConv::CXX_FAST_TLS, llvm::CallingConv::Fast, llvm::CallingConv::PreserveAll, llvm::CallingConv::PreserveMost, llvm::CallingConv::Swift, and llvm::CallingConv::WASM_EmscriptenInvoke.

◆ combineVectorSizedSetCCEquality()

SDValue combineVectorSizedSetCCEquality	(	SDNode *	N,
		TargetLowering::DAGCombinerInfo &	DCI,
		const WebAssemblySubtarget *	Subtarget )

static

Try to convert a i128 comparison to a v16i8 comparison before type legalization splits it up into chunks.

Definition at line 3412 of file WebAssemblyISelLowering.cpp.

References llvm::cast(), llvm::TargetLowering::DAGCombinerInfo::DAG, DL, llvm::SelectionDAG::getBitcast(), llvm::SelectionDAG::getConstant(), llvm::MachineFunction::getFunction(), llvm::SelectionDAG::getMachineFunction(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getSetCC(), llvm::Function::hasFnAttribute(), llvm::WebAssemblySubtarget::hasSIMD128(), llvm::ISD::INTRINSIC_WO_CHAIN, llvm::isa(), llvm::EVT::isByteSized(), llvm::EVT::isScalarInteger(), N, llvm::peekThroughBitcasts(), SDValue(), llvm::ISD::SETEQ, llvm::ISD::SETNE, X, and Y.

◆ extractSubVector()

SDValue extractSubVector	(	SDValue	Vec,
		unsigned	IdxVal,
		SelectionDAG &	DAG,
		const SDLoc &	DL,
		unsigned	VectorWidth )

static

Definition at line 3153 of file WebAssemblyISelLowering.cpp.

References assert(), llvm::ISD::BUILD_VECTOR, DL, llvm::ISD::EXTRACT_SUBVECTOR, llvm::SelectionDAG::getBuildVector(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getIntPtrConstant(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::EVT::getSizeInBits(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), llvm::EVT::getVectorVT(), llvm::isPowerOf2_32(), and llvm::SDNode::ops().

Referenced by combineBROADCAST_LOAD(), combineConcatVectorOps(), combineConstantPoolLoads(), combineEXTRACT_SUBVECTOR(), combineLoad(), combineOr(), combineSCALAR_TO_VECTOR(), combineSelect(), combineTargetShuffle(), combineX86ShuffleChain(), combineX86ShuffleChainWithExtract(), createVariablePermute(), extract128BitVector(), extract256BitVector(), getAVX512Node(), getAVX512TruncNode(), getEXTEND_VECTOR_INREG(), getHopForBuildVector(), lowerBuildVectorAsBroadcast(), LowerEXTEND_VECTOR_INREG(), lowerShuffleAsBroadcast(), lowerShuffleWithPERMV(), performBitcastCombine(), performMulCombine(), llvm::X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(), SplitOpsAndApply(), splitVector(), truncateVectorWithNARROW(), and truncateVectorWithPACK().

◆ fail()

void fail	(	const SDLoc &	DL,
		SelectionDAG &	DAG,
		const char *	Msg )

static

Definition at line 1185 of file WebAssemblyISelLowering.cpp.

References llvm::LLVMContext::diagnose(), DL, llvm::SelectionDAG::getContext(), llvm::MachineFunction::getFunction(), and llvm::SelectionDAG::getMachineFunction().

◆ GetExtendHigh()

SDValue GetExtendHigh	(	SDValue	Op,
		unsigned	UserOpc,
		EVT	VT,
		SelectionDAG &	DAG )

static

Definition at line 2330 of file WebAssemblyISelLowering.cpp.

References assert(), llvm::cast(), DL, llvm::SelectionDAG::getNode(), Opc, SDValue(), and llvm::ISD::VECTOR_SHUFFLE.

Referenced by TryWideExtMulCombine().

◆ IsWebAssemblyGlobal()

bool IsWebAssemblyGlobal ( SDValue Op )

static

Definition at line 1712 of file WebAssemblyISelLowering.cpp.

References llvm::dyn_cast(), llvm::GlobalAddressSDNode::getAddressSpace(), and llvm::WebAssembly::isWasmVarAddressSpace().

◆ IsWebAssemblyLocal()

std::optional< unsigned > IsWebAssemblyLocal	(	SDValue	Op,
		SelectionDAG &	DAG )

static

Definition at line 1719 of file WebAssemblyISelLowering.cpp.

References llvm::dyn_cast(), llvm::FrameIndexSDNode::getIndex(), llvm::WebAssemblyFrameLowering::getLocalForStackObject(), and llvm::SelectionDAG::getMachineFunction().

◆ LowerCallResults()

MachineBasicBlock * LowerCallResults	(	MachineInstr &	CallResults,
		DebugLoc	DL,
		MachineBasicBlock *	BB,
		const WebAssemblySubtarget *	Subtarget,
		const TargetInstrInfo &	TII )

static

Definition at line 745 of file WebAssemblyISelLowering.cpp.

References llvm::MachineInstrBuilder::add(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstr::addOperand(), llvm::MachineInstrBuilder::addReg(), llvm::MachineInstrBuilder::addSym(), assert(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineInstr::defs(), DL, llvm::MachineInstr::eraseFromParent(), llvm::MachineFunction::getContext(), llvm::MachineInstrBuilder::getInstr(), llvm::ilist_node_impl< OptionsT >::getIterator(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::WebAssembly::getOrCreateFuncrefCallTableSymbol(), llvm::WebAssembly::getOrCreateFunctionTableSymbol(), llvm::MachineBasicBlock::getParent(), llvm::ilist_node_with_parent< NodeTy, ParentTy, Options >::getPrevNode(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::WebAssemblySubtarget::hasCallIndirectOverlong(), llvm::WebAssemblySubtarget::hasReferenceTypes(), llvm::MachineBasicBlock::insert(), llvm::MachineBasicBlock::insertAfter(), llvm::MachineOperand::isFI(), llvm::MachineOperand::isReg(), MRI, Reg, llvm::MachineInstr::removeOperand(), llvm::MCSymbolWasm::setNoStrip(), TII, and llvm::MachineInstr::uses().

◆ LowerConvertLow()

SDValue LowerConvertLow	(	SDValue	Op,
		SelectionDAG &	DAG )

static

Definition at line 2404 of file WebAssemblyISelLowering.cpp.

References DL, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::SelectionDAG::getNode(), llvm::SDValue::getValueType(), llvm::SelectionDAG::getVectorShuffle(), llvm::isa(), SDValue(), llvm::ISD::SINT_TO_FP, and llvm::ISD::UINT_TO_FP.

◆ LowerFPToInt()

MachineBasicBlock * LowerFPToInt	(	MachineInstr &	MI,
		DebugLoc	DL,
		MachineBasicBlock *	BB,
		const TargetInstrInfo &	TII,
		bool	IsUnsigned,
		bool	Int64,
		bool	Float64,
		unsigned	LoweredOpcode )

static

◆ LowerMemcpy()

MachineBasicBlock * LowerMemcpy	(	MachineInstr &	MI,
		DebugLoc	DL,
		MachineBasicBlock *	BB,
		const TargetInstrInfo &	TII,
		bool	Int64 )

static

◆ LowerMemset()

MachineBasicBlock * LowerMemset	(	MachineInstr &	MI,
		DebugLoc	DL,
		MachineBasicBlock *	BB,
		const TargetInstrInfo &	TII,
		bool	Int64 )

static

◆ performAnyAllCombine()

SDValue performAnyAllCombine	(	SDNode *	N,
		SelectionDAG &	DAG )

static

Definition at line 3333 of file WebAssemblyISelLowering.cpp.

References assert(), DL, llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getNOT(), llvm::SelectionDAG::getZExtOrTrunc(), llvm::ISD::INTRINSIC_WO_CHAIN, LHS, llvm::SDPatternMatch::m_c_SetCC(), llvm::SDPatternMatch::m_CondCode(), llvm::SDPatternMatch::m_SpecificCondCode(), llvm::PatternMatch::m_Value(), llvm::PatternMatch::m_Zero(), N, llvm::SDPatternMatch::sd_match(), SDValue(), llvm::ISD::SETEQ, and llvm::ISD::SETNE.

◆ performBitcastCombine()

SDValue performBitcastCombine	(	SDNode *	N,
		TargetLowering::DAGCombinerInfo &	DCI )

static

Definition at line 3260 of file WebAssemblyISelLowering.cpp.

References llvm::ISD::ADD, Concat, llvm::ISD::CONCAT_VECTORS, llvm::TargetLowering::DAGCombinerInfo::DAG, DL, extractSubVector(), llvm::SelectionDAG::getBitcast(), llvm::SelectionDAG::getConstant(), llvm::EVT::getFixedSizeInBits(), llvm::MVT::getIntegerVT(), llvm::SelectionDAG::getNode(), llvm::EVT::getScalarType(), llvm::SelectionDAG::getSetCC(), llvm::SelectionDAG::getShiftAmountConstant(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), llvm::SelectionDAG::getZExtOrTrunc(), I, llvm::ISD::INTRINSIC_WO_CHAIN, llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalize(), llvm::EVT::isFixedLengthVector(), llvm::EVT::isScalarInteger(), llvm::PatternMatch::m_BitCast(), llvm::SDPatternMatch::m_c_SetCC(), llvm::SDPatternMatch::m_CondCode(), llvm::PatternMatch::m_Value(), N, llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::SDPatternMatch::sd_match(), SDValue(), llvm::ISD::SHL, llvm::size(), and llvm::SmallVectorTemplateCommon< T, typename >::size().

◆ performLowerPartialReduction()

SDValue performLowerPartialReduction	(	SDNode *	N,
		SelectionDAG &	DAG )

Definition at line 2118 of file WebAssemblyISelLowering.cpp.

References llvm::ISD::ADD, llvm::Add, assert(), DL, llvm::SelectionDAG::getNode(), llvm::SDNode::getOpcode(), llvm::SDValue::getOpcode(), llvm::SDNode::getOperand(), llvm::SDNode::getValueType(), llvm::ISD::INTRINSIC_WO_CHAIN, llvm::ISD::isExtOpcode(), llvm::ISD::MUL, N, SDValue(), and llvm::ISD::SIGN_EXTEND.

◆ performMulCombine()

SDValue performMulCombine	(	SDNode *	N,
		TargetLowering::DAGCombinerInfo &	DCI )

static

Definition at line 3599 of file WebAssemblyISelLowering.cpp.

References assert(), llvm::ISD::CONCAT_VECTORS, llvm::TargetLowering::DAGCombinerInfo::DAG, DL, extractSubVector(), llvm::SelectionDAG::getBitcast(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getUNDEF(), llvm::SelectionDAG::getVectorShuffle(), llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalize(), llvm::EVT::isVector(), LHS, llvm::ISD::MUL, N, RHS, SDValue(), and TryWideExtMulCombine().

◆ performSETCCCombine()

SDValue performSETCCCombine	(	SDNode *	N,
		TargetLowering::DAGCombinerInfo &	DCI,
		const WebAssemblySubtarget *	Subtarget )

static

Definition at line 3456 of file WebAssemblyISelLowering.cpp.

References llvm::cast(), llvm::EVT::changeVectorElementType(), combineVectorSizedSetCCEquality(), llvm::TargetLowering::DAGCombinerInfo::DAG, llvm::MVT::getIntegerVT(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalize(), llvm::EVT::isFixedLengthVector(), llvm::EVT::isScalarInteger(), LHS, N, SDValue(), and TryMatchTrue().

◆ performTruncateCombine()

SDValue performTruncateCombine	(	SDNode *	N,
		TargetLowering::DAGCombinerInfo &	DCI )

static

Definition at line 3233 of file WebAssemblyISelLowering.cpp.

References llvm::ISD::AND, llvm::TargetLowering::DAGCombinerInfo::DAG, DL, llvm::SelectionDAG::getConstant(), llvm::APInt::getLowBitsSet(), llvm::SelectionDAG::getNode(), llvm::EVT::getScalarSizeInBits(), llvm::EVT::getVectorElementType(), llvm::EVT::is128BitVector(), llvm::EVT::isSimple(), llvm::EVT::isVector(), N, SDValue(), and truncateVectorWithNARROW().

◆ performVECTOR_SHUFFLECombine()

SDValue performVECTOR_SHUFFLECombine	(	SDNode *	N,
		TargetLowering::DAGCombinerInfo &	DCI )

static

Definition at line 2915 of file WebAssemblyISelLowering.cpp.

References llvm::cast(), llvm::TargetLowering::DAGCombinerInfo::DAG, llvm::SelectionDAG::getBitcast(), llvm::SelectionDAG::getUNDEF(), llvm::SDValue::getValueType(), llvm::SelectionDAG::getVectorShuffle(), N, and SDValue().

◆ performVectorExtendCombine()

SDValue performVectorExtendCombine	(	SDNode *	N,
		TargetLowering::DAGCombinerInfo &	DCI )

static

Definition at line 2985 of file WebAssemblyISelLowering.cpp.

References assert(), llvm::TargetLowering::DAGCombinerInfo::DAG, llvm::dyn_cast(), llvm::ISD::EXTRACT_SUBVECTOR, llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDValue::getValueType(), N, SDValue(), llvm::ISD::SIGN_EXTEND, and llvm::ISD::ZERO_EXTEND.

◆ performVectorExtendToFPCombine()

SDValue performVectorExtendToFPCombine	(	SDNode *	N,
		TargetLowering::DAGCombinerInfo &	DCI )

static

Convert ({u,s}itofp vec) --> ({u,s}itofp ({s,z}ext vec)) so it doesn't get split up into scalar instructions during legalization, and the vector extending instructions are selected in performVectorExtendCombine below.

Definition at line 2943 of file WebAssemblyISelLowering.cpp.

References assert(), llvm::TargetLowering::DAGCombinerInfo::DAG, llvm::SelectionDAG::getNode(), N, SDValue(), llvm::ISD::SIGN_EXTEND, llvm::ISD::SINT_TO_FP, llvm::ISD::UINT_TO_FP, and llvm::ISD::ZERO_EXTEND.