LLVM 22.0.0git
|
#include "MCTargetDesc/XtensaMCTargetDesc.h"
#include "TargetInfo/XtensaTargetInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDecoder.h"
#include "llvm/MC/MCDecoderOps.h"
#include "llvm/MC/MCDisassembler/MCDisassembler.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/Endian.h"
#include "XtensaGenDisassemblerTables.inc"
Go to the source code of this file.
Classes | |
struct | DecodeRegister |
Macros | |
#define | DEBUG_TYPE "Xtensa-disassembler" |
Typedefs | |
using | DecodeStatus = MCDisassembler::DecodeStatus |
Functions | |
static MCDisassembler * | createXtensaDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx) |
LLVM_EXTERNAL_VISIBILITY void | LLVMInitializeXtensaDisassembler () |
static DecodeStatus | DecodeARRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeMRRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeMR01RegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeMR23RegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeFPRRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeURRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const MCDisassembler *Decoder) |
static DecodeStatus | DecodeSRRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const MCDisassembler *Decoder) |
static DecodeStatus | DecodeBRRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) |
static bool | tryAddingSymbolicOperand (int64_t Value, bool isBranch, uint64_t Address, uint64_t Offset, uint64_t InstSize, MCInst &MI, const void *Decoder) |
static DecodeStatus | decodeCallOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) |
static DecodeStatus | decodeJumpOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) |
static DecodeStatus | decodeBranchOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) |
static DecodeStatus | decodeLoopOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) |
static DecodeStatus | decodeL32ROperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) |
static DecodeStatus | decodeImm8Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) |
static DecodeStatus | decodeImm8_sh8Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) |
static DecodeStatus | decodeImm12Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) |
static DecodeStatus | decodeUimm4Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) |
static DecodeStatus | decodeUimm5Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) |
static DecodeStatus | decodeImm1_16Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) |
static DecodeStatus | decodeImm1n_15Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) |
static DecodeStatus | decodeImm32n_95Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) |
static DecodeStatus | decodeImm8n_7Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) |
static DecodeStatus | decodeImm64n_4nOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) |
static DecodeStatus | decodeEntry_Imm12OpValue (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) |
static DecodeStatus | decodeShimm1_31Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) |
static DecodeStatus | decodeB4constOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) |
static DecodeStatus | decodeB4constuOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) |
static DecodeStatus | decodeImm7_22Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) |
static DecodeStatus | decodeMem8Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) |
static DecodeStatus | decodeMem16Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) |
static DecodeStatus | decodeMem32Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) |
static DecodeStatus | decodeMem32nOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) |
static DecodeStatus | readInstruction16 (ArrayRef< uint8_t > Bytes, uint64_t Address, uint64_t &Size, uint64_t &Insn, bool IsLittleEndian) |
Read two bytes from the ArrayRef and return 16 bit data sorted according to the given endianness. | |
static DecodeStatus | readInstruction24 (ArrayRef< uint8_t > Bytes, uint64_t Address, uint64_t &Size, uint64_t &Insn, bool IsLittleEndian) |
Read three bytes from the ArrayRef and return 24 bit data. | |
Variables | |
const MCPhysReg | ARDecoderTable [] |
const DecodeRegister | SRDecoderTable [] |
static int64_t | TableB4const [16] |
static int64_t | TableB4constu [16] |
#define DEBUG_TYPE "Xtensa-disassembler" |
Definition at line 29 of file XtensaDisassembler.cpp.
Definition at line 31 of file XtensaDisassembler.cpp.
|
static |
Definition at line 50 of file XtensaDisassembler.cpp.
Referenced by LLVMInitializeXtensaDisassembler().
|
static |
Definition at line 66 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), ARDecoderTable, llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by decodeMem16Operand(), decodeMem32nOperand(), decodeMem32Operand(), and decodeMem8Operand().
|
static |
Definition at line 391 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and TableB4const.
|
static |
Definition at line 401 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and TableB4constu.
|
static |
Definition at line 253 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, assert(), llvm::MCOperand::createImm(), llvm::MCInst::getOpcode(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
|
static |
Definition at line 218 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
|
static |
Definition at line 238 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
|
static |
Definition at line 373 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
|
static |
Definition at line 110 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
|
static |
Definition at line 308 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
|
static |
Definition at line 329 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
|
static |
Definition at line 336 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
|
static |
Definition at line 347 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
|
static |
Definition at line 365 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
|
static |
Definition at line 410 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
|
static |
Definition at line 300 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
|
static |
Definition at line 358 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
|
static |
Definition at line 293 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
|
static |
Definition at line 246 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
|
static |
Definition at line 284 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
|
static |
Definition at line 274 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, assert(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
|
static |
Definition at line 425 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, assert(), llvm::MCOperand::createImm(), DecodeARRegisterClass(), and llvm::MCDisassembler::Success.
|
static |
Definition at line 441 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, assert(), llvm::MCOperand::createImm(), DecodeARRegisterClass(), and llvm::MCDisassembler::Success.
|
static |
Definition at line 433 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, assert(), llvm::MCOperand::createImm(), DecodeARRegisterClass(), and llvm::MCDisassembler::Success.
|
static |
Definition at line 417 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, assert(), llvm::MCOperand::createImm(), DecodeARRegisterClass(), and llvm::MCDisassembler::Success.
|
static |
Definition at line 88 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
|
static |
Definition at line 99 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
|
static |
Definition at line 77 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
|
static |
Definition at line 381 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
|
static |
Definition at line 184 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Xtensa::checkRegister(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, llvm::MCSubtargetInfo::getFeatureBits(), llvm::MCInst::getOpcode(), llvm::MCDisassembler::getSubtargetInfo(), DecodeRegister::Reg, llvm::Xtensa::REGISTER_EXCHANGE, llvm::Xtensa::REGISTER_READ, llvm::Xtensa::REGISTER_WRITE, SRDecoderTable, and llvm::MCDisassembler::Success.
|
static |
Definition at line 315 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
|
static |
Definition at line 322 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
|
static |
Definition at line 121 of file XtensaDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Xtensa::checkRegister(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, llvm::MCSubtargetInfo::getFeatureBits(), llvm::MCInst::getOpcode(), llvm::MCDisassembler::getSubtargetInfo(), llvm::Xtensa::getUserRegister(), MRI, llvm::Xtensa::REGISTER_READ, llvm::Xtensa::REGISTER_WRITE, and llvm::MCDisassembler::Success.
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeXtensaDisassembler | ( | ) |
Definition at line 56 of file XtensaDisassembler.cpp.
References createXtensaDisassembler(), llvm::getTheXtensaTarget(), and llvm::TargetRegistry::RegisterMCDisassembler().
|
static |
Read two bytes from the ArrayRef and return 16 bit data sorted according to the given endianness.
Definition at line 451 of file XtensaDisassembler.cpp.
References llvm::MCDisassembler::Fail, llvm::report_fatal_error(), llvm::ArrayRef< T >::size(), Size, and llvm::MCDisassembler::Success.
|
static |
Read three bytes from the ArrayRef and return 24 bit data.
Definition at line 470 of file XtensaDisassembler.cpp.
References llvm::MCDisassembler::Fail, llvm::report_fatal_error(), llvm::ArrayRef< T >::size(), Size, and llvm::MCDisassembler::Success.
|
static |
Definition at line 229 of file XtensaDisassembler.cpp.
References Address, isBranch(), MI, llvm::Offset, and llvm::MCDisassembler::tryAddingSymbolicOperand().
Referenced by decodeBranchOperand(), and decodeLoopOperand().
Definition at line 61 of file XtensaDisassembler.cpp.
Referenced by DecodeARRegisterClass().
const DecodeRegister SRDecoderTable[] |
Definition at line 148 of file XtensaDisassembler.cpp.
Referenced by DecodeSRRegisterClass().
|
static |
Definition at line 389 of file XtensaDisassembler.cpp.
Referenced by decodeB4constOperand().
|
static |
Definition at line 399 of file XtensaDisassembler.cpp.
Referenced by decodeB4constuOperand().