LLVM 22.0.0git
Public Types | Public Member Functions | Protected Attributes | List of all members
llvm::AArch64Subtarget Class Referencefinal

#include "Target/AArch64/AArch64Subtarget.h"

Inheritance diagram for llvm::AArch64Subtarget:
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Public Types

enum  ARMProcFamilyEnum : uint8_t { Generic }
 

Public Member Functions

 AArch64Subtarget (const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS, const TargetMachine &TM, bool LittleEndian, unsigned MinSVEVectorSizeInBitsOverride=0, unsigned MaxSVEVectorSizeInBitsOverride=0, bool IsStreaming=false, bool IsStreamingCompatible=false, bool HasMinSize=false)
 This constructor initializes the data members to match that of the specified triple.
 
virtual unsigned getHwModeSet () const override
 
const AArch64SelectionDAGInfo * getSelectionDAGInfo () const override
 
const AArch64FrameLowering * getFrameLowering () const override
 
const AArch64TargetLowering * getTargetLowering () const override
 
const AArch64InstrInfo * getInstrInfo () const override
 
const AArch64RegisterInfo * getRegisterInfo () const override
 
const CallLowering * getCallLowering () const override
 
const InlineAsmLowering * getInlineAsmLowering () const override
 
InstructionSelector * getInstructionSelector () const override
 
const LegalizerInfo * getLegalizerInfo () const override
 
const RegisterBankInfo * getRegBankInfo () const override
 
const Triple & getTargetTriple () const
 
bool enableMachineScheduler () const override
 
bool enablePostRAScheduler () const override
 
bool enableSubRegLiveness () const override
 
bool enableMachinePipeliner () const override
 
bool useDFAforSMS () const override
 
ARMProcFamilyEnum getProcFamily () const
 Returns ARM processor family.
 
bool isXRaySupported () const override
 
bool isStreaming () const
 Returns true if the function has a streaming body.
 
bool isStreamingCompatible () const
 Returns true if the function has a streaming-compatible body.
 
unsigned getStreamingHazardSize () const
 Returns the size of memory region that if accessed by both the CPU and the SME unit could result in a hazard.
 
bool isNeonAvailable () const
 Returns true if the target has NEON and the function at runtime is known to have NEON enabled (e.g.
 
bool isSVEAvailable () const
 Returns true if the target has SVE and can use the full range of SVE instructions, for example because it knows the function is known not to be in streaming-SVE mode or when the target has FEAT_FA64 enabled.
 
bool isStreamingSVEAvailable () const
 Returns true if the target has access to the streaming-compatible subset of SVE instructions.
 
bool isSVEorStreamingSVEAvailable () const
 Returns true if the target has access to either the full range of SVE instructions, or the streaming-compatible subset of SVE instructions.
 
bool isNonStreamingSVEorSME2Available () const
 Returns true if the target has access to either the full range of SVE instructions, or the streaming-compatible subset of SVE instructions available to SME2.
 
unsigned getMinVectorRegisterBitWidth () const
 
bool isXRegisterReserved (size_t i) const
 
bool isXRegisterReservedForRA (size_t i) const
 
unsigned getNumXRegisterReserved () const
 
bool isLRReservedForRA () const
 
bool isXRegCustomCalleeSaved (size_t i) const
 
bool hasCustomCallingConv () const
 
bool hasFusion () const
 Return true if the CPU supports any kind of instruction fusion.
 
unsigned getEpilogueVectorizationMinVF () const
 
unsigned getMaxInterleaveFactor () const
 
unsigned getVectorInsertExtractBaseCost () const
 
unsigned getCacheLineSize () const override
 
unsigned getScatterOverhead () const
 
unsigned getGatherOverhead () const
 
unsigned getPrefetchDistance () const override
 
unsigned getMinPrefetchStride (unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const override
 
unsigned getMaxPrefetchIterationsAhead () const override
 
Align getPrefFunctionAlignment () const
 
Align getPrefLoopAlignment () const
 
unsigned getMaxBytesForLoopAlignment () const
 
unsigned getMaximumJumpTableSize () const
 
unsigned getMinimumJumpTableEntries () const
 
bool supportsAddressTopByteIgnored () const
 CPU has TBI (top byte of addresses is ignored during HW address translation) and OS enables it.
 
bool isLittleEndian () const
 
bool isTargetDarwin () const
 
bool isTargetIOS () const
 
bool isTargetLinux () const
 
bool isTargetWindows () const
 
bool isTargetAndroid () const
 
bool isTargetFuchsia () const
 
bool isWindowsArm64EC () const
 
bool isTargetCOFF () const
 
bool isTargetELF () const
 
bool isTargetMachO () const
 
bool isTargetILP32 () const
 
bool useAA () const override
 
bool addrSinkUsingGEPs () const override
 
bool useSmallAddressing () const
 
bool isX16X17Safer () const
 Returns whether the operating system makes it safer to store sensitive values in x16 and x17 as opposed to other registers.
 
void ParseSubtargetFeatures (StringRef CPU, StringRef TuneCPU, StringRef FS)
 ParseSubtargetFeatures - Parses features string setting specified subtarget options.
 
unsigned ClassifyGlobalReference (const GlobalValue *GV, const TargetMachine &TM) const
 ClassifyGlobalReference - Find the target operand flags that describe how a global value should be referenced for the current subtarget.
 
unsigned classifyGlobalFunctionReference (const GlobalValue *GV, const TargetMachine &TM) const
 
unsigned char classifyGlobalFunctionReference (const GlobalValue *GV) const override
 This function is design to compatible with the function def in other targets and escape build error about the virtual function def in base class TargetSubtargetInfo.
 
void overrideSchedPolicy (MachineSchedPolicy &Policy, const SchedRegion &Region) const override
 
void adjustSchedDependency (SUnit *Def, int DefOpIdx, SUnit *Use, int UseOpIdx, SDep &Dep, const TargetSchedModel *SchedModel) const override
 
bool enableEarlyIfConversion () const override
 
std::unique_ptr< PBQPRAConstraint > getCustomPBQPConstraints () const override
 
bool isCallingConvWin64 (CallingConv::ID CC, bool IsVarArg) const
 
bool swiftAsyncContextIsDynamicallySet () const
 Return whether FrameLowering should always set the "extended frame present" bit in FP, or set it based on a symbol in the runtime.
 
void mirFileLoaded (MachineFunction &MF) const override
 
unsigned getMaxSVEVectorSizeInBits () const
 
unsigned getMinSVEVectorSizeInBits () const
 
unsigned getSVEVectorSizeInBits () const
 
bool useSVEForFixedLengthVectors () const
 
bool useSVEForFixedLengthVectors (EVT VT) const
 
unsigned getVScaleForTuning () const
 
TailFoldingOpts getSVETailFoldingDefaultOpts () const
 
bool useScalarIncVL () const
 Returns true to use the addvl/inc/dec instructions, as opposed to separate add + cnt instructions.
 
const char * getChkStkName () const
 
AArch64PAuth::AuthCheckMethod getAuthenticatedLRCheckMethod (const MachineFunction &MF) const
 Choose a method of checking LR before performing a tail call.
 
std::optional< uint16_t > getPtrAuthBlockAddressDiscriminatorIfEnabled (const Function &ParentFn) const
 Compute the integer discriminator for a given BlockAddress constant, if blockaddress signing is enabled, or std::nullopt otherwise.
 

Protected Attributes

ARMProcFamilyEnum ARMProcFamily = Generic
 ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others.
 
unsigned MinVectorRegisterBitWidth = 64
 
unsigned EpilogueVectorizationMinVF = 16
 
uint8_t MaxInterleaveFactor = 2
 
uint8_t VectorInsertExtractBaseCost = 2
 
uint16_t CacheLineSize = 0
 
unsigned ScatterOverhead = 10
 
unsigned GatherOverhead = 10
 
uint16_t PrefetchDistance = 0
 
uint16_t MinPrefetchStride = 1
 
unsigned MaxPrefetchIterationsAhead = UINT_MAX
 
Align PrefFunctionAlignment
 
Align PrefLoopAlignment
 
unsigned MaxBytesForLoopAlignment = 0
 
unsigned MinimumJumpTableEntries = 4
 
unsigned MaxJumpTableSize = 0
 
BitVector ReserveXRegister
 
BitVector ReserveXRegisterForRA
 
BitVector CustomCallSavedXRegs
 
bool IsLittle
 
bool IsStreaming
 
bool IsStreamingCompatible
 
std::optional< unsigned > StreamingHazardSize
 
unsigned MinSVEVectorSizeInBits
 
unsigned MaxSVEVectorSizeInBits
 
unsigned VScaleForTuning = 1
 
TailFoldingOpts DefaultSVETFOpts = TailFoldingOpts::Disabled
 
bool EnableSubregLiveness
 
Triple TargetTriple
 TargetTriple - What processor and OS we're targeting.
 
AArch64FrameLowering FrameLowering
 
AArch64InstrInfo InstrInfo
 
AArch64SelectionDAGInfo TSInfo
 
AArch64TargetLowering TLInfo
 
std::unique_ptr< CallLowering > CallLoweringInfo
 GlobalISel related APIs.
 
std::unique_ptr< InlineAsmLowering > InlineAsmLoweringInfo
 
std::unique_ptr< InstructionSelector > InstSelector
 
std::unique_ptr< LegalizerInfo > Legalizer
 
std::unique_ptr< RegisterBankInfo > RegBankInfo
 

Detailed Description

Definition at line 38 of file AArch64Subtarget.h.

Member Enumeration Documentation

◆ ARMProcFamilyEnum

enum llvm::AArch64Subtarget::ARMProcFamilyEnum : uint8_t
Enumerator
Generic 

Definition at line 40 of file AArch64Subtarget.h.

Constructor & Destructor Documentation

◆ AArch64Subtarget()

AArch64Subtarget::AArch64Subtarget ( const Triple &  TT,
StringRef  CPU,
StringRef  TuneCPU,
StringRef  FS,
const TargetMachine &  TM,
bool  LittleEndian,
unsigned  MinSVEVectorSizeInBitsOverride = 0,
unsigned  MaxSVEVectorSizeInBitsOverride = 0,
bool  IsStreaming = false,
bool  IsStreamingCompatible = false,
bool  HasMinSize = false 
)

This constructor initializes the data members to match that of the specified triple.

Definition at line 369 of file AArch64Subtarget.cpp.

References CallLoweringInfo, llvm::StringMap< ValueTy, AllocatorTy >::count(), llvm::createAArch64InstructionSelector(), EnableSubregLiveness, EnableSubregLivenessTracking, llvm::from_range, getRegisterInfo(), getTargetLowering(), llvm::cl::opt_storage< DataType, ExternalStorage, isClass >::getValue(), InlineAsmLoweringInfo, InstSelector, llvm::AArch64::isX18ReservedByDefault(), RegBankInfo, ReservedRegsForRA, ReserveXRegister, ReserveXRegisterForRA, llvm::BitVector::set(), and TRI.

Member Function Documentation

◆ addrSinkUsingGEPs()

bool llvm::AArch64Subtarget::addrSinkUsingGEPs ( ) const
inlineoverride

Definition at line 310 of file AArch64Subtarget.h.

References isTargetILP32(), and useAA().

◆ adjustSchedDependency()

void AArch64Subtarget::adjustSchedDependency ( SUnit *  Def,
int  DefOpIdx,
SUnit *  Use,
int  UseOpIdx,
SDep &  Dep,
const TargetSchedModel *  SchedModel 
) const
override

Definition at line 548 of file AArch64Subtarget.cpp.

References llvm::TargetSchedModel::computeOperandLatency(), llvm::const_mi_bundle_ops(), llvm::SDep::Data, DefMI, llvm::SDep::getKind(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::SDep::getReg(), llvm::SDep::setLatency(), and UseMI.

◆ classifyGlobalFunctionReference() [1/2]

unsigned char llvm::AArch64Subtarget::classifyGlobalFunctionReference ( const GlobalValue *  GV) const
inlineoverride

This function is design to compatible with the function def in other targets and escape build error about the virtual function def in base class TargetSubtargetInfo.

Updeate me if AArch64 target need to use it.

Definition at line 348 of file AArch64Subtarget.h.

◆ classifyGlobalFunctionReference() [2/2]

unsigned AArch64Subtarget::classifyGlobalFunctionReference ( const GlobalValue *  GV,
const TargetMachine &  TM 
) const

Definition at line 500 of file AArch64Subtarget.cpp.

References ClassifyGlobalReference(), F, getTargetTriple(), llvm::GlobalValue::getValueType(), llvm::GlobalValue::hasDLLImportStorageClass(), llvm::GlobalValue::hasExternalLinkage(), llvm::GlobalValue::hasInternalLinkage(), llvm::Type::isFunctionTy(), isTargetMachO(), isWindowsArm64EC(), llvm::CodeModel::Large, MachOUseNonLazyBind, llvm::AArch64II::MO_ARM64EC_CALLMANGLE, llvm::AArch64II::MO_DLLIMPORT, llvm::AArch64II::MO_GOT, and llvm::AArch64II::MO_NO_FLAG.

◆ ClassifyGlobalReference()

unsigned AArch64Subtarget::ClassifyGlobalReference ( const GlobalValue *  GV,
const TargetMachine &  TM 
) const

ClassifyGlobalReference - Find the target operand flags that describe how a global value should be referenced for the current subtarget.

Find the target operand flags that describe how a global value should be referenced for the current subtarget.

Definition at line 460 of file AArch64Subtarget.cpp.

References getTargetTriple(), llvm::GlobalValue::getValueType(), llvm::GlobalValue::hasDLLImportStorageClass(), llvm::GlobalValue::hasExternalWeakLinkage(), llvm::GlobalValue::isTagged(), isTargetMachO(), llvm::CodeModel::Large, llvm::AArch64II::MO_COFFSTUB, llvm::AArch64II::MO_DLLIMPORT, llvm::AArch64II::MO_GOT, llvm::AArch64II::MO_NC, llvm::AArch64II::MO_NO_FLAG, llvm::AArch64II::MO_TAGGED, llvm::CodeModel::Tiny, and useSmallAddressing().

Referenced by classifyGlobalFunctionReference(), llvm::AArch64InstrInfo::expandPostRAPseudo(), and performGlobalAddressCombine().

◆ enableEarlyIfConversion()

bool AArch64Subtarget::enableEarlyIfConversion ( ) const
override

Definition at line 587 of file AArch64Subtarget.cpp.

References EnableEarlyIfConvert.

◆ enableMachinePipeliner()

bool AArch64Subtarget::enableMachinePipeliner ( ) const
override

Definition at line 674 of file AArch64Subtarget.cpp.

◆ enableMachineScheduler()

bool llvm::AArch64Subtarget::enableMachineScheduler ( ) const
inlineoverride

Definition at line 159 of file AArch64Subtarget.h.

◆ enablePostRAScheduler()

bool llvm::AArch64Subtarget::enablePostRAScheduler ( ) const
inlineoverride

Definition at line 160 of file AArch64Subtarget.h.

◆ enableSubRegLiveness()

bool llvm::AArch64Subtarget::enableSubRegLiveness ( ) const
inlineoverride

Definition at line 161 of file AArch64Subtarget.h.

References EnableSubregLiveness.

◆ getAuthenticatedLRCheckMethod()

AArch64PAuth::AuthCheckMethod AArch64Subtarget::getAuthenticatedLRCheckMethod ( const MachineFunction &  MF) const

Choose a method of checking LR before performing a tail call.

Definition at line 642 of file AArch64Subtarget.cpp.

References AuthenticatedLRCheckMethod, llvm::MachineFunction::getFunction(), llvm::Function::hasFnAttribute(), llvm::AArch64PAuth::HighBitsNoTBI, and llvm::AArch64PAuth::None.

Referenced by llvm::AArch64InstrInfo::getInstSizeInBytes().

◆ getCacheLineSize()

unsigned llvm::AArch64Subtarget::getCacheLineSize ( ) const
inlineoverride

Definition at line 258 of file AArch64Subtarget.h.

References CacheLineSize.

◆ getCallLowering()

const CallLowering * AArch64Subtarget::getCallLowering ( ) const
override

Definition at line 437 of file AArch64Subtarget.cpp.

References CallLoweringInfo.

◆ getChkStkName()

const char * llvm::AArch64Subtarget::getChkStkName ( ) const
inline

Definition at line 455 of file AArch64Subtarget.h.

References isWindowsArm64EC().

Referenced by llvm::AArch64FrameLowering::emitPrologue().

◆ getCustomPBQPConstraints()

std::unique_ptr< PBQPRAConstraint > AArch64Subtarget::getCustomPBQPConstraints ( ) const
override

Definition at line 605 of file AArch64Subtarget.cpp.

◆ getEpilogueVectorizationMinVF()

unsigned llvm::AArch64Subtarget::getEpilogueVectorizationMinVF ( ) const
inline

Definition at line 253 of file AArch64Subtarget.h.

References EpilogueVectorizationMinVF.

Referenced by llvm::AArch64TTIImpl::getEpilogueVectorizationMinVF().

◆ getFrameLowering()

const AArch64FrameLowering * llvm::AArch64Subtarget::getFrameLowering ( ) const
inlineoverride

Definition at line 143 of file AArch64Subtarget.h.

References FrameLowering.

Referenced by llvm::AArch64FunctionInfo::AArch64FunctionInfo().

◆ getGatherOverhead()

unsigned llvm::AArch64Subtarget::getGatherOverhead ( ) const
inline

Definition at line 260 of file AArch64Subtarget.h.

References GatherOverhead.

◆ getHwModeSet()

unsigned AArch64Subtarget::getHwModeSet ( ) const
overridevirtual

Definition at line 423 of file AArch64Subtarget.cpp.

References EnableZPRPredicateSpills, llvm::cl::opt_storage< DataType, ExternalStorage, isClass >::getValue(), isStreaming(), isStreamingCompatible(), and llvm::to_underlying().

◆ getInlineAsmLowering()

const InlineAsmLowering * AArch64Subtarget::getInlineAsmLowering ( ) const
override

Definition at line 441 of file AArch64Subtarget.cpp.

References InlineAsmLoweringInfo.

◆ getInstrInfo()

const AArch64InstrInfo * llvm::AArch64Subtarget::getInstrInfo ( ) const
inlineoverride

Definition at line 149 of file AArch64Subtarget.h.

References InstrInfo.

Referenced by BuildPACM(), llvm::AArch64TargetLowering::EmitAllocateSMESaveBuffer(), llvm::AArch64TargetLowering::EmitAllocateZABuffer(), llvm::AArch64TargetLowering::EmitEntryPStateSM(), llvm::AArch64TargetLowering::EmitF128CSEL(), llvm::AArch64TargetLowering::EmitFill(), llvm::AArch64TargetLowering::EmitGetSMESaveSize(), llvm::AArch64TargetLowering::EmitInitTPIDR2Object(), llvm::AArch64TargetLowering::EmitInstrWithCustomInserter(), llvm::AArch64FrameLowering::emitPacRetPlusLeafHardening(), llvm::AArch64FrameLowering::emitPrologue(), llvm::AArch64TargetLowering::EmitTileLoad(), llvm::AArch64TargetLowering::EmitZAInstr(), llvm::AArch64TargetLowering::EmitZero(), llvm::AArch64TargetLowering::EmitZTInstr(), llvm::AArch64TargetLowering::fixupPtrauthDiscriminator(), getRegisterInfo(), llvm::AArch64TargetLowering::insertCopiesSplitCSR(), llvm::AArch64TargetLowering::isLegalAddressingMode(), and llvm::AArch64CallLowering::lowerCall().

◆ getInstructionSelector()

InstructionSelector * AArch64Subtarget::getInstructionSelector ( ) const
override

Definition at line 445 of file AArch64Subtarget.cpp.

References InstSelector.

◆ getLegalizerInfo()

const LegalizerInfo * AArch64Subtarget::getLegalizerInfo ( ) const
override

Definition at line 449 of file AArch64Subtarget.cpp.

◆ getMaxBytesForLoopAlignment()

unsigned llvm::AArch64Subtarget::getMaxBytesForLoopAlignment ( ) const
inline

Definition at line 276 of file AArch64Subtarget.h.

References MaxBytesForLoopAlignment.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering().

◆ getMaximumJumpTableSize()

unsigned llvm::AArch64Subtarget::getMaximumJumpTableSize ( ) const
inline

Definition at line 280 of file AArch64Subtarget.h.

References MaxJumpTableSize.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering().

◆ getMaxInterleaveFactor()

unsigned llvm::AArch64Subtarget::getMaxInterleaveFactor ( ) const
inline

Definition at line 256 of file AArch64Subtarget.h.

References MaxInterleaveFactor.

Referenced by llvm::AArch64TTIImpl::getMaxInterleaveFactor().

◆ getMaxPrefetchIterationsAhead()

unsigned llvm::AArch64Subtarget::getMaxPrefetchIterationsAhead ( ) const
inlineoverride

Definition at line 268 of file AArch64Subtarget.h.

References MaxPrefetchIterationsAhead.

◆ getMaxSVEVectorSizeInBits()

unsigned llvm::AArch64Subtarget::getMaxSVEVectorSizeInBits ( ) const
inline

Definition at line 408 of file AArch64Subtarget.h.

References assert(), isSVEorStreamingSVEAvailable(), and MaxSVEVectorSizeInBits.

Referenced by findMoreOptimalIndexType(), llvm::AArch64TargetLowering::lowerInterleavedLoad(), and llvm::AArch64TargetLowering::lowerInterleavedStore().

◆ getMinimumJumpTableEntries()

unsigned llvm::AArch64Subtarget::getMinimumJumpTableEntries ( ) const
inline

Definition at line 281 of file AArch64Subtarget.h.

References MinimumJumpTableEntries.

◆ getMinPrefetchStride()

unsigned llvm::AArch64Subtarget::getMinPrefetchStride ( unsigned  NumMemAccesses,
unsigned  NumStridedMemAccesses,
unsigned  NumPrefetches,
bool  HasCall 
) const
inlineoverride

Definition at line 262 of file AArch64Subtarget.h.

References MinPrefetchStride.

◆ getMinSVEVectorSizeInBits()

unsigned llvm::AArch64Subtarget::getMinSVEVectorSizeInBits ( ) const
inline

Definition at line 414 of file AArch64Subtarget.h.

References assert(), isSVEorStreamingSVEAvailable(), and MinSVEVectorSizeInBits.

Referenced by llvm::AArch64TargetLowering::getNumInterleavedAccesses(), getPredicateForFixedLengthVector(), llvm::AArch64TTIImpl::getRegisterBitWidth(), isAllActivePredicate(), llvm::AArch64TargetLowering::isLegalInterleavedAccessType(), llvm::AArch64TargetLowering::lowerInterleavedLoad(), llvm::AArch64TargetLowering::lowerInterleavedStore(), optimizeIncrementingWhile(), performFPExtendCombine(), performMSTORECombine(), performSTORECombine(), performUnpackCombine(), useSVEForFixedLengthVectors(), and llvm::AArch64TargetLowering::useSVEForFixedLengthVectorVT().

◆ getMinVectorRegisterBitWidth()

unsigned llvm::AArch64Subtarget::getMinVectorRegisterBitWidth ( ) const
inline

Definition at line 222 of file AArch64Subtarget.h.

References isNeonAvailable(), isSVEAvailable(), and MinVectorRegisterBitWidth.

◆ getNumXRegisterReserved()

unsigned llvm::AArch64Subtarget::getNumXRegisterReserved ( ) const
inline

Definition at line 234 of file AArch64Subtarget.h.

References llvm::BitVector::count(), ReserveXRegister, and ReserveXRegisterForRA.

Referenced by llvm::AArch64RegisterInfo::getRegPressureLimit().

◆ getPrefetchDistance()

unsigned llvm::AArch64Subtarget::getPrefetchDistance ( ) const
inlineoverride

Definition at line 261 of file AArch64Subtarget.h.

References PrefetchDistance.

◆ getPrefFunctionAlignment()

Align llvm::AArch64Subtarget::getPrefFunctionAlignment ( ) const
inline

Definition at line 271 of file AArch64Subtarget.h.

References PrefFunctionAlignment.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering().

◆ getPrefLoopAlignment()

Align llvm::AArch64Subtarget::getPrefLoopAlignment ( ) const
inline

Definition at line 274 of file AArch64Subtarget.h.

References PrefLoopAlignment.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering().

◆ getProcFamily()

ARMProcFamilyEnum llvm::AArch64Subtarget::getProcFamily ( ) const
inline

Returns ARM processor family.

Avoid this function! CPU specifics should be kept local to this class and preferably modeled with SubtargetFeatures or properties in initializeProperties().

Definition at line 170 of file AArch64Subtarget.h.

References ARMProcFamily.

Referenced by llvm::AArch64TargetLowering::getTargetMMOFlags(), and llvm::AArch64TTIImpl::getUnrollingPreferences().

◆ getPtrAuthBlockAddressDiscriminatorIfEnabled()

std::optional< uint16_t > AArch64Subtarget::getPtrAuthBlockAddressDiscriminatorIfEnabled ( const Function &  ParentFn) const

Compute the integer discriminator for a given BlockAddress constant, if blockaddress signing is enabled, or std::nullopt otherwise.

Blockaddress signing is controlled by the function attribute "ptrauth-indirect-gotos" on the parent function. Note that this assumes the discriminator is independent of the indirect goto branch site itself, i.e., it's the same for all BlockAddresses in a function.

Definition at line 658 of file AArch64Subtarget.cpp.

References llvm::Value::getName(), llvm::getPointerAuthStableSipHash(), and llvm::Function::hasFnAttribute().

◆ getRegBankInfo()

const RegisterBankInfo * AArch64Subtarget::getRegBankInfo ( ) const
override

Definition at line 453 of file AArch64Subtarget.cpp.

References RegBankInfo.

Referenced by llvm::AArch64CallLowering::lowerCall().

◆ getRegisterInfo()

const AArch64RegisterInfo * llvm::AArch64Subtarget::getRegisterInfo ( ) const
inlineoverride

Definition at line 150 of file AArch64Subtarget.h.

References getInstrInfo(), and llvm::AArch64InstrInfo::getRegisterInfo().

Referenced by AArch64Subtarget(), llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::AArch64InstrInfo::buildClearRegister(), llvm::AArch64FrameLowering::canUseAsPrologue(), llvm::AArch64TargetLowering::changeStreamingMode(), emitDefineCFAWithFP(), llvm::AArch64TargetLowering::EmitEntryPStateSM(), llvm::AArch64TargetLowering::EmitGetSMESaveSize(), llvm::AArch64FrameLowering::emitPrologue(), llvm::AArch64InstrInfo::expandPostRAPseudo(), findScratchNonCalleeSaveRegister(), llvm::AArch64RegisterBankInfo::getInstrMapping(), llvm::AArch64TargetLowering::insertCopiesSplitCSR(), InsertSEH(), and llvm::AArch64CallLowering::lowerCall().

◆ getScatterOverhead()

unsigned llvm::AArch64Subtarget::getScatterOverhead ( ) const
inline

Definition at line 259 of file AArch64Subtarget.h.

References ScatterOverhead.

◆ getSelectionDAGInfo()

const AArch64SelectionDAGInfo * llvm::AArch64Subtarget::getSelectionDAGInfo ( ) const
inlineoverride

Definition at line 140 of file AArch64Subtarget.h.

References TSInfo.

◆ getStreamingHazardSize()

unsigned llvm::AArch64Subtarget::getStreamingHazardSize ( ) const
inline

Returns the size of memory region that if accessed by both the CPU and the SME unit could result in a hazard.

0 = disabled.

Definition at line 184 of file AArch64Subtarget.h.

References StreamingHazardSize.

◆ getSVETailFoldingDefaultOpts()

TailFoldingOpts llvm::AArch64Subtarget::getSVETailFoldingDefaultOpts ( ) const
inline

Definition at line 447 of file AArch64Subtarget.h.

References DefaultSVETFOpts.

Referenced by llvm::AArch64TTIImpl::preferPredicateOverEpilogue().

◆ getSVEVectorSizeInBits()

unsigned llvm::AArch64Subtarget::getSVEVectorSizeInBits ( ) const
inline

Definition at line 422 of file AArch64Subtarget.h.

References assert(), isSVEorStreamingSVEAvailable(), MaxSVEVectorSizeInBits, and MinSVEVectorSizeInBits.

Referenced by llvm::AArch64InstrInfo::isCandidateToMergeOrPair().

◆ getTargetLowering()

const AArch64TargetLowering * llvm::AArch64Subtarget::getTargetLowering ( ) const
inlineoverride

Definition at line 146 of file AArch64Subtarget.h.

References TLInfo.

Referenced by AArch64Subtarget(), llvm::AArch64FrameLowering::canUseAsPrologue(), llvm::AArch64FrameLowering::canUseRedZone(), llvm::AArch64SelectionDAGInfo::EmitStreamingCompatibleMemLibCall(), finishStackBlock(), llvm::AArch64RegisterInfo::getCalleeSavedRegs(), llvm::AArch64RegisterInfo::getCallPreservedMask(), llvm::AArch64RegisterInfo::getDarwinCalleeSavedRegs(), llvm::AArch64RegisterInfo::getDarwinCallPreservedMask(), and produceCompactUnwindFrame().

◆ getTargetTriple()

const Triple & llvm::AArch64Subtarget::getTargetTriple ( ) const
inline

Definition at line 158 of file AArch64Subtarget.h.

References TargetTriple.

Referenced by classifyGlobalFunctionReference(), ClassifyGlobalReference(), llvm::AArch64FrameLowering::emitPrologue(), hasELFSignedGOTHelper(), llvm::AArch64TargetLowering::shouldInsertTrailingFenceForAtomicStore(), ShouldSignWithBKey(), and swiftAsyncContextIsDynamicallySet().

◆ getVectorInsertExtractBaseCost()

unsigned AArch64Subtarget::getVectorInsertExtractBaseCost ( ) const

Definition at line 105 of file AArch64Subtarget.cpp.

References OverrideVectorInsertExtractBaseCost, and VectorInsertExtractBaseCost.

Referenced by llvm::AArch64TTIImpl::getIndexedVectorInstrCostFromEnd(), and llvm::AArch64TTIImpl::getScalarizationOverhead().

◆ getVScaleForTuning()

unsigned llvm::AArch64Subtarget::getVScaleForTuning ( ) const
inline

Definition at line 445 of file AArch64Subtarget.h.

References VScaleForTuning.

◆ hasCustomCallingConv()

bool llvm::AArch64Subtarget::hasCustomCallingConv ( ) const
inline

Definition at line 244 of file AArch64Subtarget.h.

References llvm::BitVector::any(), and CustomCallSavedXRegs.

Referenced by llvm::AArch64CallLowering::lowerCall().

◆ hasFusion()

bool llvm::AArch64Subtarget::hasFusion ( ) const
inline

Return true if the CPU supports any kind of instruction fusion.

Definition at line 247 of file AArch64Subtarget.h.

◆ isCallingConvWin64()

bool llvm::AArch64Subtarget::isCallingConvWin64 ( CallingConv::ID  CC,
bool  IsVarArg 
) const
inline

Definition at line 363 of file AArch64Subtarget.h.

References llvm::CallingConv::C, llvm::CallingConv::Fast, isTargetWindows(), llvm::CallingConv::PreserveNone, llvm::CallingConv::Swift, llvm::CallingConv::SwiftTail, and llvm::CallingConv::Win64.

Referenced by analyzeCallOperands(), llvm::AArch64FrameLowering::emitPrologue(), and llvm::AArch64RegisterInfo::isArgumentRegister().

◆ isLittleEndian()

bool llvm::AArch64Subtarget::isLittleEndian ( ) const
inline

Definition at line 289 of file AArch64Subtarget.h.

References IsLittle.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), combineI8TruncStore(), llvm::AArch64TargetLowering::EmitInitTPIDR2Object(), llvm::AArch64InstrInfo::isCandidateToMergeOrPair(), llvm::AArch64TargetLowering::optimizeExtendOrTruncateConversion(), and performLOADCombine().

◆ isLRReservedForRA()

bool llvm::AArch64Subtarget::isLRReservedForRA ( ) const
inline

Definition at line 240 of file AArch64Subtarget.h.

Referenced by llvm::AArch64RegisterInfo::getReservedRegs().

◆ isNeonAvailable()

bool llvm::AArch64Subtarget::isNeonAvailable ( ) const
inline

Returns true if the target has NEON and the function at runtime is known to have NEON enabled (e.g.

the function is known not to be in streaming-SVE mode, which disables NEON instructions).

Definition at line 192 of file AArch64Subtarget.h.

References isStreaming(), and isStreamingCompatible().

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::AArch64InstrInfo::buildClearRegister(), llvm::AArch64TargetLowering::canMergeStoresTo(), llvm::AArch64FrameLowering::canUseRedZone(), combineStoreValueFPToInt(), llvm::AArch64InstrInfo::copyPhysReg(), getMinVectorRegisterBitWidth(), llvm::AArch64TTIImpl::getPartialReductionCost(), llvm::AArch64TTIImpl::getRegisterBitWidth(), llvm::AArch64TargetLowering::isLegalInterleavedAccessType(), llvm::AArch64TargetLowering::isShuffleMaskLegal(), llvm::AArch64TargetLowering::LowerOperation(), performBuildVectorCombine(), performFpToIntCombine(), performIntToFpCombine(), performSTORECombine(), llvm::AArch64TTIImpl::shouldMaximizeVectorBandwidth(), tryAdvSIMDModImm16(), tryAdvSIMDModImm32(), tryLowerPartialReductionToDot(), useSVEForFixedLengthVectors(), and vectorToScalarBitmask().

◆ isNonStreamingSVEorSME2Available()

bool llvm::AArch64Subtarget::isNonStreamingSVEorSME2Available ( ) const
inline

Returns true if the target has access to either the full range of SVE instructions, or the streaming-compatible subset of SVE instructions available to SME2.

Definition at line 218 of file AArch64Subtarget.h.

References isSVEAvailable(), and isSVEorStreamingSVEAvailable().

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), and llvm::AArch64TargetLowering::isFMAFasterThanFMulAndFAdd().

◆ isStreaming()

bool llvm::AArch64Subtarget::isStreaming ( ) const
inline

Returns true if the function has a streaming body.

Definition at line 177 of file AArch64Subtarget.h.

References IsStreaming.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), enableMultiVectorSpillFill(), getHwModeSet(), INITIALIZE_PASS(), isNeonAvailable(), isStreamingSVEAvailable(), isSVEAvailable(), and tryToReplaceScalarFPConversionWithSVE().

◆ isStreamingCompatible()

bool llvm::AArch64Subtarget::isStreamingCompatible ( ) const
inline

Returns true if the function has a streaming-compatible body.

Definition at line 180 of file AArch64Subtarget.h.

References IsStreamingCompatible.

Referenced by getHwModeSet(), isNeonAvailable(), isSVEAvailable(), and tryToReplaceScalarFPConversionWithSVE().

◆ isStreamingSVEAvailable()

bool llvm::AArch64Subtarget::isStreamingSVEAvailable ( ) const
inline

Returns true if the target has access to the streaming-compatible subset of SVE instructions.

Definition at line 207 of file AArch64Subtarget.h.

References isStreaming().

Referenced by llvm::AArch64TTIImpl::getCastInstrCost(), isSVEorStreamingSVEAvailable(), and tryLowerPartialReductionToWideAdd().

◆ isSVEAvailable()

bool llvm::AArch64Subtarget::isSVEAvailable ( ) const
inline

Returns true if the target has SVE and can use the full range of SVE instructions, for example because it knows the function is known not to be in streaming-SVE mode or when the target has FEAT_FA64 enabled.

Definition at line 200 of file AArch64Subtarget.h.

References isStreaming(), and isStreamingCompatible().

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::AArch64TTIImpl::enableScalableVectorization(), llvm::AArch64TTIImpl::getIntrinsicInstrCost(), getMinVectorRegisterBitWidth(), llvm::AArch64TTIImpl::getRegisterBitWidth(), isNonStreamingSVEorSME2Available(), and llvm::AArch64TargetLowering::shouldExpandVectorMatch().

◆ isSVEorStreamingSVEAvailable()

bool llvm::AArch64Subtarget::isSVEorStreamingSVEAvailable ( ) const
inline

Returns true if the target has access to either the full range of SVE instructions, or the streaming-compatible subset of SVE instructions.

Definition at line 211 of file AArch64Subtarget.h.

References isStreamingSVEAvailable().

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::AArch64InstrInfo::buildClearRegister(), llvm::AArch64InstrInfo::copyPhysReg(), llvm::AArch64TTIImpl::enableScalableVectorization(), llvm::AArch64TTIImpl::getCastInstrCost(), getMaxSVEVectorSizeInBits(), getMinSVEVectorSizeInBits(), llvm::AArch64TTIImpl::getPartialReductionCost(), llvm::AArch64TTIImpl::getRegisterBitWidth(), llvm::AArch64TTIImpl::getShuffleCost(), getSVEVectorSizeInBits(), llvm::AArch64TargetLowering::isLegalInterleavedAccessType(), isNonStreamingSVEorSME2Available(), llvm::AArch64InstrInfo::loadRegFromStackSlot(), llvm::AArch64TargetLowering::shouldExpandCttzElements(), llvm::AArch64TargetLowering::shouldExpandGetActiveLaneMask(), llvm::AArch64InstrInfo::storeRegToStackSlot(), tryLowerPartialReductionToDot(), tryToReplaceScalarFPConversionWithSVE(), useSVEForFixedLengthVectors(), and llvm::AArch64TargetLowering::useSVEForFixedLengthVectorVT().

◆ isTargetAndroid()

bool llvm::AArch64Subtarget::isTargetAndroid ( ) const
inline

Definition at line 295 of file AArch64Subtarget.h.

References llvm::Triple::isAndroid(), and TargetTriple.

Referenced by llvm::AArch64TargetLowering::getIRStackGuard(), llvm::AArch64TargetLowering::getSafeStackPointerLocation(), and llvm::AArch64TargetLowering::useLoadStackGuardNode().

◆ isTargetCOFF()

bool llvm::AArch64Subtarget::isTargetCOFF ( ) const
inline

Definition at line 299 of file AArch64Subtarget.h.

References llvm::Triple::isOSBinFormatCOFF(), and TargetTriple.

◆ isTargetDarwin()

bool llvm::AArch64Subtarget::isTargetDarwin ( ) const
inline

Definition at line 291 of file AArch64Subtarget.h.

References llvm::Triple::isOSDarwin(), and TargetTriple.

Referenced by CC_AArch64_Custom_Block(), llvm::AArch64TargetLowering::CCAssignFnForCall(), llvm::AArch64RegisterInfo::getCalleeSavedRegs(), llvm::AArch64RegisterInfo::getCallPreservedMask(), llvm::AArch64RegisterInfo::getDarwinCalleeSavedRegs(), llvm::AArch64RegisterInfo::getDarwinCallPreservedMask(), llvm::AArch64RegisterInfo::getThisReturnPreservedMask(), llvm::AArch64TargetLowering::getVaListSizeInBits(), llvm::AArch64RegisterInfo::isArgumentRegister(), isX16X17Safer(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), and llvm::AArch64TargetLowering::preferredShiftLegalizationStrategy().

◆ isTargetELF()

bool llvm::AArch64Subtarget::isTargetELF ( ) const
inline

Definition at line 300 of file AArch64Subtarget.h.

References llvm::Triple::isOSBinFormatELF(), and TargetTriple.

◆ isTargetFuchsia()

bool llvm::AArch64Subtarget::isTargetFuchsia ( ) const
inline

Definition at line 296 of file AArch64Subtarget.h.

References llvm::Triple::isOSFuchsia(), and TargetTriple.

Referenced by llvm::AArch64TargetLowering::getIRStackGuard(), llvm::AArch64TargetLowering::getSafeStackPointerLocation(), and llvm::AArch64TargetLowering::useLoadStackGuardNode().

◆ isTargetILP32()

bool llvm::AArch64Subtarget::isTargetILP32 ( ) const
inline

Definition at line 303 of file AArch64Subtarget.h.

References llvm::Triple::getEnvironment(), llvm::Triple::GNUILP32, llvm::Triple::isArch32Bit(), and TargetTriple.

Referenced by addrSinkUsingGEPs(), CC_AArch64_Custom_Block(), llvm::AArch64TargetLowering::CCAssignFnForCall(), llvm::AArch64TargetLowering::computeKnownBitsForTargetNode(), llvm::AArch64FrameLowering::emitPrologue(), llvm::AArch64InstrInfo::expandPostRAPseudo(), llvm::AArch64RegisterInfo::isArgumentRegister(), and llvm::AArch64LegalizerInfo::legalizeIntrinsic().

◆ isTargetIOS()

bool llvm::AArch64Subtarget::isTargetIOS ( ) const
inline

Definition at line 292 of file AArch64Subtarget.h.

References llvm::Triple::isiOS(), and TargetTriple.

◆ isTargetLinux()

bool llvm::AArch64Subtarget::isTargetLinux ( ) const
inline

Definition at line 293 of file AArch64Subtarget.h.

References llvm::Triple::isOSLinux(), and TargetTriple.

Referenced by llvm::AArch64RegisterInfo::getCustomEHPadPreservedMask().

◆ isTargetMachO()

bool llvm::AArch64Subtarget::isTargetMachO ( ) const
inline

Definition at line 301 of file AArch64Subtarget.h.

References llvm::Triple::isOSBinFormatMachO(), and TargetTriple.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), CC_AArch64_Custom_Block(), classifyGlobalFunctionReference(), ClassifyGlobalReference(), and produceCompactUnwindFrame().

◆ isTargetWindows()

bool llvm::AArch64Subtarget::isTargetWindows ( ) const
inline

Definition at line 294 of file AArch64Subtarget.h.

References llvm::Triple::isOSWindows(), and TargetTriple.

Referenced by llvm::AArch64FunctionInfo::AArch64FunctionInfo(), llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::AArch64TargetLowering::CCAssignFnForCall(), llvm::AArch64FrameLowering::determineCalleeSaves(), llvm::AArch64TargetLowering::EmitAllocateSMESaveBuffer(), llvm::AArch64TargetLowering::EmitAllocateZABuffer(), llvm::AArch64FrameLowering::emitPrologue(), llvm::AArch64RegisterInfo::getCalleeSavedRegs(), llvm::AArch64TargetLowering::getVaListSizeInBits(), llvm::AArch64TargetLowering::hasInlineStackProbe(), llvm::AArch64RegisterInfo::isArgumentRegister(), isCallingConvWin64(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), llvm::AArch64TargetLowering::preferredShiftLegalizationStrategy(), and windowsRequiresStackProbe().

◆ isWindowsArm64EC()

bool llvm::AArch64Subtarget::isWindowsArm64EC ( ) const
inline

Definition at line 297 of file AArch64Subtarget.h.

References llvm::Triple::isWindowsArm64EC(), and TargetTriple.

Referenced by llvm::AArch64TargetLowering::CCAssignFnForCall(), llvm::AArch64TargetLowering::CCAssignFnForReturn(), classifyGlobalFunctionReference(), llvm::AArch64RegisterInfo::explainReservedReg(), getChkStkName(), llvm::AArch64RegisterInfo::getStrictlyReservedRegs(), and llvm::AArch64CallLowering::lowerCall().

◆ isX16X17Safer()

bool AArch64Subtarget::isX16X17Safer ( ) const

Returns whether the operating system makes it safer to store sensitive values in x16 and x17 as opposed to other registers.

Definition at line 668 of file AArch64Subtarget.cpp.

References isTargetDarwin().

◆ isXRaySupported()

bool llvm::AArch64Subtarget::isXRaySupported ( ) const
inlineoverride

Definition at line 174 of file AArch64Subtarget.h.

◆ isXRegCustomCalleeSaved()

bool llvm::AArch64Subtarget::isXRegCustomCalleeSaved ( size_t  i) const
inline

Definition at line 241 of file AArch64Subtarget.h.

References CustomCallSavedXRegs.

Referenced by llvm::AArch64RegisterInfo::UpdateCustomCalleeSavedRegs(), and llvm::AArch64RegisterInfo::UpdateCustomCallPreservedMask().

◆ isXRegisterReserved()

bool llvm::AArch64Subtarget::isXRegisterReserved ( size_t  i) const
inline

Definition at line 232 of file AArch64Subtarget.h.

References ReserveXRegister.

Referenced by llvm::AArch64RegisterInfo::getStrictlyReservedRegs(), llvm::AArch64RegisterInfo::getUserReservedRegs(), and llvm::AArch64FunctionInfo::needsShadowCallStackPrologueEpilogue().

◆ isXRegisterReservedForRA()

bool llvm::AArch64Subtarget::isXRegisterReservedForRA ( size_t  i) const
inline

Definition at line 233 of file AArch64Subtarget.h.

References ReserveXRegisterForRA.

Referenced by llvm::AArch64RegisterInfo::getReservedRegs().

◆ mirFileLoaded()

void AArch64Subtarget::mirFileLoaded ( MachineFunction &  MF) const
override

Definition at line 609 of file AArch64Subtarget.cpp.

References llvm::MachineFrameInfo::computeMaxCallFrameSize(), llvm::MachineFunction::getFrameInfo(), and llvm::MachineFrameInfo::isMaxCallFrameSizeComputed().

◆ overrideSchedPolicy()

void AArch64Subtarget::overrideSchedPolicy ( MachineSchedPolicy &  Policy,
const SchedRegion &  Region 
) const
override

Definition at line 536 of file AArch64Subtarget.cpp.

References llvm::MachineSchedPolicy::DisableLatencyHeuristic, llvm::MachineSchedPolicy::OnlyBottomUp, and llvm::MachineSchedPolicy::OnlyTopDown.

◆ ParseSubtargetFeatures()

void llvm::AArch64Subtarget::ParseSubtargetFeatures ( StringRef  CPU,
StringRef  TuneCPU,
StringRef  FS 
)

ParseSubtargetFeatures - Parses features string setting specified subtarget options.

Definition of function is auto generated by tblgen.

◆ supportsAddressTopByteIgnored()

bool AArch64Subtarget::supportsAddressTopByteIgnored ( ) const

CPU has TBI (top byte of addresses is ignored during HW address translation) and OS enables it.

Definition at line 591 of file AArch64Subtarget.cpp.

References llvm::Triple::getiOSVersion(), llvm::Triple::isDriverKit(), llvm::Triple::isiOS(), TargetTriple, and UseAddressTopByteIgnored.

Referenced by performLOADCombine(), and performSTORECombine().

◆ swiftAsyncContextIsDynamicallySet()

bool llvm::AArch64Subtarget::swiftAsyncContextIsDynamicallySet ( ) const
inline

Return whether FrameLowering should always set the "extended frame present" bit in FP, or set it based on a symbol in the runtime.

Definition at line 381 of file AArch64Subtarget.h.

References llvm::Triple::Darwin, getTargetTriple(), llvm::Triple::IOS, llvm::Triple::MacOSX, llvm::Triple::TvOS, and llvm::Triple::WatchOS.

Referenced by llvm::AArch64FrameLowering::emitPrologue().

◆ useAA()

bool AArch64Subtarget::useAA ( ) const
override

Definition at line 619 of file AArch64Subtarget.cpp.

References UseAA.

Referenced by addrSinkUsingGEPs().

◆ useDFAforSMS()

bool llvm::AArch64Subtarget::useDFAforSMS ( ) const
inlineoverride

Definition at line 164 of file AArch64Subtarget.h.

◆ useScalarIncVL()

bool AArch64Subtarget::useScalarIncVL ( ) const

Returns true to use the addvl/inc/dec instructions, as opposed to separate add + cnt instructions.

Definition at line 621 of file AArch64Subtarget.cpp.

References llvm::cl::Option::getNumOccurrences(), and UseScalarIncVL.

◆ useSmallAddressing()

bool llvm::AArch64Subtarget::useSmallAddressing ( ) const
inline

Definition at line 316 of file AArch64Subtarget.h.

References llvm::TargetMachine::getCodeModel(), llvm::TargetLoweringBase::getTargetMachine(), llvm::CodeModel::Kernel, llvm::CodeModel::Small, and TLInfo.

Referenced by ClassifyGlobalReference().

◆ useSVEForFixedLengthVectors() [1/2]

bool llvm::AArch64Subtarget::useSVEForFixedLengthVectors ( ) const
inline

Definition at line 430 of file AArch64Subtarget.h.

References getMinSVEVectorSizeInBits(), isNeonAvailable(), and isSVEorStreamingSVEAvailable().

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::AArch64TTIImpl::areTypesABICompatible(), llvm::AArch64TTIImpl::getCastInstrCost(), llvm::AArch64TargetLowering::getNumRegistersForCallingConv(), llvm::AArch64TTIImpl::getRegisterBitWidth(), llvm::AArch64TargetLowering::getRegisterTypeForCallingConv(), llvm::AArch64TargetLowering::getVectorTypeBreakdownForCallingConv(), llvm::AArch64TargetLowering::isLegalInterleavedAccessType(), llvm::AArch64TargetLowering::mergeStoresAfterLegalization(), llvm::AArch64TargetLowering::optimizeExtendOrTruncateConversion(), performFPExtendCombine(), performSTORECombine(), llvm::AArch64TTIImpl::useNeonVector(), useSVEForFixedLengthVectors(), and llvm::AArch64TargetLowering::useSVEForFixedLengthVectorVT().

◆ useSVEForFixedLengthVectors() [2/2]

bool llvm::AArch64Subtarget::useSVEForFixedLengthVectors ( EVT  VT) const
inline

Definition at line 438 of file AArch64Subtarget.h.

References llvm::EVT::getFixedSizeInBits(), llvm::EVT::isFixedLengthVector(), isNeonAvailable(), llvm::AArch64::SVEBitsPerBlock, and useSVEForFixedLengthVectors().

Member Data Documentation

◆ ARMProcFamily

ARMProcFamilyEnum llvm::AArch64Subtarget::ARMProcFamily = Generic
protected

ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others.

Definition at line 49 of file AArch64Subtarget.h.

Referenced by getProcFamily().

◆ CacheLineSize

uint16_t llvm::AArch64Subtarget::CacheLineSize = 0
protected

Definition at line 62 of file AArch64Subtarget.h.

Referenced by getCacheLineSize().

◆ CallLoweringInfo

std::unique_ptr<CallLowering> llvm::AArch64Subtarget::CallLoweringInfo
protected

GlobalISel related APIs.

Definition at line 105 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and getCallLowering().

◆ CustomCallSavedXRegs

BitVector llvm::AArch64Subtarget::CustomCallSavedXRegs
protected

Definition at line 82 of file AArch64Subtarget.h.

Referenced by hasCustomCallingConv(), and isXRegCustomCalleeSaved().

◆ DefaultSVETFOpts

TailFoldingOpts llvm::AArch64Subtarget::DefaultSVETFOpts = TailFoldingOpts::Disabled
protected

Definition at line 92 of file AArch64Subtarget.h.

Referenced by getSVETailFoldingDefaultOpts().

◆ EnableSubregLiveness

bool llvm::AArch64Subtarget::EnableSubregLiveness
protected

Definition at line 94 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and enableSubRegLiveness().

◆ EpilogueVectorizationMinVF

unsigned llvm::AArch64Subtarget::EpilogueVectorizationMinVF = 16
protected

Definition at line 59 of file AArch64Subtarget.h.

Referenced by getEpilogueVectorizationMinVF().

◆ FrameLowering

AArch64FrameLowering llvm::AArch64Subtarget::FrameLowering
protected

Definition at line 99 of file AArch64Subtarget.h.

Referenced by getFrameLowering().

◆ GatherOverhead

unsigned llvm::AArch64Subtarget::GatherOverhead = 10
protected

Definition at line 65 of file AArch64Subtarget.h.

Referenced by getGatherOverhead().

◆ InlineAsmLoweringInfo

std::unique_ptr<InlineAsmLowering> llvm::AArch64Subtarget::InlineAsmLoweringInfo
protected

Definition at line 106 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and getInlineAsmLowering().

◆ InstrInfo

AArch64InstrInfo llvm::AArch64Subtarget::InstrInfo
protected

Definition at line 100 of file AArch64Subtarget.h.

Referenced by getInstrInfo().

◆ InstSelector

std::unique_ptr<InstructionSelector> llvm::AArch64Subtarget::InstSelector
protected

Definition at line 107 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and getInstructionSelector().

◆ IsLittle

bool llvm::AArch64Subtarget::IsLittle
protected

Definition at line 84 of file AArch64Subtarget.h.

Referenced by isLittleEndian().

◆ IsStreaming

bool llvm::AArch64Subtarget::IsStreaming
protected

Definition at line 86 of file AArch64Subtarget.h.

Referenced by isStreaming().

◆ IsStreamingCompatible

bool llvm::AArch64Subtarget::IsStreamingCompatible
protected

Definition at line 87 of file AArch64Subtarget.h.

Referenced by isStreamingCompatible().

◆ Legalizer

std::unique_ptr<LegalizerInfo> llvm::AArch64Subtarget::Legalizer
protected

Definition at line 108 of file AArch64Subtarget.h.

◆ MaxBytesForLoopAlignment

unsigned llvm::AArch64Subtarget::MaxBytesForLoopAlignment = 0
protected

Definition at line 71 of file AArch64Subtarget.h.

Referenced by getMaxBytesForLoopAlignment().

◆ MaxInterleaveFactor

uint8_t llvm::AArch64Subtarget::MaxInterleaveFactor = 2
protected

Definition at line 60 of file AArch64Subtarget.h.

Referenced by getMaxInterleaveFactor().

◆ MaxJumpTableSize

unsigned llvm::AArch64Subtarget::MaxJumpTableSize = 0
protected

Definition at line 73 of file AArch64Subtarget.h.

Referenced by getMaximumJumpTableSize().

◆ MaxPrefetchIterationsAhead

unsigned llvm::AArch64Subtarget::MaxPrefetchIterationsAhead = UINT_MAX
protected

Definition at line 68 of file AArch64Subtarget.h.

Referenced by getMaxPrefetchIterationsAhead().

◆ MaxSVEVectorSizeInBits

unsigned llvm::AArch64Subtarget::MaxSVEVectorSizeInBits
protected

Definition at line 90 of file AArch64Subtarget.h.

Referenced by getMaxSVEVectorSizeInBits(), and getSVEVectorSizeInBits().

◆ MinimumJumpTableEntries

unsigned llvm::AArch64Subtarget::MinimumJumpTableEntries = 4
protected

Definition at line 72 of file AArch64Subtarget.h.

Referenced by getMinimumJumpTableEntries().

◆ MinPrefetchStride

uint16_t llvm::AArch64Subtarget::MinPrefetchStride = 1
protected

Definition at line 67 of file AArch64Subtarget.h.

Referenced by getMinPrefetchStride().

◆ MinSVEVectorSizeInBits

unsigned llvm::AArch64Subtarget::MinSVEVectorSizeInBits
protected

Definition at line 89 of file AArch64Subtarget.h.

Referenced by getMinSVEVectorSizeInBits(), and getSVEVectorSizeInBits().

◆ MinVectorRegisterBitWidth

unsigned llvm::AArch64Subtarget::MinVectorRegisterBitWidth = 64
protected

Definition at line 52 of file AArch64Subtarget.h.

Referenced by getMinVectorRegisterBitWidth().

◆ PrefetchDistance

uint16_t llvm::AArch64Subtarget::PrefetchDistance = 0
protected

Definition at line 66 of file AArch64Subtarget.h.

Referenced by getPrefetchDistance().

◆ PrefFunctionAlignment

Align llvm::AArch64Subtarget::PrefFunctionAlignment
protected

Definition at line 69 of file AArch64Subtarget.h.

Referenced by getPrefFunctionAlignment().

◆ PrefLoopAlignment

Align llvm::AArch64Subtarget::PrefLoopAlignment
protected

Definition at line 70 of file AArch64Subtarget.h.

Referenced by getPrefLoopAlignment().

◆ RegBankInfo

std::unique_ptr<RegisterBankInfo> llvm::AArch64Subtarget::RegBankInfo
protected

Definition at line 109 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and getRegBankInfo().

◆ ReserveXRegister

BitVector llvm::AArch64Subtarget::ReserveXRegister
protected

Definition at line 76 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), getNumXRegisterReserved(), and isXRegisterReserved().

◆ ReserveXRegisterForRA

BitVector llvm::AArch64Subtarget::ReserveXRegisterForRA
protected

Definition at line 79 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), getNumXRegisterReserved(), and isXRegisterReservedForRA().

◆ ScatterOverhead

unsigned llvm::AArch64Subtarget::ScatterOverhead = 10
protected

Definition at line 64 of file AArch64Subtarget.h.

Referenced by getScatterOverhead().

◆ StreamingHazardSize

std::optional<unsigned> llvm::AArch64Subtarget::StreamingHazardSize
protected

Definition at line 88 of file AArch64Subtarget.h.

Referenced by getStreamingHazardSize().

◆ TargetTriple

Triple llvm::AArch64Subtarget::TargetTriple
protected

TargetTriple - What processor and OS we're targeting.

Definition at line 97 of file AArch64Subtarget.h.

Referenced by getTargetTriple(), isTargetAndroid(), isTargetCOFF(), isTargetDarwin(), isTargetELF(), isTargetFuchsia(), isTargetILP32(), isTargetIOS(), isTargetLinux(), isTargetMachO(), isTargetWindows(), isWindowsArm64EC(), and supportsAddressTopByteIgnored().

◆ TLInfo

AArch64TargetLowering llvm::AArch64Subtarget::TLInfo
protected

Definition at line 102 of file AArch64Subtarget.h.

Referenced by getTargetLowering(), and useSmallAddressing().

◆ TSInfo

AArch64SelectionDAGInfo llvm::AArch64Subtarget::TSInfo
protected

Definition at line 101 of file AArch64Subtarget.h.

Referenced by getSelectionDAGInfo().

◆ VectorInsertExtractBaseCost

uint8_t llvm::AArch64Subtarget::VectorInsertExtractBaseCost = 2
protected

Definition at line 61 of file AArch64Subtarget.h.

Referenced by getVectorInsertExtractBaseCost().

◆ VScaleForTuning

unsigned llvm::AArch64Subtarget::VScaleForTuning = 1
protected

Definition at line 91 of file AArch64Subtarget.h.

Referenced by getVScaleForTuning().

The documentation for this class was generated from the following files:
Generated on Sat Aug 30 2025 14:02:09 for LLVM by doxygen 1.9.6