This class provides access to building LLVM's passes. More...

#include "llvm/Passes/CodeGenPassBuilder.h"

Inheritance diagram for llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >:

Classes
class	AddIRPass
class	AddMachinePass

Public Member Functions
	CodeGenPassBuilder (TargetMachineT &TM, const CGPassBuilderOption &Opts, PassInstrumentationCallbacks *PIC)
Error	buildPipeline (ModulePassManager &MPM, raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut, CodeGenFileType FileType) const
PassInstrumentationCallbacks *	getPassInstrumentationCallbacks () const

Protected Types
template<typename PassT>
using	is_module_pass_t
template<typename PassT>
using	is_function_pass_t
template<typename PassT>
using	is_machine_function_pass_t
using	CreateMCStreamer

Protected Member Functions
template<typename TMC>
TMC &	getTM () const
CodeGenOptLevel	getOptLevel () const
bool	isGlobalISelAbortEnabled () const
	Check whether or not GlobalISel should abort on error.
bool	reportDiagnosticWhenGlobalISelFallback () const
	Check whether or not a diagnostic should be emitted when GlobalISel uses the fallback path.
Error	addInstSelector (AddMachinePass &) const
	addInstSelector - This method should install an instruction selector pass, which converts from LLVM code to machine instructions.
void	addGlobalMergePass (AddIRPass &) const
	Target can override this to add GlobalMergePass before all IR passes.
void	addILPOpts (AddMachinePass &) const
	Add passes that optimize instruction level parallelism for out-of-order targets.
void	addPreRegAlloc (AddMachinePass &) const
	This method may be implemented by targets that want to run passes immediately before register allocation.
void	addPreRewrite (AddMachinePass &) const
	addPreRewrite - Add passes to the optimized register allocation pipeline after register allocation is complete, but before virtual registers are rewritten to physical registers.
void	addPostRewrite (AddMachinePass &) const
	Add passes to be run immediately after virtual registers are rewritten to physical registers.
void	addPostRegAlloc (AddMachinePass &) const
	This method may be implemented by targets that want to run passes after register allocation pass pipeline but before prolog-epilog insertion.
void	addPreSched2 (AddMachinePass &) const
	This method may be implemented by targets that want to run passes after prolog-epilog insertion and before the second instruction scheduling pass.
void	addPreEmitPass (AddMachinePass &) const
	This pass may be implemented by targets that want to run passes immediately before machine code is emitted.
void	addPreEmitPass2 (AddMachinePass &) const
	Targets may add passes immediately before machine code is emitted in this callback.
void	addPreISel (AddIRPass &) const
	{{@ For GlobalISel
Error	addIRTranslator (AddMachinePass &) const
	This method should install an IR translator pass, which converts from LLVM code to machine instructions with possibly generic opcodes.
void	addPreLegalizeMachineIR (AddMachinePass &) const
	This method may be implemented by targets that want to run passes immediately before legalization.
Error	addLegalizeMachineIR (AddMachinePass &) const
	This method should install a legalize pass, which converts the instruction sequence into one that can be selected by the target.
void	addPreRegBankSelect (AddMachinePass &) const
	This method may be implemented by targets that want to run passes immediately before the register bank selection.
Error	addRegBankSelect (AddMachinePass &) const
	This method should install a register bank selector pass, which assigns register banks to virtual registers without a register class or register banks.
void	addPreGlobalInstructionSelect (AddMachinePass &) const
	This method may be implemented by targets that want to run passes immediately before the (global) instruction selection.
Error	addGlobalInstructionSelect (AddMachinePass &) const
	This method should install a (global) instruction selector pass, which converts possibly generic instructions to fully target-specific instructions, thereby constraining all generic virtual registers to register classes.
void	addISelPasses (AddIRPass &) const
	High level function that adds all passes necessary to go from llvm IR representation to the MI representation.
Error	addCoreISelPasses (AddMachinePass &) const
	Add the actual instruction selection passes.
Error	addMachinePasses (AddMachinePass &) const
	Add the complete, standard set of LLVM CodeGen passes.
void	addPassesToHandleExceptions (AddIRPass &) const
	Add passes to lower exception handling for the code generator.
void	addIRPasses (AddIRPass &) const
	Add common target configurable passes that perform LLVM IR to IR transforms following machine independent optimization.
void	addCodeGenPrepare (AddIRPass &) const
	Add pass to prepare the LLVM IR for code generation.
void	addISelPrepare (AddIRPass &) const
	Add common passes that perform LLVM IR to IR transforms in preparation for instruction selection.
void	addMachineSSAOptimization (AddMachinePass &) const
	Methods with trivial inline returns are convenient points in the common codegen pass pipeline where targets may insert passes.
Error	addFastRegAlloc (AddMachinePass &) const
	addFastRegAlloc - Add the minimum set of target-independent passes that are required for fast register allocation.
void	addOptimizedRegAlloc (AddMachinePass &) const
	addOptimizedRegAlloc - Add passes related to register allocation.
void	addMachineLateOptimization (AddMachinePass &) const
	Add passes that optimize machine instructions after register allocation.
void	addGCPasses (AddMachinePass &) const
	addGCPasses - Add late codegen passes that analyze code for garbage collection.
void	addBlockPlacement (AddMachinePass &) const
	Add standard basic block placement passes.
void	addAsmPrinter (AddMachinePass &, CreateMCStreamer) const
void	addTargetRegisterAllocator (AddMachinePass &, bool Optimized) const
	Utilities for targets to add passes to the pass manager.
void	addRegAllocPass (AddMachinePass &, bool Optimized) const
	addMachinePasses helper to create the target-selected or overriden regalloc pass.
Error	addRegAssignmentFast (AddMachinePass &) const
	Add core register alloator passes which do the actual register assignment and rewriting.
Error	addRegAssignmentOptimized (AddMachinePass &) const
template<typename... PassTs>
void	disablePass ()
	Allow the target to disable a specific pass by default.
template<typename TargetPassT, typename InsertedPassT>
void	insertPass (InsertedPassT &&Pass) const
	Insert InsertedPass pass after TargetPass pass.

Protected Attributes
TargetMachineT &	TM
CGPassBuilderOption	Opt
PassInstrumentationCallbacks *	PIC

Detailed Description

template<typename DerivedT, typename TargetMachineT>
class llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >

This class provides access to building LLVM's passes.

Its members provide the baseline state available to passes during their construction. The MachinePassRegistry.def file specifies how to construct all of the built-in passes, and those may reference these members during construction.

Definition at line 167 of file CodeGenPassBuilder.h.

Member Typedef Documentation

◆ CreateMCStreamer

template<typename DerivedT, typename TargetMachineT>

using llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::CreateMCStreamer

protected

Initial value:

std::function<Expected<std::unique_ptr<MCStreamer>>(MCContext &)>

llvm::MCContext

Context object for machine code objects.

Definition MCContext.h:83

Definition at line 550 of file CodeGenPassBuilder.h.

◆ is_function_pass_t

template<typename DerivedT, typename TargetMachineT>

template<typename PassT>

using llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::is_function_pass_t

protected

Initial value:

decltype(std::declval<PassT &>().run(

std::declval<Function &>(), std::declval<FunctionAnalysisManager &>()))

Definition at line 206 of file CodeGenPassBuilder.h.

◆ is_machine_function_pass_t

template<typename DerivedT, typename TargetMachineT>

template<typename PassT>

using llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::is_machine_function_pass_t

protected

Initial value:

 decltype(std::declval<PassT &>().run(
      std::declval<MachineFunction &>(),
      std::declval<MachineFunctionAnalysisManager &>()))

Definition at line 210 of file CodeGenPassBuilder.h.

◆ is_module_pass_t

template<typename DerivedT, typename TargetMachineT>

template<typename PassT>

using llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::is_module_pass_t

protected

Initial value:

decltype(std::declval<PassT &>().run(

std::declval<Module &>(), std::declval<ModuleAnalysisManager &>()))

Definition at line 202 of file CodeGenPassBuilder.h.

Constructor & Destructor Documentation

◆ CodeGenPassBuilder()

template<typename DerivedT, typename TargetMachineT>

llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::CodeGenPassBuilder	(	TargetMachineT &	TM,
		const CGPassBuilderOption &	Opts,
		PassInstrumentationCallbacks *	PIC )

inlineexplicit

Definition at line 169 of file CodeGenPassBuilder.h.

Member Function Documentation

◆ addAsmPrinter()

template<typename DerivedT, typename TargetMachineT>

void llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::addAsmPrinter	(	AddMachinePass &	,
		CreateMCStreamer	) const

inlineprotected

Definition at line 552 of file CodeGenPassBuilder.h.

◆ addBlockPlacement()

template<typename Derived, typename TargetMachineT>

void llvm::CodeGenPassBuilder< Derived, TargetMachineT >::addBlockPlacement ( AddMachinePass & addPass ) const

protected

Add standard basic block placement passes.

Definition at line 1330 of file CodeGenPassBuilder.h.

References Opt.

◆ addCodeGenPrepare()

template<typename Derived, typename TargetMachineT>

void llvm::CodeGenPassBuilder< Derived, TargetMachineT >::addCodeGenPrepare ( AddIRPass & addPass ) const

protected

Add pass to prepare the LLVM IR for code generation.

This should be done before exception handling preparation passes.

Definition at line 871 of file CodeGenPassBuilder.h.

References getOptLevel(), llvm::None, Opt, and TM.

◆ addCoreISelPasses()

template<typename Derived, typename TargetMachineT>

Error llvm::CodeGenPassBuilder< Derived, TargetMachineT >::addCoreISelPasses ( AddMachinePass & addPass ) const

protected

Add the actual instruction selection passes.

This does not include preparation passes on IR.

Definition at line 909 of file CodeGenPassBuilder.h.

References addGlobalInstructionSelect(), addInstSelector(), addIRTranslator(), addLegalizeMachineIR(), addRegBankSelect(), isGlobalISelAbortEnabled(), llvm::None, Opt, reportDiagnosticWhenGlobalISelFallback(), llvm::Error::success(), and TM.

Referenced by buildPipeline().

◆ addFastRegAlloc()

template<typename Derived, typename TargetMachineT>

Error llvm::CodeGenPassBuilder< Derived, TargetMachineT >::addFastRegAlloc ( AddMachinePass & addPass ) const

protected

addFastRegAlloc - Add the minimum set of target-independent passes that are required for fast register allocation.

Add the minimum set of target-independent passes that are required for register allocation.

No coalescing or scheduling.

Definition at line 1234 of file CodeGenPassBuilder.h.

Referenced by addMachinePasses().

◆ addGCPasses()

template<typename DerivedT, typename TargetMachineT>

void llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::addGCPasses ( AddMachinePass & ) const

inlineprotected

addGCPasses - Add late codegen passes that analyze code for garbage collection.

This should return true if GC info should be printed after these passes.

Definition at line 545 of file CodeGenPassBuilder.h.

◆ addGlobalInstructionSelect()

template<typename DerivedT, typename TargetMachineT>

Error llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::addGlobalInstructionSelect ( AddMachinePass & ) const

inlineprotected

This method should install a (global) instruction selector pass, which converts possibly generic instructions to fully target-specific instructions, thereby constraining all generic virtual registers to register classes.

Definition at line 483 of file CodeGenPassBuilder.h.

Referenced by addCoreISelPasses().

◆ addGlobalMergePass()

template<typename DerivedT, typename TargetMachineT>

void llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::addGlobalMergePass ( AddIRPass & ) const

inlineprotected

Target can override this to add GlobalMergePass before all IR passes.

Definition at line 385 of file CodeGenPassBuilder.h.

◆ addILPOpts()

template<typename DerivedT, typename TargetMachineT>

void llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::addILPOpts ( AddMachinePass & ) const

inlineprotected

Add passes that optimize instruction level parallelism for out-of-order targets.

These passes are run while the machine code is still in SSA form, so they can use MachineTraceMetrics to control their heuristics.

All passes added here should preserve the MachineDominatorTree, MachineLoopInfo, and MachineTraceMetrics analyses.

Definition at line 393 of file CodeGenPassBuilder.h.

◆ addInstSelector()

template<typename DerivedT, typename TargetMachineT>

Error llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::addInstSelector ( AddMachinePass & ) const

inlineprotected

addInstSelector - This method should install an instruction selector pass, which converts from LLVM code to machine instructions.

Definition at line 379 of file CodeGenPassBuilder.h.

Referenced by addCoreISelPasses().

◆ addIRPasses()

template<typename Derived, typename TargetMachineT>

void llvm::CodeGenPassBuilder< Derived, TargetMachineT >::addIRPasses ( AddIRPass & addPass ) const

protected

Add common target configurable passes that perform LLVM IR to IR transforms following machine independent optimization.

Definition at line 751 of file CodeGenPassBuilder.h.

References llvm::createFunctionToLoopPassAdaptor(), getOptLevel(), llvm::None, Opt, and TM.

◆ addIRTranslator()

template<typename DerivedT, typename TargetMachineT>

Error llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::addIRTranslator ( AddMachinePass & ) const

inlineprotected

This method should install an IR translator pass, which converts from LLVM code to machine instructions with possibly generic opcodes.

Definition at line 447 of file CodeGenPassBuilder.h.

Referenced by addCoreISelPasses().

◆ addISelPasses()

template<typename Derived, typename TargetMachineT>

void llvm::CodeGenPassBuilder< Derived, TargetMachineT >::addISelPasses ( AddIRPass & addPass ) const

protected

High level function that adds all passes necessary to go from llvm IR representation to the MI representation.

Adds IR based lowering and target specific optimization passes and finally the core instruction selection passes.

Definition at line 732 of file CodeGenPassBuilder.h.

References addPassesToHandleExceptions(), getOptLevel(), and TM.

Referenced by buildPipeline().

◆ addISelPrepare()

template<typename Derived, typename TargetMachineT>

void llvm::CodeGenPassBuilder< Derived, TargetMachineT >::addISelPrepare ( AddIRPass & addPass ) const

protected

Add common passes that perform LLVM IR to IR transforms in preparation for instruction selection.

Definition at line 882 of file CodeGenPassBuilder.h.

References llvm::dbgs(), getOptLevel(), llvm::None, Opt, llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::AddIRPass::requireCGSCCOrder(), and TM.

◆ addLegalizeMachineIR()

template<typename DerivedT, typename TargetMachineT>

Error llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::addLegalizeMachineIR ( AddMachinePass & ) const

inlineprotected

This method should install a legalize pass, which converts the instruction sequence into one that can be selected by the target.

Definition at line 458 of file CodeGenPassBuilder.h.

Referenced by addCoreISelPasses().

◆ addMachineLateOptimization()

template<typename Derived, typename TargetMachineT>

void llvm::CodeGenPassBuilder< Derived, TargetMachineT >::addMachineLateOptimization ( AddMachinePass & addPass ) const

protected

Add passes that optimize machine instructions after register allocation.

Post RegAlloc Pass Configuration.

Add passes that optimize machine instructions after register allocation.

Definition at line 1309 of file CodeGenPassBuilder.h.

References Opt, and TM.

◆ addMachinePasses()

template<typename Derived, typename TargetMachineT>

Error llvm::CodeGenPassBuilder< Derived, TargetMachineT >::addMachinePasses ( AddMachinePass & addPass ) const

protected

Add the complete, standard set of LLVM CodeGen passes.

Add the complete set of target-independent postISel code generator passes.

Fully developed targets will not generally override this.

This can be read as the standard order of major LLVM CodeGen stages. Stages with nontrivial configuration or multiple passes are broken out below in addStage routines.

Any CodeGenPassBuilder<Derived, TargetMachine>::addXX routine may be overriden by the Target. The addPre/Post methods with empty header implementations allow injecting target-specific fixups just before or after major stages. Additionally, targets have the flexibility to change pass order within a stage by overriding default implementation of addStage routines below. Each technique has maintainability tradeoffs because alternate pass orders are not well supported. addPre/Post works better if the target pass is easily tied to a common pass. But if it has subtle dependencies on multiple passes, the target should override the stage instead.

Add passes that optimize machine instructions after register allocation.

Definition at line 1002 of file CodeGenPassBuilder.h.

References addFastRegAlloc(), getOptLevel(), getTM(), llvm::NeverOutline, llvm::None, Opt, Options, llvm::Error::success(), llvm::TargetDefault, and TM.

Referenced by buildPipeline().

◆ addMachineSSAOptimization()

template<typename Derived, typename TargetMachineT>

void llvm::CodeGenPassBuilder< Derived, TargetMachineT >::addMachineSSAOptimization ( AddMachinePass & addPass ) const

protected

Methods with trivial inline returns are convenient points in the common codegen pass pipeline where targets may insert passes.

Add passes that optimize machine instructions in SSA form.

Methods with out-of-line standard implementations are major CodeGen stages called by addMachinePasses. Some targets may override major stages when inserting passes is insufficient, but maintaining overriden stages is more work. addMachineSSAOptimization - Add standard passes that optimize machine instructions in SSA form.

Definition at line 1113 of file CodeGenPassBuilder.h.

References Opt.

◆ addOptimizedRegAlloc()

template<typename Derived, typename TargetMachineT>

void llvm::CodeGenPassBuilder< Derived, TargetMachineT >::addOptimizedRegAlloc ( AddMachinePass & addPass ) const

protected

addOptimizedRegAlloc - Add passes related to register allocation.

Add standard target-independent passes that are tightly coupled with optimized register allocation, including coalescing, machine instruction scheduling, and register allocation itself.

CodeGenTargetMachineImpl provides standard regalloc passes for most targets.

Definition at line 1245 of file CodeGenPassBuilder.h.

References addRegAssignmentOptimized(), Opt, and TM.

◆ addPassesToHandleExceptions()

template<typename Derived, typename TargetMachineT>

void llvm::CodeGenPassBuilder< Derived, TargetMachineT >::addPassesToHandleExceptions ( AddIRPass & addPass ) const

protected

Add passes to lower exception handling for the code generator.

Turn exception handling constructs into something the code generators can handle.

Definition at line 824 of file CodeGenPassBuilder.h.

References llvm::AIX, llvm::ARM, assert(), llvm::DwarfCFI, llvm::MCAsmInfo::getExceptionHandlingType(), llvm::None, llvm::SjLj, TM, llvm::Wasm, llvm::WinEH, and llvm::ZOS.

Referenced by addISelPasses().

◆ addPostRegAlloc()

template<typename DerivedT, typename TargetMachineT>

void llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::addPostRegAlloc ( AddMachinePass & ) const

inlineprotected

This method may be implemented by targets that want to run passes after register allocation pass pipeline but before prolog-epilog insertion.

Definition at line 419 of file CodeGenPassBuilder.h.

◆ addPostRewrite()

template<typename DerivedT, typename TargetMachineT>

void llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::addPostRewrite ( AddMachinePass & ) const

inlineprotected

Add passes to be run immediately after virtual registers are rewritten to physical registers.

Definition at line 415 of file CodeGenPassBuilder.h.

◆ addPreEmitPass()

template<typename DerivedT, typename TargetMachineT>

void llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::addPreEmitPass ( AddMachinePass & ) const

inlineprotected

This pass may be implemented by targets that want to run passes immediately before machine code is emitted.

Definition at line 427 of file CodeGenPassBuilder.h.

◆ addPreEmitPass2()

template<typename DerivedT, typename TargetMachineT>

void llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::addPreEmitPass2 ( AddMachinePass & ) const

inlineprotected

Targets may add passes immediately before machine code is emitted in this callback.

This is called even later than addPreEmitPass.

Definition at line 434 of file CodeGenPassBuilder.h.

◆ addPreGlobalInstructionSelect()

template<typename DerivedT, typename TargetMachineT>

void llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::addPreGlobalInstructionSelect ( AddMachinePass & ) const

inlineprotected

This method may be implemented by targets that want to run passes immediately before the (global) instruction selection.

Definition at line 477 of file CodeGenPassBuilder.h.

◆ addPreISel()

template<typename DerivedT, typename TargetMachineT>

void llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::addPreISel ( AddIRPass & ) const

inlineprotected

{{@ For GlobalISel

addPreISel - This method should add any "last minute" LLVM->LLVM passes (which are run just before instruction selector).

Definition at line 441 of file CodeGenPassBuilder.h.

◆ addPreLegalizeMachineIR()

template<typename DerivedT, typename TargetMachineT>

void llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::addPreLegalizeMachineIR ( AddMachinePass & ) const

inlineprotected

This method may be implemented by targets that want to run passes immediately before legalization.

Definition at line 454 of file CodeGenPassBuilder.h.

◆ addPreRegAlloc()

template<typename DerivedT, typename TargetMachineT>

void llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::addPreRegAlloc ( AddMachinePass & ) const

inlineprotected

This method may be implemented by targets that want to run passes immediately before register allocation.

Definition at line 397 of file CodeGenPassBuilder.h.

◆ addPreRegBankSelect()

template<typename DerivedT, typename TargetMachineT>

void llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::addPreRegBankSelect ( AddMachinePass & ) const

inlineprotected

This method may be implemented by targets that want to run passes immediately before the register bank selection.

Definition at line 465 of file CodeGenPassBuilder.h.

◆ addPreRewrite()

template<typename DerivedT, typename TargetMachineT>

void llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::addPreRewrite ( AddMachinePass & ) const

inlineprotected

addPreRewrite - Add passes to the optimized register allocation pipeline after register allocation is complete, but before virtual registers are rewritten to physical registers.

These passes must preserve VirtRegMap and LiveIntervals, and when running after RABasic or RAGreedy, they should take advantage of LiveRegMatrix. When these passes run, VirtRegMap contains legal physreg assignments for all virtual registers.

Note if the target overloads addRegAssignAndRewriteOptimized, this may not be honored. This is also not generally used for the fast variant, where the allocation and rewriting are done in one pass.

Definition at line 411 of file CodeGenPassBuilder.h.

◆ addPreSched2()

template<typename DerivedT, typename TargetMachineT>

void llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::addPreSched2 ( AddMachinePass & ) const

inlineprotected

This method may be implemented by targets that want to run passes after prolog-epilog insertion and before the second instruction scheduling pass.

Definition at line 423 of file CodeGenPassBuilder.h.

◆ addRegAllocPass()

template<typename Derived, typename TargetMachineT>

void llvm::CodeGenPassBuilder< Derived, TargetMachineT >::addRegAllocPass	(	AddMachinePass &	addPass,
		bool	Optimized ) const

protected

addMachinePasses helper to create the target-selected or overriden regalloc pass.

Find and instantiate the register allocation pass requested by this target at the current optimization level.

Different register allocators are defined as separate passes because they may require different analysis.

This helper ensures that the -regalloc-npm= option is always available, even for targets that override the default allocator.

Definition at line 1182 of file CodeGenPassBuilder.h.

References llvm::Default, llvm::Fast, llvm::Greedy, Opt, and llvm::reportFatalUsageError().

Referenced by addRegAssignmentFast(), and addRegAssignmentOptimized().

◆ addRegAssignmentFast()

template<typename Derived, typename TargetMachineT>

Error llvm::CodeGenPassBuilder< Derived, TargetMachineT >::addRegAssignmentFast ( AddMachinePass & addPass ) const

protected

Add core register alloator passes which do the actual register assignment and rewriting.

Returns: true if any passes were added.

Definition at line 1204 of file CodeGenPassBuilder.h.

References addRegAllocPass(), and llvm::Error::success().

◆ addRegAssignmentOptimized()

template<typename Derived, typename TargetMachineT>

Error llvm::CodeGenPassBuilder< Derived, TargetMachineT >::addRegAssignmentOptimized ( AddMachinePass & addPass ) const

protected

Definition at line 1212 of file CodeGenPassBuilder.h.

References addRegAllocPass(), and llvm::Error::success().

Referenced by addOptimizedRegAlloc().

◆ addRegBankSelect()

template<typename DerivedT, typename TargetMachineT>

Error llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::addRegBankSelect ( AddMachinePass & ) const

inlineprotected

This method should install a register bank selector pass, which assigns register banks to virtual registers without a register class or register banks.

Definition at line 470 of file CodeGenPassBuilder.h.

Referenced by addCoreISelPasses().

◆ addTargetRegisterAllocator()

template<typename Derived, typename TargetMachineT>

void llvm::CodeGenPassBuilder< Derived, TargetMachineT >::addTargetRegisterAllocator	(	AddMachinePass &	addPass,
		bool	Optimized ) const

protected

Utilities for targets to add passes to the pass manager.

Register Allocation Pass Configuration.

createTargetRegisterAllocator - Create the register allocator pass for this target at the current optimization level.

Instantiate the default register allocator pass for this target for either the optimized or unoptimized allocation path. This will be added to the pass manager by addFastRegAlloc in the unoptimized case or addOptimizedRegAlloc in the optimized case.

A target that uses the standard regalloc pass order for fast or optimized allocation may still override this for per-target regalloc selection. But -regalloc-npm=... always takes precedence. If a target does not want to allow users to set -regalloc-npm=... at all, check if Opt.RegAlloc == RegAllocType::Unset.

Definition at line 1167 of file CodeGenPassBuilder.h.

◆ buildPipeline()

template<typename Derived, typename TargetMachineT>

Error llvm::CodeGenPassBuilder< Derived, TargetMachineT >::buildPipeline	(	ModulePassManager &	MPM,
		raw_pwrite_stream &	Out,
		raw_pwrite_stream *	DwoOut,
		CodeGenFileType	FileType ) const

Definition at line 622 of file CodeGenPassBuilder.h.

References addCoreISelPasses(), addISelPasses(), addMachinePasses(), llvm::TargetPassConfig::getStartStopInfo(), llvm::Null, Opt, PIC, and llvm::TargetPassConfig::willCompleteCodeGenPipeline().

Referenced by llvm::R600TargetMachine::buildCodeGenPipeline().

◆ disablePass()

template<typename DerivedT, typename TargetMachineT>

template<typename... PassTs>

void llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::disablePass ( )

inlineprotected

Allow the target to disable a specific pass by default.

Backend can declare unwanted passes in constructor.

Definition at line 574 of file CodeGenPassBuilder.h.

◆ getOptLevel()

template<typename DerivedT, typename TargetMachineT>

CodeGenOptLevel llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::getOptLevel ( ) const

inlineprotected

Definition at line 361 of file CodeGenPassBuilder.h.

Referenced by addCodeGenPrepare(), addIRPasses(), addISelPasses(), addISelPrepare(), and addMachinePasses().

◆ getPassInstrumentationCallbacks()

template<typename DerivedT, typename TargetMachineT>

PassInstrumentationCallbacks * llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::getPassInstrumentationCallbacks ( ) const

inline

Definition at line 196 of file CodeGenPassBuilder.h.

◆ getTM()

template<typename DerivedT, typename TargetMachineT>

template<typename TMC>

TMC & llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::getTM ( ) const

inlineprotected

Definition at line 360 of file CodeGenPassBuilder.h.

Referenced by addMachinePasses().

◆ insertPass()

template<typename DerivedT, typename TargetMachineT>

template<typename TargetPassT, typename InsertedPassT>

void llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::insertPass ( InsertedPassT && Pass ) const

inlineprotected

Insert InsertedPass pass after TargetPass pass.

Only machine function passes are supported.

Definition at line 582 of file CodeGenPassBuilder.h.

◆ isGlobalISelAbortEnabled()

template<typename DerivedT, typename TargetMachineT>

bool llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::isGlobalISelAbortEnabled ( ) const

inlineprotected

Check whether or not GlobalISel should abort on error.

When this is disabled, GlobalISel will fall back on SDISel instead of erroring out.

Definition at line 366 of file CodeGenPassBuilder.h.

Referenced by addCoreISelPasses().

◆ reportDiagnosticWhenGlobalISelFallback()

template<typename DerivedT, typename TargetMachineT>

bool llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::reportDiagnosticWhenGlobalISelFallback ( ) const

inlineprotected

Check whether or not a diagnostic should be emitted when GlobalISel uses the fallback path.

In other words, it will emit a diagnostic when GlobalISel failed and isGlobalISelAbortEnabled is false.

Definition at line 373 of file CodeGenPassBuilder.h.

Referenced by addCoreISelPasses().

Member Data Documentation

◆ Opt

template<typename DerivedT, typename TargetMachineT>

CGPassBuilderOption llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::Opt

protected

Definition at line 357 of file CodeGenPassBuilder.h.

Referenced by addBlockPlacement(), addCodeGenPrepare(), addCoreISelPasses(), addIRPasses(), addISelPrepare(), addMachineLateOptimization(), addMachinePasses(), addMachineSSAOptimization(), addOptimizedRegAlloc(), addRegAllocPass(), and buildPipeline().

◆ PIC

template<typename DerivedT, typename TargetMachineT>

PassInstrumentationCallbacks* llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::PIC

protected

Definition at line 358 of file CodeGenPassBuilder.h.

Referenced by buildPipeline().

◆ TM

template<typename DerivedT, typename TargetMachineT>

TargetMachineT& llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >::TM

protected

Definition at line 356 of file CodeGenPassBuilder.h.

Referenced by addCodeGenPrepare(), addCoreISelPasses(), addIRPasses(), addISelPasses(), addISelPrepare(), addMachineLateOptimization(), addMachinePasses(), addOptimizedRegAlloc(), and addPassesToHandleExceptions().

The documentation for this class was generated from the following file:

include/llvm/Passes/CodeGenPassBuilder.h

Classes

Public Member Functions

Protected Types

Protected Member Functions

Protected Attributes

Detailed Description

Member Typedef Documentation

◆ CreateMCStreamer

◆ is_function_pass_t

◆ is_machine_function_pass_t

◆ is_module_pass_t

Constructor & Destructor Documentation

◆ CodeGenPassBuilder()

Member Function Documentation

◆ addAsmPrinter()

◆ addBlockPlacement()

◆ addCodeGenPrepare()

◆ addCoreISelPasses()

◆ addFastRegAlloc()

◆ addGCPasses()

◆ addGlobalInstructionSelect()

◆ addGlobalMergePass()

◆ addILPOpts()

◆ addInstSelector()

◆ addIRPasses()

◆ addIRTranslator()

◆ addISelPasses()

◆ addISelPrepare()

◆ addLegalizeMachineIR()

◆ addMachineLateOptimization()

◆ addMachinePasses()

◆ addMachineSSAOptimization()

◆ addOptimizedRegAlloc()

◆ addPassesToHandleExceptions()

◆ addPostRegAlloc()

◆ addPostRewrite()

◆ addPreEmitPass()

◆ addPreEmitPass2()

◆ addPreGlobalInstructionSelect()

◆ addPreISel()

◆ addPreLegalizeMachineIR()

◆ addPreRegAlloc()

◆ addPreRegBankSelect()

◆ addPreRewrite()

◆ addPreSched2()

◆ addRegAllocPass()

◆ addRegAssignmentFast()

◆ addRegAssignmentOptimized()

◆ addRegBankSelect()

◆ addTargetRegisterAllocator()

◆ buildPipeline()

◆ disablePass()

◆ getOptLevel()

◆ getPassInstrumentationCallbacks()

◆ getTM()

◆ insertPass()

◆ isGlobalISelAbortEnabled()

◆ reportDiagnosticWhenGlobalISelFallback()

Member Data Documentation

◆ Opt

◆ PIC

◆ TM