LLVM 22.0.0git
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#include "Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.h"
Additional Inherited Members | |
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MCCodeEmitter () | |
Definition at line 25 of file PPCMCCodeEmitter.h.
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inline |
Definition at line 31 of file PPCMCCodeEmitter.h.
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Encode the given Inst
to bytes and append to CB
.
Implements llvm::MCCodeEmitter.
Definition at line 498 of file PPCMCCodeEmitter.cpp.
References llvm::big, getBinaryCodeForInstr(), getInstSizeInBytes(), llvm::little, llvm_unreachable, MI, and Size.
unsigned PPCMCCodeEmitter::get_crbitm_encoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 452 of file PPCMCCodeEmitter.cpp.
References assert(), llvm::MCRegisterInfo::getEncodingValue(), llvm::MCOperand::getReg(), llvm::MCContext::getRegisterInfo(), and MI.
unsigned PPCMCCodeEmitter::getAbsCondBrEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 188 of file PPCMCCodeEmitter.cpp.
References llvm::addFixup(), llvm::PPC::fixup_ppc_brcond14abs, llvm::MCOperand::getExpr(), getMachineOpValue(), llvm::MCOperand::isImm(), llvm::MCOperand::isReg(), and MI.
unsigned PPCMCCodeEmitter::getAbsDirectBrEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 176 of file PPCMCCodeEmitter.cpp.
References llvm::addFixup(), llvm::PPC::fixup_ppc_br24abs, llvm::MCOperand::getExpr(), getMachineOpValue(), llvm::MCOperand::isImm(), llvm::MCOperand::isReg(), and MI.
uint64_t llvm::PPCMCCodeEmitter::getBinaryCodeForInstr | ( | const MCInst & | MI, |
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Referenced by encodeInstruction().
unsigned PPCMCCodeEmitter::getCondBrEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 165 of file PPCMCCodeEmitter.cpp.
References llvm::addFixup(), llvm::PPC::fixup_ppc_brcond14, llvm::MCOperand::getExpr(), getMachineOpValue(), llvm::MCOperand::isImm(), llvm::MCOperand::isReg(), and MI.
unsigned PPCMCCodeEmitter::getDirectBrEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 55 of file PPCMCCodeEmitter.cpp.
References llvm::addFixup(), llvm::PPC::fixup_ppc_br24, llvm::PPC::fixup_ppc_br24_notoc, llvm::MCOperand::getExpr(), getMachineOpValue(), llvm::MCOperand::isImm(), isNoTOCCallInstr(), llvm::MCOperand::isReg(), and MI.
Referenced by getTLSCallEncoding().
uint64_t PPCMCCodeEmitter::getDispRI34Encoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 384 of file PPCMCCodeEmitter.cpp.
References getMachineOpValue(), and MI.
uint64_t PPCMCCodeEmitter::getDispRI34PCRelEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 308 of file PPCMCCodeEmitter.cpp.
References llvm::MCBinaryExpr::Add, llvm::addFixup(), assert(), llvm::MCExpr::Binary, llvm::MCExpr::Constant, llvm::PPC::fixup_ppc_pcrel34, llvm::MCOperand::getExpr(), llvm::MCExpr::getKind(), llvm::MCBinaryExpr::getLHS(), getMachineOpValue(), llvm::MCBinaryExpr::getOpcode(), llvm::MCBinaryExpr::getRHS(), llvm::MCSymbolRefExpr::getSpecifier(), llvm::getSpecifier(), llvm::is_contained(), llvm::MCOperand::isExpr(), LHS, llvm_unreachable, MI, RHS, llvm::PPC::S_GOT_PCREL, llvm::PPC::S_GOT_TLSGD_PCREL, llvm::PPC::S_GOT_TLSLD_PCREL, llvm::PPC::S_GOT_TPREL_PCREL, llvm::PPC::S_PCREL, std::swap(), and llvm::MCExpr::SymbolRef.
unsigned PPCMCCodeEmitter::getDispRIEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 249 of file PPCMCCodeEmitter.cpp.
References llvm::addFixup(), llvm::PPC::fixup_ppc_half16, llvm::MCOperand::getExpr(), getMachineOpValue(), llvm::MCOperand::isImm(), and MI.
unsigned PPCMCCodeEmitter::getDispRIHashEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 293 of file PPCMCCodeEmitter.cpp.
References assert(), llvm::MCOperand::getImm(), llvm::MCOperand::isImm(), and MI.
unsigned PPCMCCodeEmitter::getDispRIX16Encoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 276 of file PPCMCCodeEmitter.cpp.
References llvm::addFixup(), assert(), llvm::PPC::fixup_ppc_half16dq, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), getMachineOpValue(), llvm::MCOperand::isImm(), and MI.
unsigned PPCMCCodeEmitter::getDispRIXEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 262 of file PPCMCCodeEmitter.cpp.
References llvm::addFixup(), llvm::PPC::fixup_ppc_half16ds, llvm::MCOperand::getExpr(), getMachineOpValue(), llvm::MCOperand::isImm(), and MI.
unsigned PPCMCCodeEmitter::getDispSPE2Encoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 413 of file PPCMCCodeEmitter.cpp.
References assert(), getMachineOpValue(), llvm::MCOperand::isImm(), and MI.
unsigned PPCMCCodeEmitter::getDispSPE4Encoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 403 of file PPCMCCodeEmitter.cpp.
References assert(), getMachineOpValue(), llvm::MCOperand::isImm(), and MI.
unsigned PPCMCCodeEmitter::getDispSPE8Encoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 393 of file PPCMCCodeEmitter.cpp.
References assert(), getMachineOpValue(), llvm::MCOperand::isImm(), and MI.
unsigned PPCMCCodeEmitter::getImm16Encoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 210 of file PPCMCCodeEmitter.cpp.
References llvm::addFixup(), llvm::PPC::fixup_ppc_half16, llvm::MCOperand::getExpr(), getMachineOpValue(), llvm::MCOperand::isImm(), llvm::MCOperand::isReg(), and MI.
uint64_t PPCMCCodeEmitter::getImm34Encoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI, | ||
MCFixupKind | Fixup | ||
) | const |
Definition at line 221 of file PPCMCCodeEmitter.cpp.
References llvm::addFixup(), assert(), Fixup, llvm::MCOperand::getExpr(), getMachineOpValue(), llvm::MCOperand::isImm(), llvm::MCOperand::isReg(), and MI.
Referenced by getImm34EncodingNoPCRel(), and getImm34EncodingPCRel().
uint64_t PPCMCCodeEmitter::getImm34EncodingNoPCRel | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 236 of file PPCMCCodeEmitter.cpp.
References llvm::PPC::fixup_ppc_imm34, getImm34Encoding(), and MI.
uint64_t PPCMCCodeEmitter::getImm34EncodingPCRel | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 243 of file PPCMCCodeEmitter.cpp.
References llvm::PPC::fixup_ppc_pcrel34, getImm34Encoding(), and MI.
Definition at line 528 of file PPCMCCodeEmitter.cpp.
References llvm::MCInstrInfo::get(), and MI.
Referenced by encodeInstruction().
uint64_t PPCMCCodeEmitter::getMachineOpValue | ( | const MCInst & | MI, |
const MCOperand & | MO, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
getMachineOpValue - Return binary encoding of operand.
If the machine operand requires relocation, record the relocation and return zero.
Definition at line 477 of file PPCMCCodeEmitter.cpp.
References assert(), llvm::MCInstrInfo::get(), llvm::MCRegisterInfo::getEncodingValue(), llvm::MCOperand::getImm(), getOpIdxForMO(), llvm::MCOperand::getReg(), llvm::MCContext::getRegisterInfo(), llvm::PPC::getRegNumForOperand(), llvm::MCOperand::isImm(), llvm::MCOperand::isReg(), and MI.
Referenced by getAbsCondBrEncoding(), getAbsDirectBrEncoding(), getCondBrEncoding(), getDirectBrEncoding(), getDispRI34Encoding(), getDispRI34PCRelEncoding(), getDispRIEncoding(), getDispRIX16Encoding(), getDispRIXEncoding(), getDispSPE2Encoding(), getDispSPE4Encoding(), getDispSPE8Encoding(), getImm16Encoding(), getImm34Encoding(), getTLSRegEncoding(), and getVSRpEvenEncoding().
unsigned PPCMCCodeEmitter::getTLSCallEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 441 of file PPCMCCodeEmitter.cpp.
References llvm::addFixup(), llvm::PPC::fixup_ppc_nofixup, getDirectBrEncoding(), llvm::MCOperand::getExpr(), and MI.
unsigned PPCMCCodeEmitter::getTLSRegEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 422 of file PPCMCCodeEmitter.cpp.
References llvm::addFixup(), llvm::PPC::fixup_ppc_nofixup, llvm::MCRegisterInfo::getEncodingValue(), llvm::MCOperand::getExpr(), getMachineOpValue(), llvm::MCContext::getRegisterInfo(), llvm::getSpecifier(), llvm::MCSubtargetInfo::getTargetTriple(), llvm::MCOperand::isReg(), MI, and llvm::PPC::S_TLS_PCREL.
unsigned PPCMCCodeEmitter::getVSRpEvenEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 201 of file PPCMCCodeEmitter.cpp.
References assert(), getMachineOpValue(), and MI.
Check if Opcode corresponds to a call instruction that should be marked with the NOTOC relocation.
Definition at line 73 of file PPCMCCodeEmitter.cpp.
References llvm::MCInstrInfo::get(), llvm::MCInstrDesc::isCall(), llvm_unreachable, and MI.
Referenced by getDirectBrEncoding().
Definition at line 534 of file PPCMCCodeEmitter.cpp.
References llvm::MCInstrInfo::get(), MI, llvm::PPCII::Prefixed, and llvm::MCInstrDesc::TSFlags.
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