llvm::SIMachineFunctionInfo Class Reference

This class keeps track of the SPI_SP_INPUT_ADDR config register, which tells the hardware which interpolation parameters to load. More...

#include "Target/AMDGPU/SIMachineFunctionInfo.h"

Inheritance diagram for llvm::SIMachineFunctionInfo:

Classes
struct	VGPRSpillToAGPR

Public Member Functions
Register	getVGPRForAGPRCopy () const
void	setVGPRForAGPRCopy (Register NewVGPRForAGPRCopy)
bool	isCalleeSavedReg (const MCPhysReg *CSRegs, MCPhysReg Reg) const
void	setMaskForVGPRBlockOps (Register RegisterBlock, uint32_t Mask)
uint32_t	getMaskForVGPRBlockOps (Register RegisterBlock) const
bool	hasMaskForVGPRBlockOps (Register RegisterBlock) const
	SIMachineFunctionInfo (const SIMachineFunctionInfo &MFI)=default
	SIMachineFunctionInfo (const Function &F, const GCNSubtarget *STI)
MachineFunctionInfo *	clone (BumpPtrAllocator &Allocator, MachineFunction &DestMF, const DenseMap< MachineBasicBlock *, MachineBasicBlock * > &Src2DstMBB) const override
	Make a functionally equivalent copy of this MachineFunctionInfo in MF.
bool	initializeBaseYamlFields (const yaml::SIMachineFunctionInfo &YamlMFI, const MachineFunction &MF, PerFunctionMIParsingState &PFS, SMDiagnostic &Error, SMRange &SourceRange)
void	reserveWWMRegister (Register Reg)
bool	isWWMReg (Register Reg) const
void	updateNonWWMRegMask (BitVector &RegMask)
BitVector	getNonWWMRegMask () const
void	clearNonWWMRegAllocMask ()
SIModeRegisterDefaults	getMode () const
ArrayRef< SIRegisterInfo::SpilledReg >	getSGPRSpillToVirtualVGPRLanes (int FrameIndex) const
ArrayRef< Register >	getSGPRSpillVGPRs () const
ArrayRef< Register >	getSGPRSpillPhysVGPRs () const
const WWMSpillsMap &	getWWMSpills () const
const ReservedRegSet &	getWWMReservedRegs () const
bool	isWWMReservedRegister (Register Reg) const
bool	isWholeWaveFunction () const
ArrayRef< PrologEpilogSGPRSpill >	getPrologEpilogSGPRSpills () const
GCNUserSGPRUsageInfo &	getUserSGPRInfo ()
const GCNUserSGPRUsageInfo &	getUserSGPRInfo () const
void	addToPrologEpilogSGPRSpills (Register Reg, PrologEpilogSGPRSaveRestoreInfo SI)
bool	hasPrologEpilogSGPRSpillEntry (Register Reg) const
Register	getScratchSGPRCopyDstReg (Register Reg) const
void	getAllScratchSGPRCopyDstRegs (SmallVectorImpl< Register > &Regs) const
bool	checkIndexInPrologEpilogSGPRSpills (int FI) const
const PrologEpilogSGPRSaveRestoreInfo &	getPrologEpilogSGPRSaveRestoreInfo (Register Reg) const
ArrayRef< SIRegisterInfo::SpilledReg >	getSGPRSpillToPhysicalVGPRLanes (int FrameIndex) const
void	setFlag (Register Reg, uint8_t Flag)
bool	checkFlag (Register Reg, uint8_t Flag) const
bool	hasVRegFlags ()
void	allocateWWMSpill (MachineFunction &MF, Register VGPR, uint64_t Size=4, Align Alignment=Align(4))
void	splitWWMSpillRegisters (MachineFunction &MF, SmallVectorImpl< std::pair< Register, int > > &CalleeSavedRegs, SmallVectorImpl< std::pair< Register, int > > &ScratchRegs) const
ArrayRef< MCPhysReg >	getAGPRSpillVGPRs () const
Register	getSGPRForEXECCopy () const
void	setSGPRForEXECCopy (Register Reg)
ArrayRef< MCPhysReg >	getVGPRSpillAGPRs () const
MCPhysReg	getVGPRToAGPRSpill (int FrameIndex, unsigned Lane) const
void	setVGPRToAGPRSpillDead (int FrameIndex)
void	shiftWwmVGPRsToLowestRange (MachineFunction &MF, SmallVectorImpl< Register > &WWMVGPRs, BitVector &SavedVGPRs)
bool	allocateSGPRSpillToVGPRLane (MachineFunction &MF, int FI, bool SpillToPhysVGPRLane=false, bool IsPrologEpilog=false)
bool	allocateVGPRSpillToAGPR (MachineFunction &MF, int FI, bool isAGPRtoVGPR)
	Reserve AGPRs or VGPRs to support spilling for FrameIndex FI.
bool	removeDeadFrameIndices (MachineFrameInfo &MFI, bool ResetSGPRSpillStackIDs)
	If ResetSGPRSpillStackIDs is true, reset the stack ID from sgpr-spill to the default stack.
int	getScavengeFI (MachineFrameInfo &MFI, const SIRegisterInfo &TRI)
std::optional< int >	getOptionalScavengeFI () const
unsigned	getBytesInStackArgArea () const
void	setBytesInStackArgArea (unsigned Bytes)
bool	isDynamicVGPREnabled () const
unsigned	getDynamicVGPRBlockSize () const
unsigned	getScratchReservedForDynamicVGPRs () const
void	setScratchReservedForDynamicVGPRs (unsigned SizeInBytes)
Register	addPrivateSegmentBuffer (const SIRegisterInfo &TRI)
Register	addDispatchPtr (const SIRegisterInfo &TRI)
Register	addQueuePtr (const SIRegisterInfo &TRI)
Register	addKernargSegmentPtr (const SIRegisterInfo &TRI)
Register	addDispatchID (const SIRegisterInfo &TRI)
Register	addFlatScratchInit (const SIRegisterInfo &TRI)
Register	addPrivateSegmentSize (const SIRegisterInfo &TRI)
Register	addImplicitBufferPtr (const SIRegisterInfo &TRI)
Register	addLDSKernelId ()
SmallVectorImpl< MCRegister > *	addPreloadedKernArg (const SIRegisterInfo &TRI, const TargetRegisterClass *RC, unsigned AllocSizeDWord, int KernArgIdx, int PaddingSGPRs)
Register	addReservedUserSGPR ()
	Increment user SGPRs used for padding the argument list only.
Register	addWorkGroupIDX ()
Register	addWorkGroupIDY ()
Register	addWorkGroupIDZ ()
Register	addWorkGroupInfo ()
bool	hasLDSKernelId () const
void	setWorkItemIDX (ArgDescriptor Arg)
void	setWorkItemIDY (ArgDescriptor Arg)
void	setWorkItemIDZ (ArgDescriptor Arg)
Register	addPrivateSegmentWaveByteOffset ()
void	setPrivateSegmentWaveByteOffset (Register Reg)
bool	hasWorkGroupIDX () const
bool	hasWorkGroupIDY () const
bool	hasWorkGroupIDZ () const
bool	hasWorkGroupInfo () const
bool	hasPrivateSegmentWaveByteOffset () const
bool	hasWorkItemIDX () const
bool	hasWorkItemIDY () const
bool	hasWorkItemIDZ () const
bool	hasImplicitArgPtr () const
AMDGPUFunctionArgInfo &	getArgInfo ()
const AMDGPUFunctionArgInfo &	getArgInfo () const
std::tuple< const ArgDescriptor *, const TargetRegisterClass *, LLT >	getPreloadedValue (AMDGPUFunctionArgInfo::PreloadedValue Value) const
MCRegister	getPreloadedReg (AMDGPUFunctionArgInfo::PreloadedValue Value) const
unsigned	getGITPtrHigh () const
Register	getGITPtrLoReg (const MachineFunction &MF) const
uint32_t	get32BitAddressHighBits () const
unsigned	getNumUserSGPRs () const
unsigned	getNumPreloadedSGPRs () const
unsigned	getNumKernargPreloadedSGPRs () const
unsigned	getNumWaveDispatchSGPRs () const
void	setNumWaveDispatchSGPRs (unsigned Count)
unsigned	getNumWaveDispatchVGPRs () const
void	setNumWaveDispatchVGPRs (unsigned Count)
Register	getPrivateSegmentWaveByteOffsetSystemSGPR () const
Register	getScratchRSrcReg () const
	Returns the physical register reserved for use as the resource descriptor for scratch accesses.
void	setScratchRSrcReg (Register Reg)
Register	getFrameOffsetReg () const
void	setFrameOffsetReg (Register Reg)
void	setStackPtrOffsetReg (Register Reg)
void	setLongBranchReservedReg (Register Reg)
Register	getStackPtrOffsetReg () const
Register	getLongBranchReservedReg () const
Register	getQueuePtrUserSGPR () const
Register	getImplicitBufferPtrUserSGPR () const
bool	hasSpilledSGPRs () const
void	setHasSpilledSGPRs (bool Spill=true)
bool	hasSpilledVGPRs () const
void	setHasSpilledVGPRs (bool Spill=true)
bool	hasNonSpillStackObjects () const
void	setHasNonSpillStackObjects (bool StackObject=true)
bool	isStackRealigned () const
void	setIsStackRealigned (bool Realigned=true)
unsigned	getNumSpilledSGPRs () const
unsigned	getNumSpilledVGPRs () const
void	addToSpilledSGPRs (unsigned num)
void	addToSpilledVGPRs (unsigned num)
unsigned	getPSInputAddr () const
unsigned	getPSInputEnable () const
bool	isPSInputAllocated (unsigned Index) const
void	markPSInputAllocated (unsigned Index)
void	markPSInputEnabled (unsigned Index)
bool	returnsVoid () const
void	setIfReturnsVoid (bool Value)
std::pair< unsigned, unsigned >	getFlatWorkGroupSizes () const
unsigned	getMinFlatWorkGroupSize () const
unsigned	getMaxFlatWorkGroupSize () const
std::pair< unsigned, unsigned >	getWavesPerEU () const
unsigned	getMinWavesPerEU () const
unsigned	getMaxWavesPerEU () const
const AMDGPUGWSResourcePseudoSourceValue *	getGWSPSV (const AMDGPUTargetMachine &TM)
unsigned	getOccupancy () const
unsigned	getMinAllowedOccupancy () const
void	limitOccupancy (const MachineFunction &MF)
void	limitOccupancy (unsigned Limit)
void	increaseOccupancy (const MachineFunction &MF, unsigned Limit)
unsigned	getMaxMemoryClusterDWords () const
bool	mayNeedAGPRs () const
bool	mayUseAGPRs (const Function &F) const
SmallVector< unsigned >	getMaxNumWorkGroups () const
unsigned	getMaxNumWorkGroupsX () const
unsigned	getMaxNumWorkGroupsY () const
unsigned	getMaxNumWorkGroupsZ () const
Public Member Functions inherited from llvm::AMDGPUMachineFunction
	AMDGPUMachineFunction (const Function &F, const AMDGPUSubtarget &ST)
uint64_t	getExplicitKernArgSize () const
Align	getMaxKernArgAlign () const
uint32_t	getLDSSize () const
uint32_t	getGDSSize () const
void	recordNumNamedBarriers (uint32_t GVAddr, unsigned BarCnt)
uint32_t	getNumNamedBarriers () const
bool	isEntryFunction () const
bool	isModuleEntryFunction () const
bool	isChainFunction () const
bool	isBottomOfStack () const
bool	hasNoSignedZerosFPMath () const
bool	isMemoryBound () const
bool	needsWaveLimiter () const
bool	hasInitWholeWave () const
void	setInitWholeWave ()
unsigned	allocateLDSGlobal (const DataLayout &DL, const GlobalVariable &GV)
unsigned	allocateLDSGlobal (const DataLayout &DL, const GlobalVariable &GV, Align Trailing)
Align	getDynLDSAlign () const
void	setDynLDSAlign (const Function &F, const GlobalVariable &GV)
void	setUsesDynamicLDS (bool DynLDS)
bool	isDynamicLDSUsed () const
Public Member Functions inherited from llvm::MachineFunctionInfo
virtual	~MachineFunctionInfo ()
virtual MachineFunctionInfo *	clone (BumpPtrAllocator &Allocator, MachineFunction &DestMF, const DenseMap< MachineBasicBlock *, MachineBasicBlock * > &Src2DstMBB) const
	Make a functionally equivalent copy of this MachineFunctionInfo in MF.

Friends
class	GCNTargetMachine

Additional Inherited Members
Static Public Member Functions inherited from llvm::AMDGPUMachineFunction
static std::optional< uint32_t >	getLDSKernelIdMetadata (const Function &F)
static std::optional< uint32_t >	getLDSAbsoluteAddress (const GlobalValue &GV)
Static Public Member Functions inherited from llvm::MachineFunctionInfo
template<typename FuncInfoTy , typename SubtargetTy = TargetSubtargetInfo>
static FuncInfoTy *	create (BumpPtrAllocator &Allocator, const Function &F, const SubtargetTy *STI)
	Factory function: default behavior is to call new using the supplied allocator.
template<typename Ty >
static Ty *	create (BumpPtrAllocator &Allocator, const Ty &MFI)
Protected Attributes inherited from llvm::AMDGPUMachineFunction
uint64_t	ExplicitKernArgSize = 0
Align	MaxKernArgAlign
uint32_t	LDSSize = 0
	Number of bytes in the LDS that are being used.
uint32_t	GDSSize = 0
uint32_t	StaticLDSSize = 0
	Number of bytes in the LDS allocated statically.
uint32_t	StaticGDSSize = 0
Align	DynLDSAlign
	Align for dynamic shared memory if any.
bool	UsesDynamicLDS = false
uint32_t	NumNamedBarriers = 0
bool	IsEntryFunction = false
bool	IsModuleEntryFunction = false
bool	IsChainFunction = false
bool	NoSignedZerosFPMath = false
bool	MemoryBound = false
bool	WaveLimiter = false
bool	HasInitWholeWave = false

Detailed Description

This class keeps track of the SPI_SP_INPUT_ADDR config register, which tells the hardware which interpolation parameters to load.

Definition at line 411 of file SIMachineFunctionInfo.h.

Constructor & Destructor Documentation

SIMachineFunctionInfo() [1/2]

llvm::SIMachineFunctionInfo::SIMachineFunctionInfo ( const SIMachineFunctionInfo &  MFI )

default

SIMachineFunctionInfo() [2/2]

SIMachineFunctionInfo::SIMachineFunctionInfo	(	const Function &	F,
		const GCNSubtarget *	STI
	)

Definition at line 47 of file SIMachineFunctionInfo.cpp.

References A, llvm::CallingConv::AMDGPU_CS, llvm::CallingConv::AMDGPU_Gfx, llvm::CallingConv::AMDGPU_Gfx_WholeWave, llvm::CallingConv::AMDGPU_GS, llvm::CallingConv::AMDGPU_HS, llvm::CallingConv::AMDGPU_KERNEL, llvm::CallingConv::AMDGPU_PS, assert(), llvm::StringRef::consumeInteger(), llvm::ArgDescriptor::createRegister(), llvm::DefaultMemoryClusterDWordsLimit, llvm::StringRef::empty(), F, llvm::AMDGPUArgumentUsageInfo::FixedABIFunctionInfo, llvm::AMDGPU::getDynamicVGPRBlockSize(), llvm::AMDGPU::getInitialPSInputAddr(), llvm::AMDGPUMachineFunction::getLDSSize(), llvm::AMDGPUSubtarget::GFX9, llvm::AMDGPU::isChainCC(), llvm::AMDGPUMachineFunction::isEntryFunction(), llvm::AMDGPU::isGraphics(), llvm::AMDGPUMachineFunction::MaxKernArgAlign, mayUseAGPRs(), MFMAVGPRForm, llvm::SmallVectorBase< Size_T >::size(), and llvm::CallingConv::SPIR_KERNEL.

Member Function Documentation

addDispatchID()

Register SIMachineFunctionInfo::addDispatchID

(

const SIRegisterInfo &

TRI

)

Definition at line 244 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), and TRI.

addDispatchPtr()

Register SIMachineFunctionInfo::addDispatchPtr

(

const SIRegisterInfo &

TRI

)

Definition at line 222 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), and TRI.

addFlatScratchInit()

Register SIMachineFunctionInfo::addFlatScratchInit

(

const SIRegisterInfo &

TRI

)

Definition at line 251 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), and TRI.

addImplicitBufferPtr()

Register SIMachineFunctionInfo::addImplicitBufferPtr

(

const SIRegisterInfo &

TRI

)

Definition at line 264 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), and TRI.

addKernargSegmentPtr()

Register SIMachineFunctionInfo::addKernargSegmentPtr

(

const SIRegisterInfo &

TRI

)

Definition at line 236 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), and TRI.

addLDSKernelId()

Register SIMachineFunctionInfo::addLDSKernelId

(

)

Definition at line 271 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister().

addPreloadedKernArg()

SmallVectorImpl< MCRegister > * SIMachineFunctionInfo::addPreloadedKernArg	(	const SIRegisterInfo &	TRI,
		const TargetRegisterClass *	RC,
		unsigned	AllocSizeDWord,
		int	KernArgIdx,
		int	PaddingSGPRs
	)

Definition at line 277 of file SIMachineFunctionInfo.cpp.

References llvm::GCNUserSGPRUsageInfo::allocKernargPreloadSGPRs(), assert(), I, and TRI.

addPrivateSegmentBuffer()

Register SIMachineFunctionInfo::addPrivateSegmentBuffer

(

const SIRegisterInfo &

TRI

)

Definition at line 213 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), and TRI.

addPrivateSegmentSize()

Register SIMachineFunctionInfo::addPrivateSegmentSize

(

const SIRegisterInfo &

TRI

)

Definition at line 258 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister().

addPrivateSegmentWaveByteOffset()

Register llvm::SIMachineFunctionInfo::addPrivateSegmentWaveByteOffset ( )

inline

Definition at line 914 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister().

addQueuePtr()

Register SIMachineFunctionInfo::addQueuePtr

(

const SIRegisterInfo &

TRI

)

Definition at line 229 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), and TRI.

addReservedUserSGPR()

Register llvm::SIMachineFunctionInfo::addReservedUserSGPR ( )

inline

Increment user SGPRs used for padding the argument list only.

Definition at line 868 of file SIMachineFunctionInfo.h.

addToPrologEpilogSGPRSpills()

void llvm::SIMachineFunctionInfo::addToPrologEpilogSGPRSpills ( Register  Reg, PrologEpilogSGPRSaveRestoreInfo  SI  )

inline

Definition at line 695 of file SIMachineFunctionInfo.h.

References assert(), hasPrologEpilogSGPRSpillEntry(), llvm::SmallVectorImpl< T >::insert(), LHS, Reg, RHS, and llvm::upper_bound().

Referenced by getVGPRSpillLaneOrTempRegister().

addToSpilledSGPRs()

void llvm::SIMachineFunctionInfo::addToSpilledSGPRs ( unsigned  num )

inline

Definition at line 1098 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::spillEmergencySGPR(), and llvm::SIRegisterInfo::spillSGPR().

addToSpilledVGPRs()

void llvm::SIMachineFunctionInfo::addToSpilledVGPRs ( unsigned  num )

inline

Definition at line 1102 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::buildVGPRSpillLoadStore(), and llvm::SIRegisterInfo::eliminateFrameIndex().

addWorkGroupIDX()

Register llvm::SIMachineFunctionInfo::addWorkGroupIDX ( )

inline

Definition at line 875 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister().

addWorkGroupIDY()

Register llvm::SIMachineFunctionInfo::addWorkGroupIDY ( )

inline

Definition at line 881 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister().

addWorkGroupIDZ()

Register llvm::SIMachineFunctionInfo::addWorkGroupIDZ ( )

inline

Definition at line 887 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister().

addWorkGroupInfo()

Register llvm::SIMachineFunctionInfo::addWorkGroupInfo ( )

inline

Definition at line 893 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister().

allocateSGPRSpillToVGPRLane()

bool SIMachineFunctionInfo::allocateSGPRSpillToVGPRLane	(	MachineFunction &	MF,
		int	FI,
		bool	SpillToPhysVGPRLane = false,
		bool	IsPrologEpilog = false
	)

Definition at line 448 of file SIMachineFunctionInfo.cpp.

References assert(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getSubtarget(), I, and Size.

Referenced by getVGPRSpillLaneOrTempRegister().

allocateVGPRSpillToAGPR()

bool SIMachineFunctionInfo::allocateVGPRSpillToAGPR	(	MachineFunction &	MF,
		int	FI,
		bool	isAGPRtoVGPR
	)

Reserve AGPRs or VGPRs to support spilling for FrameIndex FI.

Either AGPR is spilled to VGPR to vice versa. Returns true if a FI can be eliminated completely.

Definition at line 495 of file SIMachineFunctionInfo.cpp.

References assert(), llvm::SmallVectorTemplateCommon< T, typename >::end(), llvm::Function::getCallingConv(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getFunction(), llvm::MachineFrameInfo::getObjectSize(), llvm::MachineFunction::getRegInfo(), llvm::TargetRegisterClass::getRegisters(), llvm::MachineFunction::getSubtarget(), I, llvm::MachineFrameInfo::isSpillSlotObjectIndex(), MRI, llvm::BitVector::push_back(), llvm::BitVector::resize(), llvm::BitVector::set(), llvm::BitVector::setBitsInMask(), Size, and TRI.

Referenced by llvm::SIFrameLowering::processFunctionBeforeFrameFinalized().

allocateWWMSpill()

void SIMachineFunctionInfo::allocateWWMSpill	(	MachineFunction &	MF,
		Register	VGPR,
		uint64_t	Size = 4,
		Align	Alignment = Align(4)
	)

Definition at line 308 of file SIMachineFunctionInfo.cpp.

References llvm::MapVector< KeyT, ValueT, MapType, VectorType >::count(), llvm::MachineFrameInfo::CreateSpillStackObject(), llvm::MachineFunction::getFrameInfo(), llvm::AMDGPUMachineFunction::hasInitWholeWave(), llvm::MachineFrameInfo::hasTailCall(), llvm::MapVector< KeyT, ValueT, MapType, VectorType >::insert(), llvm::AMDGPUMachineFunction::isChainFunction(), llvm::SIRegisterInfo::isChainScratchRegister(), llvm::AMDGPUMachineFunction::isEntryFunction(), and Size.

Referenced by llvm::SIFrameLowering::determineCalleeSaves().

checkFlag()

bool llvm::SIMachineFunctionInfo::checkFlag ( Register  Reg, uint8_t  Flag  ) const

inline

Definition at line 772 of file SIMachineFunctionInfo.h.

References Reg.

Referenced by llvm::SIInstrInfo::getLiveRangeSplitOpcode(), llvm::SIInstrInfo::getVectorRegSpillRestoreOpcode(), llvm::SIInstrInfo::getVectorRegSpillSaveOpcode(), llvm::SIRegisterInfo::getVRegFlagsOfReg(), and isWWMReg().

checkIndexInPrologEpilogSGPRSpills()

bool llvm::SIMachineFunctionInfo::checkIndexInPrologEpilogSGPRSpills ( int  FI ) const

inline

Definition at line 738 of file SIMachineFunctionInfo.h.

References llvm::SmallVectorTemplateCommon< T, typename >::end(), llvm::find_if(), and llvm::SPILL_TO_VGPR_LANE.

Referenced by allSGPRSpillsAreDead(), and removeDeadFrameIndices().

clearNonWWMRegAllocMask()

void llvm::SIMachineFunctionInfo::clearNonWWMRegAllocMask ( )

inline

Definition at line 662 of file SIMachineFunctionInfo.h.

References llvm::BitVector::clear().

clone()

MachineFunctionInfo * SIMachineFunctionInfo::clone ( BumpPtrAllocator &  Allocator, MachineFunction &  DestMF, const DenseMap< MachineBasicBlock *, MachineBasicBlock * > &  Src2DstMBB  ) const

overridevirtual

Make a functionally equivalent copy of this MachineFunctionInfo in MF.

This requires remapping MachineBasicBlock references from the original parent to values in the new function. Targets may assume that virtual register and frame index values are preserved in the new function.

Reimplemented from llvm::MachineFunctionInfo.

Definition at line 200 of file SIMachineFunctionInfo.cpp.

References llvm::MachineFunction::cloneInfo().

get32BitAddressHighBits()

uint32_t llvm::SIMachineFunctionInfo::get32BitAddressHighBits ( ) const

inline

Definition at line 985 of file SIMachineFunctionInfo.h.

getAGPRSpillVGPRs()

ArrayRef< MCPhysReg > llvm::SIMachineFunctionInfo::getAGPRSpillVGPRs ( ) const

inline

Definition at line 789 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::getReservedRegs(), and llvm::SIFrameLowering::processFunctionBeforeFrameFinalized().

getAllScratchSGPRCopyDstRegs()

void llvm::SIMachineFunctionInfo::getAllScratchSGPRCopyDstRegs ( SmallVectorImpl< Register > &  Regs ) const

inline

Definition at line 730 of file SIMachineFunctionInfo.h.

References llvm::COPY_TO_SCRATCH_SGPR, and llvm::SmallVectorTemplateBase< T, bool >::push_back().

Referenced by llvm::SIFrameLowering::emitCSRSpillStores().

getArgInfo() [1/2]

AMDGPUFunctionArgInfo & llvm::SIMachineFunctionInfo::getArgInfo ( )

inline

Definition at line 961 of file SIMachineFunctionInfo.h.

Referenced by llvm::AMDGPUCallLowering::passSpecialInputs().

getArgInfo() [2/2]

const AMDGPUFunctionArgInfo & llvm::SIMachineFunctionInfo::getArgInfo ( ) const

inline

Definition at line 965 of file SIMachineFunctionInfo.h.

getBytesInStackArgArea()

unsigned llvm::SIMachineFunctionInfo::getBytesInStackArgArea ( ) const

inline

Definition at line 832 of file SIMachineFunctionInfo.h.

Referenced by llvm::AMDGPUCallLowering::areCalleeOutgoingArgsTailCallable(), and llvm::SITargetLowering::isEligibleForTailCallOptimization().

getDynamicVGPRBlockSize()

unsigned llvm::SIMachineFunctionInfo::getDynamicVGPRBlockSize ( ) const

inline

Definition at line 841 of file SIMachineFunctionInfo.h.

Referenced by llvm::GCNSchedStage::checkScheduling(), llvm::SIFrameLowering::emitEntryFunctionPrologue(), llvm::SIRegisterInfo::getRegPressureLimit(), llvm::UnclusteredHighRPStage::initGCNRegion(), llvm::GCNSchedStrategy::initialize(), llvm::GCNSchedStage::shouldRevertScheduling(), and llvm::UnclusteredHighRPStage::shouldRevertScheduling().

getFlatWorkGroupSizes()

std::pair< unsigned, unsigned > llvm::SIMachineFunctionInfo::getFlatWorkGroupSizes ( ) const

inline

Returns

A pair of default/requested minimum/maximum flat work group sizes for this function.

Definition at line 1136 of file SIMachineFunctionInfo.h.

getFrameOffsetReg()

Register llvm::SIMachineFunctionInfo::getFrameOffsetReg ( ) const

inline

Definition at line 1024 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::assignCalleeSavedSpillSlots(), llvm::SIFrameLowering::determineCalleeSavesSGPR(), llvm::SIFrameLowering::determinePrologEpilogSGPRSaves(), llvm::SIFrameLowering::emitCSRSpillRestores(), llvm::SIFrameLowering::emitCSRSpillStores(), llvm::SIFrameLowering::emitEntryFunctionPrologue(), llvm::SIFrameLowering::emitEpilogue(), llvm::SIFrameLowering::emitPrologue(), llvm::SIRegisterInfo::getFrameRegister(), llvm::SIRegisterInfo::getReservedRegs(), and llvm::SIRegisterInfo::spillSGPR().

getGITPtrHigh()

unsigned llvm::SIMachineFunctionInfo::getGITPtrHigh ( ) const

inline

Definition at line 979 of file SIMachineFunctionInfo.h.

Referenced by buildGitPtr().

getGITPtrLoReg()

Register SIMachineFunctionInfo::getGITPtrLoReg

(

const MachineFunction &

MF

)

const

Definition at line 637 of file SIMachineFunctionInfo.cpp.

References llvm::CallingConv::AMDGPU_GS, llvm::CallingConv::AMDGPU_HS, llvm::Function::getCallingConv(), llvm::MachineFunction::getFunction(), and llvm::MachineFunction::getSubtarget().

Referenced by buildGitPtr(), and llvm::SIFrameLowering::emitEntryFunctionPrologue().

getGWSPSV()

const AMDGPUGWSResourcePseudoSourceValue * llvm::SIMachineFunctionInfo::getGWSPSV ( const AMDGPUTargetMachine &  TM )

inline

Definition at line 1167 of file SIMachineFunctionInfo.h.

Referenced by llvm::SITargetLowering::getTgtMemIntrinsic(), and llvm::AMDGPUMIRFormatter::parseCustomPseudoSourceValue().

getImplicitBufferPtrUserSGPR()

Register llvm::SIMachineFunctionInfo::getImplicitBufferPtrUserSGPR ( ) const

inline

Definition at line 1054 of file SIMachineFunctionInfo.h.

getLongBranchReservedReg()

Register llvm::SIMachineFunctionInfo::getLongBranchReservedReg ( ) const

inline

Definition at line 1048 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::getReservedRegs(), llvm::SIInstrInfo::insertIndirectBranch(), llvm::SIFrameLowering::processFunctionBeforeFrameIndicesReplaced(), and llvm::yaml::SIMachineFunctionInfo::SIMachineFunctionInfo().

getMaskForVGPRBlockOps()

uint32_t llvm::SIMachineFunctionInfo::getMaskForVGPRBlockOps ( Register  RegisterBlock ) const

inline

Definition at line 632 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::addImplicitUsesForBlockCSRLoad(), emitVGPRBlockComment(), llvm::SIFrameLowering::restoreCalleeSavedRegisters(), and llvm::SIFrameLowering::spillCalleeSavedRegisters().

getMaxFlatWorkGroupSize()

unsigned llvm::SIMachineFunctionInfo::getMaxFlatWorkGroupSize ( ) const

inline

Returns

Default/requested maximum flat work group size for this function.

Definition at line 1146 of file SIMachineFunctionInfo.h.

getMaxMemoryClusterDWords()

unsigned llvm::SIMachineFunctionInfo::getMaxMemoryClusterDWords ( ) const

inline

Definition at line 1194 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIInstrInfo::shouldClusterMemOps().

getMaxNumWorkGroups()

SmallVector< unsigned > llvm::SIMachineFunctionInfo::getMaxNumWorkGroups ( ) const

inline

Returns

Default/requested number of work groups for this function.

Definition at line 1205 of file SIMachineFunctionInfo.h.

getMaxNumWorkGroupsX()

unsigned llvm::SIMachineFunctionInfo::getMaxNumWorkGroupsX ( ) const

inline

Definition at line 1207 of file SIMachineFunctionInfo.h.

getMaxNumWorkGroupsY()

unsigned llvm::SIMachineFunctionInfo::getMaxNumWorkGroupsY ( ) const

inline

Definition at line 1208 of file SIMachineFunctionInfo.h.

getMaxNumWorkGroupsZ()

unsigned llvm::SIMachineFunctionInfo::getMaxNumWorkGroupsZ ( ) const

inline

Definition at line 1209 of file SIMachineFunctionInfo.h.

getMaxWavesPerEU()

unsigned llvm::SIMachineFunctionInfo::getMaxWavesPerEU ( ) const

inline

Returns

Default/requested maximum number of waves per execution unit.

Definition at line 1162 of file SIMachineFunctionInfo.h.

Referenced by llvm::UnclusteredHighRPStage::initGCNSchedStage(), and limitOccupancy().

getMinAllowedOccupancy()

unsigned llvm::SIMachineFunctionInfo::getMinAllowedOccupancy ( ) const

inline

Definition at line 1175 of file SIMachineFunctionInfo.h.

References llvm::AMDGPUMachineFunction::isMemoryBound(), and llvm::AMDGPUMachineFunction::needsWaveLimiter().

Referenced by llvm::GCNSchedStage::checkScheduling(), llvm::GCNScheduleDAGMILive::GCNScheduleDAGMILive(), and llvm::GCNSchedStrategy::initialize().

getMinFlatWorkGroupSize()

unsigned llvm::SIMachineFunctionInfo::getMinFlatWorkGroupSize ( ) const

inline

Returns

Default/requested minimum flat work group size for this function.

Definition at line 1141 of file SIMachineFunctionInfo.h.

getMinWavesPerEU()

unsigned llvm::SIMachineFunctionInfo::getMinWavesPerEU ( ) const

inline

Returns

Default/requested minimum number of waves per execution unit.

Definition at line 1157 of file SIMachineFunctionInfo.h.

Referenced by llvm::GCNSchedStage::mayCauseSpilling().

getMode()

SIModeRegisterDefaults llvm::SIMachineFunctionInfo::getMode ( ) const

inline

Definition at line 664 of file SIMachineFunctionInfo.h.

Referenced by llvm::AMDGPULegalizerInfo::legalizeFDIV32(), llvm::AMDGPULegalizerInfo::legalizeFFloor(), llvm::AMDGPULegalizerInfo::legalizeFMad(), llvm::AMDGPULegalizerInfo::legalizeMinNumMaxNum(), llvm::AMDGPULegalizerInfo::legalizeRsqClampIntrinsic(), llvm::AMDGPUTargetLowering::LowerDIVREM24(), and llvm::AMDGPUTargetLowering::LowerUDIVREM64().

getNonWWMRegMask()

BitVector llvm::SIMachineFunctionInfo::getNonWWMRegMask ( ) const

inline

Definition at line 661 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::getReservedRegs().

getNumKernargPreloadedSGPRs()

unsigned llvm::SIMachineFunctionInfo::getNumKernargPreloadedSGPRs ( ) const

inline

Definition at line 997 of file SIMachineFunctionInfo.h.

getNumPreloadedSGPRs()

unsigned llvm::SIMachineFunctionInfo::getNumPreloadedSGPRs ( ) const

inline

Definition at line 993 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::emitEntryFunctionPrologue(), and llvm::GCNSubtarget::getMaxNumSGPRs().

getNumSpilledSGPRs()

unsigned llvm::SIMachineFunctionInfo::getNumSpilledSGPRs ( ) const

inline

Definition at line 1090 of file SIMachineFunctionInfo.h.

getNumSpilledVGPRs()

unsigned llvm::SIMachineFunctionInfo::getNumSpilledVGPRs ( ) const

inline

Definition at line 1094 of file SIMachineFunctionInfo.h.

getNumUserSGPRs()

unsigned llvm::SIMachineFunctionInfo::getNumUserSGPRs ( ) const

inline

Definition at line 989 of file SIMachineFunctionInfo.h.

getNumWaveDispatchSGPRs()

unsigned llvm::SIMachineFunctionInfo::getNumWaveDispatchSGPRs ( ) const

inline

Definition at line 1001 of file SIMachineFunctionInfo.h.

getNumWaveDispatchVGPRs()

unsigned llvm::SIMachineFunctionInfo::getNumWaveDispatchVGPRs ( ) const

inline

Definition at line 1005 of file SIMachineFunctionInfo.h.

getOccupancy()

unsigned llvm::SIMachineFunctionInfo::getOccupancy ( ) const

inline

Definition at line 1171 of file SIMachineFunctionInfo.h.

Referenced by llvm::GCNSchedStrategy::initialize().

getOptionalScavengeFI()

std::optional< int > llvm::SIMachineFunctionInfo::getOptionalScavengeFI ( ) const

inline

Definition at line 830 of file SIMachineFunctionInfo.h.

Referenced by llvm::yaml::SIMachineFunctionInfo::SIMachineFunctionInfo().

getPreloadedReg()

MCRegister llvm::SIMachineFunctionInfo::getPreloadedReg ( AMDGPUFunctionArgInfo::PreloadedValue  Value ) const

inline

Definition at line 974 of file SIMachineFunctionInfo.h.

Referenced by llvm::AMDGPUResourceUsageAnalysisImpl::analyzeResourceUsage(), and llvm::SIFrameLowering::emitEntryFunctionPrologue().

getPreloadedValue()

std::tuple< const ArgDescriptor *, const TargetRegisterClass *, LLT > llvm::SIMachineFunctionInfo::getPreloadedValue ( AMDGPUFunctionArgInfo::PreloadedValue  Value ) const

inline

Definition at line 970 of file SIMachineFunctionInfo.h.

Referenced by llvm::AMDGPULegalizerInfo::legalizeWorkitemIDIntrinsic(), and llvm::AMDGPULegalizerInfo::loadInputValue().

getPrivateSegmentWaveByteOffsetSystemSGPR()

Register llvm::SIMachineFunctionInfo::getPrivateSegmentWaveByteOffsetSystemSGPR ( ) const

inline

Definition at line 1009 of file SIMachineFunctionInfo.h.

getPrologEpilogSGPRSaveRestoreInfo()

const PrologEpilogSGPRSaveRestoreInfo & llvm::SIMachineFunctionInfo::getPrologEpilogSGPRSaveRestoreInfo ( Register  Reg ) const

inline

Definition at line 749 of file SIMachineFunctionInfo.h.

References assert(), llvm::SmallVectorTemplateCommon< T, typename >::end(), llvm::find_if(), I, and Reg.

Referenced by llvm::SIFrameLowering::emitPrologue().

getPrologEpilogSGPRSpills()

ArrayRef< PrologEpilogSGPRSpill > llvm::SIMachineFunctionInfo::getPrologEpilogSGPRSpills ( ) const

inline

Definition at line 686 of file SIMachineFunctionInfo.h.

References assert(), and llvm::is_sorted().

Referenced by llvm::SIFrameLowering::emitCSRSpillRestores(), and llvm::SIFrameLowering::emitCSRSpillStores().

getPSInputAddr()

unsigned llvm::SIMachineFunctionInfo::getPSInputAddr ( ) const

inline

Definition at line 1106 of file SIMachineFunctionInfo.h.

getPSInputEnable()

unsigned llvm::SIMachineFunctionInfo::getPSInputEnable ( ) const

inline

Definition at line 1110 of file SIMachineFunctionInfo.h.

getQueuePtrUserSGPR()

Register llvm::SIMachineFunctionInfo::getQueuePtrUserSGPR ( ) const

inline

Definition at line 1050 of file SIMachineFunctionInfo.h.

getScavengeFI()

int SIMachineFunctionInfo::getScavengeFI	(	MachineFrameInfo &	MFI,
		const SIRegisterInfo &	TRI
	)

Definition at line 606 of file SIMachineFunctionInfo.cpp.

References llvm::MachineFrameInfo::CreateStackObject(), and TRI.

Referenced by llvm::SGPRSpillBuilder::prepare(), and llvm::SIFrameLowering::processFunctionBeforeFrameFinalized().

getScratchReservedForDynamicVGPRs()

unsigned llvm::SIMachineFunctionInfo::getScratchReservedForDynamicVGPRs ( ) const

inline

Definition at line 844 of file SIMachineFunctionInfo.h.

getScratchRSrcReg()

Register llvm::SIMachineFunctionInfo::getScratchRSrcReg ( ) const

inline

Returns the physical register reserved for use as the resource descriptor for scratch accesses.

Definition at line 1015 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::buildSpillLoadStore(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::SIRegisterInfo::getReservedRegs(), and llvm::AMDGPUCallLowering::handleImplicitCallArguments().

getScratchSGPRCopyDstReg()

Register llvm::SIMachineFunctionInfo::getScratchSGPRCopyDstReg ( Register  Reg ) const

inline

Definition at line 718 of file SIMachineFunctionInfo.h.

References llvm::COPY_TO_SCRATCH_SGPR, llvm::SmallVectorTemplateCommon< T, typename >::end(), llvm::find_if(), I, and Reg.

Referenced by llvm::SIFrameLowering::assignCalleeSavedSpillSlots(), llvm::SIFrameLowering::emitEpilogue(), and llvm::SIFrameLowering::emitPrologue().

getSGPRForEXECCopy()

Register llvm::SIMachineFunctionInfo::getSGPRForEXECCopy ( ) const

inline

Definition at line 793 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::determinePrologEpilogSGPRSaves(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::SIRegisterInfo::getReservedRegs(), and llvm::yaml::SIMachineFunctionInfo::SIMachineFunctionInfo().

getSGPRSpillPhysVGPRs()

ArrayRef< Register > llvm::SIMachineFunctionInfo::getSGPRSpillPhysVGPRs ( ) const

inline

Definition at line 675 of file SIMachineFunctionInfo.h.

Referenced by llvm::yaml::SIMachineFunctionInfo::SIMachineFunctionInfo().

getSGPRSpillToPhysicalVGPRLanes()

ArrayRef< SIRegisterInfo::SpilledReg > llvm::SIMachineFunctionInfo::getSGPRSpillToPhysicalVGPRLanes ( int  FrameIndex ) const

inline

Definition at line 759 of file SIMachineFunctionInfo.h.

References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::end(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find(), and I.

Referenced by getVGPRSpillLaneOrTempRegister(), llvm::SIRegisterInfo::restoreSGPR(), and llvm::SIRegisterInfo::spillSGPR().

getSGPRSpillToVirtualVGPRLanes()

ArrayRef< SIRegisterInfo::SpilledReg > llvm::SIMachineFunctionInfo::getSGPRSpillToVirtualVGPRLanes ( int  FrameIndex ) const

inline

Definition at line 667 of file SIMachineFunctionInfo.h.

References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::end(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find(), and I.

Referenced by llvm::SIRegisterInfo::restoreSGPR(), and llvm::SIRegisterInfo::spillSGPR().

getSGPRSpillVGPRs()

ArrayRef< Register > llvm::SIMachineFunctionInfo::getSGPRSpillVGPRs ( ) const

inline

Definition at line 674 of file SIMachineFunctionInfo.h.

getStackPtrOffsetReg()

Register llvm::SIMachineFunctionInfo::getStackPtrOffsetReg ( ) const

inline

Definition at line 1044 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::buildSpillLoadStore(), llvm::SIFrameLowering::determineCalleeSavesSGPR(), llvm::SIFrameLowering::eliminateCallFramePseudoInstr(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::SIFrameLowering::emitEntryFunctionPrologue(), llvm::SIFrameLowering::emitEpilogue(), llvm::SIFrameLowering::emitPrologue(), llvm::SIRegisterInfo::getFrameRegister(), llvm::SIRegisterInfo::getReservedRegs(), llvm::SIInstrInfo::loadRegFromStackSlot(), llvm::SIFrameLowering::restoreCalleeSavedRegisters(), llvm::SIFrameLowering::spillCalleeSavedRegisters(), llvm::SIRegisterInfo::spillSGPR(), and llvm::SIInstrInfo::storeRegToStackSlot().

getUserSGPRInfo() [1/2]

GCNUserSGPRUsageInfo & llvm::SIMachineFunctionInfo::getUserSGPRInfo ( )

inline

Definition at line 691 of file SIMachineFunctionInfo.h.

Referenced by llvm::AMDGPUResourceUsageAnalysisImpl::analyzeResourceUsage(), llvm::SIFrameLowering::emitEntryFunctionPrologue(), llvm::AMDGPU::HSAMD::MetadataStreamerMsgPackV5::emitHiddenKernelArgs(), and llvm::GCNSubtarget::getReservedNumSGPRs().

getUserSGPRInfo() [2/2]

const GCNUserSGPRUsageInfo & llvm::SIMachineFunctionInfo::getUserSGPRInfo ( ) const

inline

Definition at line 693 of file SIMachineFunctionInfo.h.

getVGPRForAGPRCopy()

Register llvm::SIMachineFunctionInfo::getVGPRForAGPRCopy ( ) const

inline

Definition at line 617 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::buildSpillLoadStore(), llvm::SIRegisterInfo::getReservedRegs(), llvm::SIFrameLowering::processFunctionBeforeFrameIndicesReplaced(), and llvm::yaml::SIMachineFunctionInfo::SIMachineFunctionInfo().

getVGPRSpillAGPRs()

ArrayRef< MCPhysReg > llvm::SIMachineFunctionInfo::getVGPRSpillAGPRs ( ) const

inline

Definition at line 797 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::getReservedRegs(), and llvm::SIFrameLowering::processFunctionBeforeFrameFinalized().

getVGPRToAGPRSpill()

MCPhysReg llvm::SIMachineFunctionInfo::getVGPRToAGPRSpill ( int  FrameIndex, unsigned  Lane  ) const

inline

Definition at line 801 of file SIMachineFunctionInfo.h.

References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::end(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find(), and I.

Referenced by spillVGPRtoAGPR().

getWavesPerEU()

std::pair< unsigned, unsigned > llvm::SIMachineFunctionInfo::getWavesPerEU ( ) const

inline

Returns

A pair of default/requested minimum/maximum number of waves per execution unit.

Definition at line 1152 of file SIMachineFunctionInfo.h.

Referenced by llvm::GCNSubtarget::getMaxNumSGPRs().

getWWMReservedRegs()

const ReservedRegSet & llvm::SIMachineFunctionInfo::getWWMReservedRegs ( ) const

inline

Definition at line 678 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::determineCalleeSaves(), llvm::SIRegisterInfo::getReservedRegs(), and llvm::yaml::SIMachineFunctionInfo::SIMachineFunctionInfo().

getWWMSpills()

const WWMSpillsMap & llvm::SIMachineFunctionInfo::getWWMSpills ( ) const

inline

Definition at line 677 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::determineCalleeSaves().

hasImplicitArgPtr()

bool llvm::SIMachineFunctionInfo::hasImplicitArgPtr ( ) const

inline

Definition at line 957 of file SIMachineFunctionInfo.h.

hasLDSKernelId()

bool llvm::SIMachineFunctionInfo::hasLDSKernelId ( ) const

inline

Definition at line 899 of file SIMachineFunctionInfo.h.

hasMaskForVGPRBlockOps()

bool llvm::SIMachineFunctionInfo::hasMaskForVGPRBlockOps ( Register  RegisterBlock ) const

inline

Definition at line 636 of file SIMachineFunctionInfo.h.

References llvm::IndexedMap< T, ToIndexT >::inBounds().

Referenced by llvm::SIFrameLowering::restoreCalleeSavedRegisters(), and llvm::SIFrameLowering::spillCalleeSavedRegisters().

hasNonSpillStackObjects()

bool llvm::SIMachineFunctionInfo::hasNonSpillStackObjects ( ) const

inline

Definition at line 1074 of file SIMachineFunctionInfo.h.

hasPrivateSegmentWaveByteOffset()

bool llvm::SIMachineFunctionInfo::hasPrivateSegmentWaveByteOffset ( ) const

inline

Definition at line 941 of file SIMachineFunctionInfo.h.

hasPrologEpilogSGPRSpillEntry()

bool llvm::SIMachineFunctionInfo::hasPrologEpilogSGPRSpillEntry ( Register  Reg ) const

inline

Definition at line 710 of file SIMachineFunctionInfo.h.

References llvm::SmallVectorTemplateCommon< T, typename >::end(), llvm::find_if(), I, and Reg.

Referenced by addToPrologEpilogSGPRSpills(), llvm::SIFrameLowering::determinePrologEpilogSGPRSaves(), llvm::SIFrameLowering::emitEpilogue(), and llvm::SIFrameLowering::emitPrologue().

hasSpilledSGPRs()

bool llvm::SIMachineFunctionInfo::hasSpilledSGPRs ( ) const

inline

Definition at line 1058 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::determineCalleeSavesSGPR().

hasSpilledVGPRs()

bool llvm::SIMachineFunctionInfo::hasSpilledVGPRs ( ) const

inline

Definition at line 1066 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::processFunctionBeforeFrameFinalized().

hasVRegFlags()

bool llvm::SIMachineFunctionInfo::hasVRegFlags ( )

inline

Definition at line 779 of file SIMachineFunctionInfo.h.

hasWorkGroupIDX()

bool llvm::SIMachineFunctionInfo::hasWorkGroupIDX ( ) const

inline

Definition at line 925 of file SIMachineFunctionInfo.h.

hasWorkGroupIDY()

bool llvm::SIMachineFunctionInfo::hasWorkGroupIDY ( ) const

inline

Definition at line 929 of file SIMachineFunctionInfo.h.

hasWorkGroupIDZ()

bool llvm::SIMachineFunctionInfo::hasWorkGroupIDZ ( ) const

inline

Definition at line 933 of file SIMachineFunctionInfo.h.

Referenced by llvm::AMDGPULegalizerInfo::loadInputValue().

hasWorkGroupInfo()

bool llvm::SIMachineFunctionInfo::hasWorkGroupInfo ( ) const

inline

Definition at line 937 of file SIMachineFunctionInfo.h.

hasWorkItemIDX()

bool llvm::SIMachineFunctionInfo::hasWorkItemIDX ( ) const

inline

Definition at line 945 of file SIMachineFunctionInfo.h.

hasWorkItemIDY()

bool llvm::SIMachineFunctionInfo::hasWorkItemIDY ( ) const

inline

Definition at line 949 of file SIMachineFunctionInfo.h.

hasWorkItemIDZ()

bool llvm::SIMachineFunctionInfo::hasWorkItemIDZ ( ) const

inline

Definition at line 953 of file SIMachineFunctionInfo.h.

increaseOccupancy()

void llvm::SIMachineFunctionInfo::increaseOccupancy ( const MachineFunction &  MF, unsigned  Limit  )

inline

Definition at line 1188 of file SIMachineFunctionInfo.h.

References limitOccupancy().

Referenced by llvm::UnclusteredHighRPStage::initGCNSchedStage(), and llvm::PreRARematStage::initGCNSchedStage().

initializeBaseYamlFields()

bool SIMachineFunctionInfo::initializeBaseYamlFields	(	const yaml::SIMachineFunctionInfo &	YamlMFI,
		const MachineFunction &	MF,
		PerFunctionMIParsingState &	PFS,
		SMDiagnostic &	Error,
		SMRange &	SourceRange
	)

Definition at line 770 of file SIMachineFunctionInfo.cpp.

References llvm::yaml::SIMachineFunctionInfo::BytesInStackArgArea, llvm::SourceMgr::DK_Error, llvm::yaml::SIMachineFunctionInfo::DynLDSAlign, llvm::yaml::SIMachineFunctionInfo::ExplicitKernArgSize, llvm::yaml::SIMachineFunctionInfo::GDSSize, llvm::MemoryBuffer::getBufferIdentifier(), llvm::MachineFunction::getFrameInfo(), llvm::SourceMgr::getMainFileID(), llvm::SourceMgr::getMemoryBuffer(), llvm::yaml::SIMachineFunctionInfo::HasSpilledSGPRs, llvm::yaml::SIMachineFunctionInfo::HasSpilledVGPRs, llvm::yaml::SIMachineFunctionInfo::HighBitsOf32BitAddress, llvm::yaml::SIMachineFunctionInfo::IsEntryFunction, llvm::yaml::SIMachineFunctionInfo::IsWholeWaveFunction, llvm::yaml::SIMachineFunctionInfo::LDSSize, llvm::yaml::SIMachineFunctionInfo::MaxKernArgAlign, llvm::yaml::SIMachineFunctionInfo::MaxMemoryClusterDWords, llvm::yaml::SIMachineFunctionInfo::MemoryBound, llvm::yaml::SIMachineFunctionInfo::NoSignedZerosFPMath, llvm::yaml::SIMachineFunctionInfo::NumWaveDispatchSGPRs, llvm::yaml::SIMachineFunctionInfo::NumWaveDispatchVGPRs, llvm::yaml::SIMachineFunctionInfo::Occupancy, llvm::yaml::SIMachineFunctionInfo::PSInputAddr, llvm::yaml::SIMachineFunctionInfo::PSInputEnable, llvm::yaml::SIMachineFunctionInfo::ReturnsVoid, llvm::yaml::SIMachineFunctionInfo::ScavengeFI, llvm::PerFunctionMIParsingState::SM, llvm::toString(), and llvm::yaml::SIMachineFunctionInfo::WaveLimiter.

Referenced by llvm::GCNTargetMachine::parseMachineFunctionInfo().

isCalleeSavedReg()

bool SIMachineFunctionInfo::isCalleeSavedReg	(	const MCPhysReg *	CSRegs,
		MCPhysReg	Reg
	)		const

Definition at line 346 of file SIMachineFunctionInfo.cpp.

References I.

Referenced by splitWWMSpillRegisters().

isDynamicVGPREnabled()

bool llvm::SIMachineFunctionInfo::isDynamicVGPREnabled ( ) const

inline

Definition at line 840 of file SIMachineFunctionInfo.h.

Referenced by llvm::GCNSchedStage::shouldRevertScheduling().

isPSInputAllocated()

bool llvm::SIMachineFunctionInfo::isPSInputAllocated ( unsigned  Index ) const

inline

Definition at line 1114 of file SIMachineFunctionInfo.h.

References Index.

isStackRealigned()

bool llvm::SIMachineFunctionInfo::isStackRealigned ( ) const

inline

Definition at line 1082 of file SIMachineFunctionInfo.h.

Referenced by llvm::AMDGPUResourceUsageAnalysisImpl::analyzeResourceUsage(), and llvm::SIFrameLowering::emitEpilogue().

isWholeWaveFunction()

bool llvm::SIMachineFunctionInfo::isWholeWaveFunction ( ) const

inline

Definition at line 684 of file SIMachineFunctionInfo.h.

Referenced by buildScratchExecCopy(), llvm::SIFrameLowering::determineCalleeSaves(), llvm::SIFrameLowering::emitCSRSpillRestores(), llvm::SIFrameLowering::emitCSRSpillStores(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::SIInstrInfo::getWholeWaveFunctionSetup(), and llvm::AMDGPUCallLowering::lowerReturn().

isWWMReg()

bool llvm::SIMachineFunctionInfo::isWWMReg ( Register  Reg ) const

inline

Definition at line 655 of file SIMachineFunctionInfo.h.

References checkFlag(), llvm::SetVector< T, Vector, Set, N >::contains(), Reg, and llvm::AMDGPU::VirtRegFlag::WWM_REG.

Referenced by llvm::SIInstrInfo::isBasicBlockPrologue().

isWWMReservedRegister()

bool llvm::SIMachineFunctionInfo::isWWMReservedRegister ( Register  Reg ) const

inline

Definition at line 680 of file SIMachineFunctionInfo.h.

References llvm::SetVector< T, Vector, Set, N >::contains(), and Reg.

Referenced by assignSlotsUsingVGPRBlocks().

limitOccupancy() [1/2]

void SIMachineFunctionInfo::limitOccupancy

(

const MachineFunction &

MF

)

Definition at line 207 of file SIMachineFunctionInfo.cpp.

References getMaxWavesPerEU(), llvm::MachineFunction::getSubtarget(), and limitOccupancy().

Referenced by llvm::GCNSchedStage::checkScheduling(), increaseOccupancy(), and limitOccupancy().

limitOccupancy() [2/2]

void llvm::SIMachineFunctionInfo::limitOccupancy ( unsigned  Limit )

inline

Definition at line 1183 of file SIMachineFunctionInfo.h.

markPSInputAllocated()

void llvm::SIMachineFunctionInfo::markPSInputAllocated ( unsigned  Index )

inline

Definition at line 1118 of file SIMachineFunctionInfo.h.

References Index.

markPSInputEnabled()

void llvm::SIMachineFunctionInfo::markPSInputEnabled ( unsigned  Index )

inline

Definition at line 1122 of file SIMachineFunctionInfo.h.

References Index.

mayNeedAGPRs()

bool llvm::SIMachineFunctionInfo::mayNeedAGPRs ( ) const

inline

Definition at line 1196 of file SIMachineFunctionInfo.h.

mayUseAGPRs()

bool SIMachineFunctionInfo::mayUseAGPRs

(

const Function &

F

)

const

Definition at line 815 of file SIMachineFunctionInfo.cpp.

References F, and llvm::AMDGPU::getIntegerPairAttribute().

Referenced by SIMachineFunctionInfo().

removeDeadFrameIndices()

bool SIMachineFunctionInfo::removeDeadFrameIndices	(	MachineFrameInfo &	MFI,
		bool	ResetSGPRSpillStackIDs
	)

If ResetSGPRSpillStackIDs is true, reset the stack ID from sgpr-spill to the default stack.

Definition at line 561 of file SIMachineFunctionInfo.cpp.

References checkIndexInPrologEpilogSGPRSpills(), llvm::TargetStackID::Default, llvm::MachineFrameInfo::getObjectIndexBegin(), llvm::MachineFrameInfo::getObjectIndexEnd(), llvm::MachineFrameInfo::getStackID(), I, llvm::make_early_inc_range(), llvm::MachineFrameInfo::RemoveStackObject(), llvm::MachineFrameInfo::setStackID(), and llvm::TargetStackID::SGPRSpill.

Referenced by llvm::SIFrameLowering::processFunctionBeforeFrameFinalized().

reserveWWMRegister()

void llvm::SIMachineFunctionInfo::reserveWWMRegister ( Register  Reg )

inline

Definition at line 654 of file SIMachineFunctionInfo.h.

References llvm::SetVector< T, Vector, Set, N >::insert(), and Reg.

Referenced by llvm::SIFrameLowering::determineCalleeSaves(), and llvm::GCNTargetMachine::parseMachineFunctionInfo().

returnsVoid()

bool llvm::SIMachineFunctionInfo::returnsVoid ( ) const

inline

Definition at line 1126 of file SIMachineFunctionInfo.h.

Referenced by llvm::AMDGPUCallLowering::lowerReturn().

setBytesInStackArgArea()

void llvm::SIMachineFunctionInfo::setBytesInStackArgArea ( unsigned  Bytes )

inline

Definition at line 836 of file SIMachineFunctionInfo.h.

setFlag()

void llvm::SIMachineFunctionInfo::setFlag ( Register  Reg, uint8_t  Flag  )

inline

Definition at line 766 of file SIMachineFunctionInfo.h.

References assert(), and Reg.

Referenced by llvm::GCNTargetMachine::parseMachineFunctionInfo().

setFrameOffsetReg()

void llvm::SIMachineFunctionInfo::setFrameOffsetReg ( Register  Reg )

inline

Definition at line 1028 of file SIMachineFunctionInfo.h.

References assert(), and Reg.

setHasNonSpillStackObjects()

void llvm::SIMachineFunctionInfo::setHasNonSpillStackObjects ( bool  StackObject = true )

inline

Definition at line 1078 of file SIMachineFunctionInfo.h.

setHasSpilledSGPRs()

void llvm::SIMachineFunctionInfo::setHasSpilledSGPRs ( bool  Spill = true )

inline

Definition at line 1062 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIInstrInfo::loadRegFromStackSlot(), and llvm::SIInstrInfo::storeRegToStackSlot().

setHasSpilledVGPRs()

void llvm::SIMachineFunctionInfo::setHasSpilledVGPRs ( bool  Spill = true )

inline

Definition at line 1070 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::spillCalleeSavedRegisters(), and llvm::SIInstrInfo::storeRegToStackSlot().

setIfReturnsVoid()

void llvm::SIMachineFunctionInfo::setIfReturnsVoid ( bool  Value )

inline

Definition at line 1130 of file SIMachineFunctionInfo.h.

Referenced by llvm::AMDGPUCallLowering::lowerReturn().

setIsStackRealigned()

void llvm::SIMachineFunctionInfo::setIsStackRealigned ( bool  Realigned = true )

inline

Definition at line 1086 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::emitPrologue().

setLongBranchReservedReg()

void llvm::SIMachineFunctionInfo::setLongBranchReservedReg ( Register  Reg )

inline

Definition at line 1038 of file SIMachineFunctionInfo.h.

References Reg.

Referenced by llvm::SIFrameLowering::processFunctionBeforeFrameIndicesReplaced().

setMaskForVGPRBlockOps()

void llvm::SIMachineFunctionInfo::setMaskForVGPRBlockOps ( Register  RegisterBlock, uint32_t  Mask  )

inline

Definition at line 627 of file SIMachineFunctionInfo.h.

References llvm::IndexedMap< T, ToIndexT >::grow().

Referenced by assignSlotsUsingVGPRBlocks().

setNumWaveDispatchSGPRs()

void llvm::SIMachineFunctionInfo::setNumWaveDispatchSGPRs ( unsigned  Count )

inline

Definition at line 1003 of file SIMachineFunctionInfo.h.

setNumWaveDispatchVGPRs()

void llvm::SIMachineFunctionInfo::setNumWaveDispatchVGPRs ( unsigned  Count )

inline

Definition at line 1007 of file SIMachineFunctionInfo.h.

setPrivateSegmentWaveByteOffset()

void llvm::SIMachineFunctionInfo::setPrivateSegmentWaveByteOffset ( Register  Reg )

inline

Definition at line 921 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister(), and Reg.

setScratchReservedForDynamicVGPRs()

void llvm::SIMachineFunctionInfo::setScratchReservedForDynamicVGPRs ( unsigned  SizeInBytes )

inline

Definition at line 848 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::emitEntryFunctionPrologue().

setScratchRSrcReg()

void llvm::SIMachineFunctionInfo::setScratchRSrcReg ( Register  Reg )

inline

Definition at line 1019 of file SIMachineFunctionInfo.h.

References assert(), and Reg.

setSGPRForEXECCopy()

void llvm::SIMachineFunctionInfo::setSGPRForEXECCopy ( Register  Reg )

inline

Definition at line 795 of file SIMachineFunctionInfo.h.

References Reg.

Referenced by llvm::SIFrameLowering::determinePrologEpilogSGPRSaves().

setStackPtrOffsetReg()

void llvm::SIMachineFunctionInfo::setStackPtrOffsetReg ( Register  Reg )

inline

Definition at line 1033 of file SIMachineFunctionInfo.h.

References assert(), and Reg.

setVGPRForAGPRCopy()

void llvm::SIMachineFunctionInfo::setVGPRForAGPRCopy ( Register  NewVGPRForAGPRCopy )

inline

Definition at line 621 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::processFunctionBeforeFrameIndicesReplaced().

setVGPRToAGPRSpillDead()

void llvm::SIMachineFunctionInfo::setVGPRToAGPRSpillDead ( int  FrameIndex )

inline

Definition at line 807 of file SIMachineFunctionInfo.h.

References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::end(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find(), and I.

Referenced by llvm::SIFrameLowering::processFunctionBeforeFrameFinalized().

setWorkItemIDX()

void llvm::SIMachineFunctionInfo::setWorkItemIDX ( ArgDescriptor  Arg )

inline

Definition at line 902 of file SIMachineFunctionInfo.h.

setWorkItemIDY()

void llvm::SIMachineFunctionInfo::setWorkItemIDY ( ArgDescriptor  Arg )

inline

Definition at line 906 of file SIMachineFunctionInfo.h.

setWorkItemIDZ()

void llvm::SIMachineFunctionInfo::setWorkItemIDZ ( ArgDescriptor  Arg )

inline

Definition at line 910 of file SIMachineFunctionInfo.h.

shiftWwmVGPRsToLowestRange()

void SIMachineFunctionInfo::shiftWwmVGPRsToLowestRange	(	MachineFunction &	MF,
		SmallVectorImpl< Register > &	WWMVGPRs,
		BitVector &	SavedVGPRs
	)

Definition at line 356 of file SIMachineFunctionInfo.cpp.

References llvm::find(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), I, Idx, llvm::SetVector< T, Vector, Set, N >::insert(), MBB, MRI, llvm::SetVector< T, Vector, Set, N >::remove(), llvm::MachineBasicBlock::removeLiveIn(), llvm::BitVector::reset(), llvm::SmallVectorBase< Size_T >::size(), llvm::MachineBasicBlock::sortUniqueLiveIns(), and TRI.

Referenced by llvm::SIFrameLowering::determineCalleeSaves().

splitWWMSpillRegisters()

void SIMachineFunctionInfo::splitWWMSpillRegisters	(	MachineFunction &	MF,
		SmallVectorImpl< std::pair< Register, int > > &	CalleeSavedRegs,
		SmallVectorImpl< std::pair< Register, int > > &	ScratchRegs
	)		const

Definition at line 333 of file SIMachineFunctionInfo.cpp.

References llvm::MachineRegisterInfo::getCalleeSavedRegs(), llvm::MachineFunction::getRegInfo(), and isCalleeSavedReg().

Referenced by llvm::SIFrameLowering::emitCSRSpillRestores(), and llvm::SIFrameLowering::emitCSRSpillStores().

updateNonWWMRegMask()

void llvm::SIMachineFunctionInfo::updateNonWWMRegMask ( BitVector &  RegMask )

inline

Definition at line 660 of file SIMachineFunctionInfo.h.

Friends And Related Function Documentation

GCNTargetMachine

friend class GCNTargetMachine

friend

Definition at line 413 of file SIMachineFunctionInfo.h.

---

The documentation for this class was generated from the following files:

• lib/Target/AMDGPU/SIMachineFunctionInfo.h
• lib/Target/AMDGPU/SIMachineFunctionInfo.cpp