LLVM 22.0.0git
Classes | Namespaces | Macros | Enumerations | Functions | Variables
X86Disassembler.cpp File Reference
#include "MCTargetDesc/X86BaseInfo.h"
#include "MCTargetDesc/X86MCTargetDesc.h"
#include "TargetInfo/X86TargetInfo.h"
#include "X86DisassemblerDecoder.h"
#include "llvm-c/Visibility.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDisassembler/MCDisassembler.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/raw_ostream.h"
#include "X86GenDisassemblerTables.inc"

Go to the source code of this file.

Classes

struct  ModRMDecision
struct  OpcodeDecision
struct  ContextDecision

Namespaces

namespace  llvm
 This is an optimization pass for GlobalISel generic memory operations.
namespace  llvm::X86
 Define some predicates that are used for node matching.

Macros

#define DEBUG_TYPE   "x86-disassembler"
#define debug(s)
#define GENERIC_FIXUP_FUNC(name, base, prefix)
#define ENTRY(x)
#define ENTRY(x)
#define ENTRY(x)
#define ENTRY(x)
#define ENTRY(x)
#define ENTRY(x)
#define ENTRY(x)

Enumerations

enum  {
  llvm::X86::BX_SI = 500 , llvm::X86::BX_DI = 501 , llvm::X86::BP_SI = 502 , llvm::X86::BP_DI = 503 ,
  llvm::X86::sib = 504 , llvm::X86::sib64 = 505
}

Functions

static InstrUID decode (OpcodeType type, InstructionContext insnContext, uint8_t opcode, uint8_t modRM)
static bool peek (struct InternalInstruction *insn, uint8_t &byte)
template<typename T>
static bool consume (InternalInstruction *insn, T &ptr)
static bool isREX (struct InternalInstruction *insn, uint8_t prefix)
static bool isREX2 (struct InternalInstruction *insn, uint8_t prefix)
static int readPrefixes (struct InternalInstruction *insn)
static int readSIB (struct InternalInstruction *insn)
static int readDisplacement (struct InternalInstruction *insn)
static int readModRM (struct InternalInstruction *insn)
static int fixupReg (struct InternalInstruction *insn, const struct OperandSpecifier *op)
static bool readOpcode (struct InternalInstruction *insn)
static bool is16BitEquivalent (const char *orig, const char *equiv)
static bool is64Bit (const char *name)
static int getInstructionIDWithAttrMask (uint16_t *instructionID, struct InternalInstruction *insn, uint16_t attrMask)
static bool isCCMPOrCTEST (InternalInstruction *insn)
static bool isNF (InternalInstruction *insn)
static int getInstructionID (struct InternalInstruction *insn, const MCInstrInfo *mii)
static int readOpcodeRegister (struct InternalInstruction *insn, uint8_t size)
static int readImmediate (struct InternalInstruction *insn, uint8_t size)
static int readVVVV (struct InternalInstruction *insn)
static int readMaskRegister (struct InternalInstruction *insn)
static int readOperands (struct InternalInstruction *insn)
static bool translateInstruction (MCInst &mcInst, InternalInstruction &insn, const MCDisassembler *Dis)
 translateInstruction - Translates an internal instruction and all its operands to an MCInst.
static void translateRegister (MCInst &mcInst, Reg reg)
 translateRegister - Translates an internal register to the appropriate LLVM register, and appends it as an operand to an MCInst.
static bool translateSrcIndex (MCInst &mcInst, InternalInstruction &insn)
 translateSrcIndex - Appends a source index operand to an MCInst.
static bool translateDstIndex (MCInst &mcInst, InternalInstruction &insn)
 translateDstIndex - Appends a destination index operand to an MCInst.
static void translateImmediate (MCInst &mcInst, uint64_t immediate, const OperandSpecifier &operand, InternalInstruction &insn, const MCDisassembler *Dis)
 translateImmediate - Appends an immediate operand to an MCInst.
static bool translateRMRegister (MCInst &mcInst, InternalInstruction &insn)
 translateRMRegister - Translates a register stored in the R/M field of the ModR/M byte to its LLVM equivalent and appends it to an MCInst.
static bool translateRMMemory (MCInst &mcInst, InternalInstruction &insn, const MCDisassembler *Dis, bool ForceSIB=false)
 translateRMMemory - Translates a memory operand stored in the Mod and R/M fields of an internal instruction (and possibly its SIB byte) to a memory operand in LLVM's format, and appends it to an MCInst.
static bool translateRM (MCInst &mcInst, const OperandSpecifier &operand, InternalInstruction &insn, const MCDisassembler *Dis)
 translateRM - Translates an operand stored in the R/M (and possibly SIB) byte of an instruction to LLVM form, and appends it to an MCInst.
static void translateFPRegister (MCInst &mcInst, uint8_t stackPos)
 translateFPRegister - Translates a stack position on the FPU stack to its LLVM form, and appends it to an MCInst.
static bool translateMaskRegister (MCInst &mcInst, uint8_t maskRegNum)
 translateMaskRegister - Translates a 3-bit mask register number to LLVM form, and appends it to an MCInst.
static bool translateOperand (MCInst &mcInst, const OperandSpecifier &operand, InternalInstruction &insn, const MCDisassembler *Dis)
 translateOperand - Translates an operand stored in an internal instruction to LLVM's format and appends it to an MCInst.
static MCDisassembler * createX86Disassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx)
LLVM_C_ABI void LLVMInitializeX86Disassembler ()

Variables

static const uint8_t segmentRegnums [SEG_OVERRIDE_max]

Macro Definition Documentation

◆ debug

#define debug ( s)
Value:
LLVM_DEBUG(dbgs() << __LINE__ << ": " << s);
LLVM_DEBUG
#define LLVM_DEBUG(...)
Definition Debug.h:119
llvm::dbgs
LLVM_ABI raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition Debug.cpp:207

Definition at line 97 of file X86Disassembler.cpp.

Referenced by fixupReg(), readOperands(), translateInstruction(), translateMaskRegister(), translateOperand(), translateRM(), translateRMMemory(), and translateRMRegister().

◆ DEBUG_TYPE

#define DEBUG_TYPE   "x86-disassembler"

Definition at line 95 of file X86Disassembler.cpp.

◆ ENTRY [1/7]

#define ENTRY ( x)
Value:
X86::x,

◆ ENTRY [2/7]

#define ENTRY ( x)
Value:
case EA_BASE_##x:

◆ ENTRY [3/7]

#define ENTRY ( x)
Value:
case EA_REG_##x: \
mcInst.addOperand(MCOperand::createReg(X86::x)); break;
llvm::MCOperand::createReg
static MCOperand createReg(MCRegister Reg)
Definition MCInst.h:138

◆ ENTRY [4/7]

#define ENTRY ( x)
Value:
case SIB_BASE_##x: \
baseReg = MCOperand::createReg(X86::x); break;

◆ ENTRY [5/7]

#define ENTRY ( x)
Value:
case SIB_INDEX_##x: \
indexReg = MCOperand::createReg(X86::x); break;

◆ ENTRY [6/7]

#define ENTRY ( x)
Value:
case EA_BASE_##x: \
baseReg = MCOperand::createReg(X86::x); break;

◆ ENTRY [7/7]

#define ENTRY ( x)
Value:
case EA_REG_##x:

◆ GENERIC_FIXUP_FUNC

#define GENERIC_FIXUP_FUNC ( name,
base,
prefix )

Definition at line 781 of file X86Disassembler.cpp.

Function Documentation

◆ consume()

template<typename T>
bool consume ( InternalInstruction * insn,
T & ptr )
static

Definition at line 199 of file X86Disassembler.cpp.

References llvm::X86Disassembler::InternalInstruction::bytes, llvm::little, llvm::support::endian::read(), llvm::X86Disassembler::InternalInstruction::readerCursor, llvm::X86Disassembler::InternalInstruction::startLocation, and T.

Referenced by AbstractManglingParser< Derived, Alloc >::parseEncoding(), and AbstractManglingParser< Derived, Alloc >::parsePositiveInteger().

◆ createX86Disassembler()

MCDisassembler * createX86Disassembler ( const Target & T,
const MCSubtargetInfo & STI,
MCContext & Ctx )
static

Definition at line 2479 of file X86Disassembler.cpp.

References T.

Referenced by LLVMInitializeX86Disassembler().

◆ decode()

InstrUID decode ( OpcodeType type,
InstructionContext insnContext,
uint8_t opcode,
uint8_t modRM )
static

Definition at line 124 of file X86Disassembler.cpp.

References ModRMDecision::instructionIDs, llvm_unreachable, llvm::X86Disassembler::MAP4, MAP4_SYM, llvm::X86Disassembler::MAP5, MAP5_SYM, llvm::X86Disassembler::MAP6, MAP6_SYM, llvm::X86Disassembler::MAP7, MAP7_SYM, modFromModRM, ModRMDecision::modrm_type, llvm::X86Disassembler::ONEBYTE, ONEBYTE_SYM, THREEBYTE38_SYM, THREEBYTE3A_SYM, llvm::X86Disassembler::THREEBYTE_38, llvm::X86Disassembler::THREEBYTE_3A, llvm::X86Disassembler::THREEDNOW_MAP, THREEDNOW_MAP_SYM, llvm::X86Disassembler::TWOBYTE, TWOBYTE_SYM, llvm::X86Disassembler::XOP8_MAP, XOP8_MAP_SYM, llvm::X86Disassembler::XOP9_MAP, XOP9_MAP_SYM, llvm::X86Disassembler::XOPA_MAP, and XOPA_MAP_SYM.

Referenced by getInstructionIDWithAttrMask().

◆ fixupReg()

int fixupReg ( struct InternalInstruction * insn,
const struct OperandSpecifier * op )
static

Definition at line 869 of file X86Disassembler.cpp.

References CASE_ENCODING_RM, const, llvm::dbgs(), debug, fixupReg(), LLVM_DEBUG, llvm::X86Disassembler::MODE_64BIT, modFromModRM, op, llvm::X86Disassembler::TYPE_EVEX, and xFromEVEX2of4.

Referenced by fixupReg(), and readOperands().

◆ getInstructionID()

int getInstructionID ( struct InternalInstruction * insn,
const MCInstrInfo * mii )
static

Definition at line 1198 of file X86Disassembler.cpp.

References aaaFromEVEX4of4, llvm::X86Disassembler::ATTR_64BIT, llvm::X86Disassembler::ATTR_ADSIZE, llvm::X86Disassembler::ATTR_EVEX, llvm::X86Disassembler::ATTR_EVEXB, llvm::X86Disassembler::ATTR_EVEXK, llvm::X86Disassembler::ATTR_EVEXKZ, llvm::X86Disassembler::ATTR_EVEXL2, llvm::X86Disassembler::ATTR_EVEXNF, llvm::X86Disassembler::ATTR_EVEXU, llvm::X86Disassembler::ATTR_NONE, llvm::X86Disassembler::ATTR_OPSIZE, llvm::X86Disassembler::ATTR_REX2, llvm::X86Disassembler::ATTR_REXW, llvm::X86Disassembler::ATTR_VEX, llvm::X86Disassembler::ATTR_VEXL, llvm::X86Disassembler::ATTR_XD, llvm::X86Disassembler::ATTR_XS, bFromEVEX4of4, llvm::StringRef::data(), llvm::dbgs(), getInstructionIDWithAttrMask(), llvm::MCInstrInfo::getName(), llvm::X86Disassembler::InternalInstruction::hasAdSize, llvm::X86Disassembler::InternalInstruction::hasOpSize, llvm::X86Disassembler::InternalInstruction::instructionID, INSTRUCTIONS_SYM, is16BitEquivalent(), is64Bit(), isCCMPOrCTEST(), isNF(), l2FromEVEX4of4, lFromEVEX4of4, lFromVEX2of2, lFromVEX3of3, lFromXOP3of3, LLVM_DEBUG, llvm::X86Disassembler::InternalInstruction::mandatoryPrefix, llvm::X86Disassembler::MAP4, llvm::X86Disassembler::InternalInstruction::mode, llvm::X86Disassembler::MODE_16BIT, llvm::X86Disassembler::MODE_64BIT, modFromModRM, llvm::X86Disassembler::InternalInstruction::modRM, llvm::X86Disassembler::ONEBYTE, llvm::X86Disassembler::InternalInstruction::opcode, llvm::X86Disassembler::InternalInstruction::opcodeType, ppFromEVEX3of4, ppFromVEX2of2, ppFromVEX3of3, ppFromXOP3of3, readModRM(), llvm::X86Disassembler::InternalInstruction::repeatPrefix, llvm::X86Disassembler::InternalInstruction::rex2ExtensionPrefix, llvm::X86Disassembler::InternalInstruction::rexPrefix, llvm::X86Disassembler::InternalInstruction::spec, llvm::X86Disassembler::THREEBYTE_38, llvm::X86Disassembler::TWOBYTE, llvm::X86Disassembler::TYPE_EVEX, llvm::X86Disassembler::TYPE_NO_VEX_XOP, llvm::X86Disassembler::TYPE_VEX_2B, llvm::X86Disassembler::TYPE_VEX_3B, llvm::X86Disassembler::TYPE_XOP, uFromEVEX3of4, llvm::X86Disassembler::InternalInstruction::vectorExtensionPrefix, llvm::X86Disassembler::InternalInstruction::vectorExtensionType, llvm::X86Disassembler::VEX_PREFIX_66, llvm::X86Disassembler::VEX_PREFIX_F2, llvm::X86Disassembler::VEX_PREFIX_F3, wFromEVEX3of4, wFromVEX3of3, wFromXOP3of3, and zFromEVEX4of4.

◆ getInstructionIDWithAttrMask()

int getInstructionIDWithAttrMask ( uint16_t * instructionID,
struct InternalInstruction * insn,
uint16_t attrMask )
static

Definition at line 1097 of file X86Disassembler.cpp.

References decode(), llvm::X86Disassembler::MAP4, MAP4_SYM, llvm::X86Disassembler::MAP5, MAP5_SYM, llvm::X86Disassembler::MAP6, MAP6_SYM, llvm::X86Disassembler::MAP7, MAP7_SYM, llvm::X86Disassembler::InternalInstruction::modRM, ModRMDecision::modrm_type, OpcodeDecision::modRMDecisions, llvm::X86Disassembler::ONEBYTE, ONEBYTE_SYM, llvm::X86Disassembler::InternalInstruction::opcode, ContextDecision::opcodeDecisions, llvm::X86Disassembler::InternalInstruction::opcodeType, readModRM(), THREEBYTE38_SYM, THREEBYTE3A_SYM, llvm::X86Disassembler::THREEBYTE_38, llvm::X86Disassembler::THREEBYTE_3A, llvm::X86Disassembler::THREEDNOW_MAP, THREEDNOW_MAP_SYM, llvm::X86Disassembler::TWOBYTE, TWOBYTE_SYM, llvm::X86Disassembler::XOP8_MAP, XOP8_MAP_SYM, llvm::X86Disassembler::XOP9_MAP, XOP9_MAP_SYM, llvm::X86Disassembler::XOPA_MAP, and XOPA_MAP_SYM.

Referenced by getInstructionID().

◆ is16BitEquivalent()

bool is16BitEquivalent ( const char * orig,
const char * equiv )
static

Definition at line 1067 of file X86Disassembler.cpp.

Referenced by getInstructionID().

◆ is64Bit()

bool is64Bit ( const char * name)
static

Definition at line 1086 of file X86Disassembler.cpp.

References name.

Referenced by llvm::X86Subtarget::avoidMFence(), llvm::X86Subtarget::canUseCMOV(), llvm::X86Subtarget::canUseCMPXCHG16B(), llvm::X86Subtarget::canUseLAHFSAHF(), CC_X86_Intr(), llvm::X86Subtarget::classifyGlobalFunctionReference(), llvm::X86Subtarget::classifyGlobalReference(), llvm::X86Subtarget::classifyLocalReference(), computeDataLayout(), computeDataLayout(), ComputeLinkerOptionsLoadCommandSize(), createX86MCAsmInfo(), llvm::PPCFrameLowering::eliminateCallFramePseudoInstr(), llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::SparcSubtarget::getAdjustedFrameSize(), getDataLayoutString(), getEffectiveRelocModel(), getInstructionID(), llvm::object::XCOFFSymbolRef::getName(), llvm::X86TargetLowering::getRegForInlineAsmConstraint(), llvm::SparcSubtarget::getStackPointerBias(), llvm::object::XCOFFSymbolRef::getXCOFFCsectAuxRef(), llvm::X86Subtarget::hasBitScanPassThrough(), llvm::X86Subtarget::hasCLFLUSH(), llvm::X86Subtarget::hasMFence(), llvm::X86::isCalleePop(), llvm::X86Subtarget::isXRaySupported(), LowerBR_CC(), llvm::PPCRegisterInfo::lowerDynamicAreaOffset(), llvm::SparcTargetLowering::LowerF128Compare(), llvm::SparcTargetLowering::LowerOperation(), LowerSELECT_CC(), LowerToTLSExecModel(), llvm::object::MachOBindEntry::MachOBindEntry(), llvm::object::MachORebaseEntry::MachORebaseEntry(), llvm::PPCELFMCAsmInfo::PPCELFMCAsmInfo(), llvm::SparcFrameLowering::SparcFrameLowering(), llvm::X86ELFMCAsmInfo::X86ELFMCAsmInfo(), llvm::X86FrameLowering::X86FrameLowering(), llvm::X86InstrInfo::X86InstrInfo(), llvm::X86MCAsmInfoDarwin::X86MCAsmInfoDarwin(), and llvm::X86Subtarget::X86Subtarget().

◆ isCCMPOrCTEST()

bool isCCMPOrCTEST ( InternalInstruction * insn)
static

Definition at line 1155 of file X86Disassembler.cpp.

References llvm::X86Disassembler::MAP4, llvm::X86Disassembler::InternalInstruction::modRM, llvm::X86Disassembler::InternalInstruction::opcode, llvm::X86Disassembler::InternalInstruction::opcodeType, and regFromModRM.

Referenced by getInstructionID(), readOperands(), and translateOperand().

◆ isNF()

bool isNF ( InternalInstruction * insn)
static

Definition at line 1174 of file X86Disassembler.cpp.

References llvm::X86Disassembler::MAP4, nfFromEVEX4of4, llvm::X86Disassembler::InternalInstruction::opcode, llvm::X86Disassembler::InternalInstruction::opcodeType, ppFromEVEX3of4, llvm::X86Disassembler::THREEBYTE_38, llvm::X86Disassembler::InternalInstruction::vectorExtensionPrefix, and llvm::X86Disassembler::VEX_PREFIX_NONE.

Referenced by getInstructionID().

◆ isREX()

bool isREX ( struct InternalInstruction * insn,
uint8_t prefix )
static

Definition at line 209 of file X86Disassembler.cpp.

References llvm::X86Disassembler::InternalInstruction::mode, and llvm::X86Disassembler::MODE_64BIT.

Referenced by readPrefixes().

◆ isREX2()

bool isREX2 ( struct InternalInstruction * insn,
uint8_t prefix )
static

Definition at line 213 of file X86Disassembler.cpp.

References llvm::X86Disassembler::InternalInstruction::mode, and llvm::X86Disassembler::MODE_64BIT.

Referenced by readPrefixes().

◆ LLVMInitializeX86Disassembler()

LLVM_C_ABI void LLVMInitializeX86Disassembler ( )

Definition at line 2486 of file X86Disassembler.cpp.

References createX86Disassembler(), llvm::getTheX86_32Target(), llvm::getTheX86_64Target(), LLVM_C_ABI, and llvm::TargetRegistry::RegisterMCDisassembler().

◆ peek()

bool peek ( struct InternalInstruction * insn,
uint8_t & byte )
static

Definition at line 191 of file X86Disassembler.cpp.

References llvm::X86Disassembler::InternalInstruction::bytes, llvm::X86Disassembler::InternalInstruction::readerCursor, llvm::ArrayRef< T >::size(), and llvm::X86Disassembler::InternalInstruction::startLocation.

Referenced by readPrefixes().

◆ readDisplacement()

int readDisplacement ( struct InternalInstruction * insn)
static

Definition at line 613 of file X86Disassembler.cpp.

References llvm::consume, llvm::dbgs(), llvm::X86Disassembler::InternalInstruction::displacement, llvm::X86Disassembler::InternalInstruction::displacementOffset, llvm::X86Disassembler::EA_DISP_16, llvm::X86Disassembler::EA_DISP_32, llvm::X86Disassembler::EA_DISP_8, llvm::X86Disassembler::EA_DISP_NONE, llvm::X86Disassembler::InternalInstruction::eaDisplacement, LLVM_DEBUG, llvm::X86Disassembler::InternalInstruction::readerCursor, and llvm::X86Disassembler::InternalInstruction::startLocation.

Referenced by readModRM().

◆ readImmediate()

int readImmediate ( struct InternalInstruction * insn,
uint8_t size )
static

Definition at line 1552 of file X86Disassembler.cpp.

References assert(), llvm::consume, llvm::dbgs(), llvm::X86Disassembler::InternalInstruction::immediateOffset, llvm::X86Disassembler::InternalInstruction::immediates, llvm::X86Disassembler::InternalInstruction::immediateSize, LLVM_DEBUG, llvm_unreachable, llvm::X86Disassembler::InternalInstruction::numImmediatesConsumed, llvm::X86Disassembler::InternalInstruction::readerCursor, llvm::size(), and llvm::X86Disassembler::InternalInstruction::startLocation.

Referenced by readOperands().

◆ readMaskRegister()

int readMaskRegister ( struct InternalInstruction * insn)
static

Definition at line 1623 of file X86Disassembler.cpp.

References aaaFromEVEX4of4, llvm::dbgs(), LLVM_DEBUG, llvm::X86Disassembler::TYPE_EVEX, llvm::X86Disassembler::InternalInstruction::vectorExtensionPrefix, llvm::X86Disassembler::InternalInstruction::vectorExtensionType, and llvm::X86Disassembler::InternalInstruction::writemask.

Referenced by readOperands().

◆ readModRM()

int readModRM ( struct InternalInstruction * insn)
static

Definition at line 644 of file X86Disassembler.cpp.

References llvm::X86Disassembler::InternalInstruction::addressSize, b2FromREX2, bFromREX, llvm::consume, llvm::X86Disassembler::InternalInstruction::consumedModRM, llvm::dbgs(), llvm::X86Disassembler::InternalInstruction::displacementSize, llvm::X86Disassembler::EA_BASE_NONE, llvm::X86Disassembler::EA_DISP_16, llvm::X86Disassembler::EA_DISP_32, llvm::X86Disassembler::EA_DISP_8, llvm::X86Disassembler::EA_DISP_NONE, llvm::X86Disassembler::InternalInstruction::eaBase, llvm::X86Disassembler::InternalInstruction::eaDisplacement, llvm::X86Disassembler::InternalInstruction::eaRegBase, LLVM_DEBUG, llvm::mod(), llvm::X86Disassembler::InternalInstruction::mode, llvm::X86Disassembler::MODE_64BIT, modFromModRM, llvm::X86Disassembler::InternalInstruction::modRM, r2FromEVEX2of4, r2FromREX2, readDisplacement(), readSIB(), llvm::X86Disassembler::InternalInstruction::reg, llvm::X86Disassembler::InternalInstruction::regBase, regFromModRM, llvm::X86Disassembler::InternalInstruction::registerSize, llvm::X86Disassembler::InternalInstruction::rex2ExtensionPrefix, llvm::X86Disassembler::InternalInstruction::rexPrefix, rFromREX, rmFromModRM, llvm::X86Disassembler::TYPE_EVEX, llvm::X86Disassembler::InternalInstruction::vectorExtensionPrefix, and llvm::X86Disassembler::InternalInstruction::vectorExtensionType.

Referenced by getInstructionID(), getInstructionIDWithAttrMask(), readOpcode(), and readOperands().

◆ readOpcode()

bool readOpcode ( struct InternalInstruction * insn)
static

Definition at line 929 of file X86Disassembler.cpp.

References llvm::consume, llvm::dbgs(), llvm::format(), LLVM_DEBUG, llvm::X86Disassembler::InternalInstruction::mandatoryPrefix, llvm::X86Disassembler::MAP4, llvm::X86Disassembler::MAP5, llvm::X86Disassembler::MAP6, llvm::X86Disassembler::MAP7, mFromREX2, mmmFromEVEX2of4, mmmmmFromVEX2of3, mmmmmFromXOP2of3, llvm::X86Disassembler::ONEBYTE, llvm::X86Disassembler::InternalInstruction::opcode, llvm::X86Disassembler::InternalInstruction::opcodeType, readModRM(), llvm::X86Disassembler::InternalInstruction::rex2ExtensionPrefix, llvm::X86Disassembler::THREEBYTE_38, llvm::X86Disassembler::THREEBYTE_3A, llvm::X86Disassembler::THREEDNOW_MAP, llvm::X86Disassembler::TWOBYTE, llvm::X86Disassembler::TYPE_EVEX, llvm::X86Disassembler::TYPE_VEX_2B, llvm::X86Disassembler::TYPE_VEX_3B, llvm::X86Disassembler::TYPE_XOP, llvm::X86Disassembler::InternalInstruction::vectorExtensionPrefix, llvm::X86Disassembler::InternalInstruction::vectorExtensionType, llvm::X86Disassembler::VEX_LOB_0F, llvm::X86Disassembler::VEX_LOB_0F38, llvm::X86Disassembler::VEX_LOB_0F3A, llvm::X86Disassembler::VEX_LOB_MAP4, llvm::X86Disassembler::VEX_LOB_MAP5, llvm::X86Disassembler::VEX_LOB_MAP6, llvm::X86Disassembler::VEX_LOB_MAP7, llvm::X86Disassembler::XOP8_MAP, llvm::X86Disassembler::XOP9_MAP, llvm::X86Disassembler::XOP_MAP_SELECT_8, llvm::X86Disassembler::XOP_MAP_SELECT_9, llvm::X86Disassembler::XOP_MAP_SELECT_A, and llvm::X86Disassembler::XOPA_MAP.

◆ readOpcodeRegister()

int readOpcodeRegister ( struct InternalInstruction * insn,
uint8_t size )
static

Definition at line 1508 of file X86Disassembler.cpp.

References b2FromREX2, bFromREX, llvm::dbgs(), LLVM_DEBUG, llvm::X86Disassembler::InternalInstruction::opcode, llvm::X86Disassembler::InternalInstruction::opcodeRegister, llvm::X86Disassembler::InternalInstruction::registerSize, llvm::X86Disassembler::InternalInstruction::rex2ExtensionPrefix, llvm::X86Disassembler::InternalInstruction::rexPrefix, and llvm::size().

Referenced by readOperands().

◆ readOperands()

int readOperands ( struct InternalInstruction * insn)
static

Definition at line 1636 of file X86Disassembler.cpp.

References llvm::X86Disassembler::InternalInstruction::addressSize, CASE_ENCODING_RM, CASE_ENCODING_VSIB, llvm::dbgs(), debug, llvm::X86Disassembler::InternalInstruction::displacement, llvm::X86Disassembler::EA_DISP_8, llvm::X86Disassembler::InternalInstruction::eaBase, llvm::X86Disassembler::InternalInstruction::eaDisplacement, fixupReg(), llvm::X86Disassembler::InternalInstruction::immediates, llvm::X86Disassembler::InternalInstruction::immediateSize, isCCMPOrCTEST(), l2FromEVEX4of4, lFromEVEX4of4, LLVM_DEBUG, llvm::X86Disassembler::InternalInstruction::mode, llvm::X86Disassembler::MODE_64BIT, llvm::X86Disassembler::InternalInstruction::numImmediatesConsumed, llvm::X86Disassembler::InternalInstruction::opcode, llvm::X86Disassembler::InstructionSpecifier::operands, oszcFromEVEX3of4, llvm::X86Disassembler::InternalInstruction::RC, readImmediate(), readMaskRegister(), readModRM(), readOpcodeRegister(), readVVVV(), scFromEVEX4of4, llvm::X86Disassembler::SIB_INDEX_NONE, llvm::X86Disassembler::InternalInstruction::sibIndex, llvm::X86Disassembler::InternalInstruction::sibIndexBase, llvm::X86Disassembler::InternalInstruction::spec, llvm::X86Disassembler::TYPE_EVEX, v2FromEVEX4of4, llvm::X86Disassembler::InternalInstruction::vectorExtensionPrefix, llvm::X86Disassembler::InternalInstruction::vectorExtensionType, and llvm::X86Disassembler::InternalInstruction::vvvv.

◆ readPrefixes()

int readPrefixes ( struct InternalInstruction * insn)
static

Definition at line 222 of file X86Disassembler.cpp.

References llvm::X86Disassembler::InternalInstruction::addressSize, b2FromEVEX2of4, bFromEVEX2of4, bFromREX2, bFromVEX2of3, bFromXOP2of3, llvm::consume, llvm::dbgs(), llvm::X86Disassembler::InternalInstruction::displacementSize, llvm::format(), llvm::X86Disassembler::InternalInstruction::hasAdSize, llvm::X86Disassembler::InternalInstruction::hasLockPrefix, llvm::X86Disassembler::InternalInstruction::hasOpSize, llvm::X86Disassembler::InternalInstruction::immediateSize, isPrefix(), isREX(), isREX2(), LLVM_DEBUG, llvm::X86Disassembler::InternalInstruction::mandatoryPrefix, llvm::X86Disassembler::InternalInstruction::mode, llvm::X86Disassembler::MODE_16BIT, llvm::X86Disassembler::MODE_32BIT, llvm::X86Disassembler::MODE_64BIT, nextByte(), peek(), ppFromVEX2of2, ppFromXOP3of3, r2FromEVEX2of4, llvm::X86Disassembler::InternalInstruction::readerCursor, llvm::X86Disassembler::InternalInstruction::registerSize, llvm::X86Disassembler::InternalInstruction::repeatPrefix, llvm::X86Disassembler::InternalInstruction::rex2ExtensionPrefix, llvm::X86Disassembler::InternalInstruction::rexPrefix, rFromEVEX2of4, rFromREX2, rFromVEX2of2, rFromVEX2of3, rFromXOP2of3, llvm::X86Disassembler::SEG_OVERRIDE_CS, llvm::X86Disassembler::SEG_OVERRIDE_DS, llvm::X86Disassembler::SEG_OVERRIDE_ES, llvm::X86Disassembler::SEG_OVERRIDE_FS, llvm::X86Disassembler::SEG_OVERRIDE_GS, llvm::X86Disassembler::SEG_OVERRIDE_SS, llvm::X86Disassembler::InternalInstruction::segmentOverride, llvm::X86Disassembler::InternalInstruction::startLocation, llvm::X86Disassembler::TYPE_EVEX, llvm::X86Disassembler::TYPE_NO_VEX_XOP, llvm::X86Disassembler::TYPE_VEX_2B, llvm::X86Disassembler::TYPE_VEX_3B, llvm::X86Disassembler::TYPE_XOP, uFromEVEX3of4, llvm::X86Disassembler::InternalInstruction::vectorExtensionPrefix, llvm::X86Disassembler::InternalInstruction::vectorExtensionType, llvm::X86Disassembler::VEX_PREFIX_66, wFromEVEX3of4, wFromREX, wFromREX2, wFromVEX3of3, wFromXOP3of3, llvm::X86Disassembler::InternalInstruction::xAcquireRelease, xFromEVEX2of4, xFromREX2, xFromVEX2of3, and xFromXOP2of3.

◆ readSIB()

int readSIB ( struct InternalInstruction * insn)
static

Definition at line 549 of file X86Disassembler.cpp.

References llvm::X86Disassembler::InternalInstruction::addressSize, b2FromREX2, baseFromSIB, bFromREX, llvm::consume, llvm::dbgs(), llvm::X86Disassembler::EA_DISP_32, llvm::X86Disassembler::EA_DISP_8, llvm::X86Disassembler::InternalInstruction::eaDisplacement, indexFromSIB, LLVM_DEBUG, llvm_unreachable, modFromModRM, llvm::X86Disassembler::InternalInstruction::modRM, llvm::X86Disassembler::InternalInstruction::rex2ExtensionPrefix, llvm::X86Disassembler::InternalInstruction::rexPrefix, scaleFromSIB, llvm::X86Disassembler::InternalInstruction::sib, llvm::X86Disassembler::SIB_BASE_NONE, llvm::X86Disassembler::SIB_INDEX_NONE, llvm::X86Disassembler::InternalInstruction::sibBase, llvm::X86Disassembler::InternalInstruction::sibIndex, llvm::X86Disassembler::InternalInstruction::sibIndexBase, llvm::X86Disassembler::InternalInstruction::sibScale, x2FromREX2, and xFromREX.

Referenced by readModRM().

◆ readVVVV()

int readVVVV ( struct InternalInstruction * insn)
static

Definition at line 1596 of file X86Disassembler.cpp.

References llvm::dbgs(), LLVM_DEBUG, llvm::X86Disassembler::InternalInstruction::mode, llvm::X86Disassembler::MODE_64BIT, llvm::X86Disassembler::TYPE_EVEX, llvm::X86Disassembler::TYPE_VEX_2B, llvm::X86Disassembler::TYPE_VEX_3B, llvm::X86Disassembler::TYPE_XOP, v2FromEVEX4of4, llvm::X86Disassembler::InternalInstruction::vectorExtensionPrefix, llvm::X86Disassembler::InternalInstruction::vectorExtensionType, llvm::X86Disassembler::InternalInstruction::vvvv, vvvvFromEVEX3of4, vvvvFromVEX2of2, vvvvFromVEX3of3, and vvvvFromXOP3of3.

Referenced by readOperands().

◆ translateDstIndex()

bool translateDstIndex ( MCInst & mcInst,
InternalInstruction & insn )
static

translateDstIndex - Appends a destination index operand to an MCInst.

Parameters
mcInst- The MCInst to append to.
insn- The internal instruction.

Definition at line 1979 of file X86Disassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createReg(), llvm::X86Disassembler::InternalInstruction::hasAdSize, llvm::X86Disassembler::InternalInstruction::mode, llvm::X86Disassembler::MODE_16BIT, llvm::X86Disassembler::MODE_32BIT, and llvm::X86Disassembler::MODE_64BIT.

Referenced by translateOperand().

◆ translateFPRegister()

void translateFPRegister ( MCInst & mcInst,
uint8_t stackPos )
static

translateFPRegister - Translates a stack position on the FPU stack to its LLVM form, and appends it to an MCInst.

Parameters
mcInst- The MCInst to append to.
stackPos- The stack position to translate.

Definition at line 2348 of file X86Disassembler.cpp.

References llvm::MCInst::addOperand(), and llvm::MCOperand::createReg().

Referenced by translateOperand().

◆ translateImmediate()

void translateImmediate ( MCInst & mcInst,
uint64_t immediate,
const OperandSpecifier & operand,
InternalInstruction & insn,
const MCDisassembler * Dis )
static

translateImmediate - Appends an immediate operand to an MCInst.

Parameters
mcInst- The MCInst to append to.
immediate- The immediate value to append.
operand- The operand, as stored in the descriptor table.
insn- The internal instruction.

Definition at line 2001 of file X86Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::X86Disassembler::InternalInstruction::displacementSize, llvm::X86Disassembler::OperandSpecifier::encoding, llvm::X86Disassembler::InternalInstruction::immediateOffset, llvm::X86Disassembler::InternalInstruction::immediateSize, isBranch(), llvm::X86Disassembler::InternalInstruction::length, llvm::X86Disassembler::InternalInstruction::segmentOverride, segmentRegnums, llvm::X86Disassembler::InternalInstruction::startLocation, llvm::MCDisassembler::tryAddingSymbolicOperand(), and llvm::X86Disassembler::OperandSpecifier::type.

Referenced by translateOperand().

◆ translateInstruction()

bool translateInstruction ( MCInst & mcInst,
InternalInstruction & insn,
const MCDisassembler * Dis )
static

translateInstruction - Translates an internal instruction and all its operands to an MCInst.

Parameters
mcInst- The MCInst to populate with the instruction's data.
insn- The internal instruction.
Returns
- false on success; true otherwise.

Definition at line 2446 of file X86Disassembler.cpp.

References llvm::MCInst::clear(), debug, llvm::MCInst::getOpcode(), llvm::X86Disassembler::InternalInstruction::instructionID, llvm::X86Disassembler::InternalInstruction::numImmediatesTranslated, llvm::X86Disassembler::InternalInstruction::operands, llvm::MCInst::setOpcode(), llvm::X86Disassembler::InternalInstruction::spec, translateOperand(), and llvm::X86Disassembler::InternalInstruction::xAcquireRelease.

◆ translateMaskRegister()

bool translateMaskRegister ( MCInst & mcInst,
uint8_t maskRegNum )
static

translateMaskRegister - Translates a 3-bit mask register number to LLVM form, and appends it to an MCInst.

Parameters
mcInst- The MCInst to append to.
maskRegNum- Number of mask register from 0 to 7.
Returns
- false on success; true otherwise.

Definition at line 2359 of file X86Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), and debug.

Referenced by translateOperand().

◆ translateOperand()

bool translateOperand ( MCInst & mcInst,
const OperandSpecifier & operand,
InternalInstruction & insn,
const MCDisassembler * Dis )
static

translateOperand - Translates an operand stored in an internal instruction to LLVM's format and appends it to an MCInst.

Parameters
mcInst- The MCInst to append to.
operand- The operand, as stored in the descriptor table.
insn- The internal instruction.
Returns
- false on success; true otherwise.

Definition at line 2377 of file X86Disassembler.cpp.

References llvm::MCInst::addOperand(), CASE_ENCODING_RM, CASE_ENCODING_VSIB, llvm::MCOperand::createImm(), debug, llvm::X86Disassembler::OperandSpecifier::encoding, llvm::X86Disassembler::InternalInstruction::immediates, isCCMPOrCTEST(), llvm::X86Disassembler::InternalInstruction::modRM, llvm::X86Disassembler::InternalInstruction::numImmediatesTranslated, llvm::X86Disassembler::InternalInstruction::opcodeRegister, llvm::X86Disassembler::InternalInstruction::operands, llvm::X86Disassembler::InternalInstruction::RC, llvm::X86Disassembler::InternalInstruction::reg, translateDstIndex(), translateFPRegister(), translateImmediate(), translateMaskRegister(), translateOperand(), translateRegister(), translateRM(), translateSrcIndex(), llvm::X86Disassembler::OperandSpecifier::type, llvm::X86Disassembler::InternalInstruction::vvvv, and llvm::X86Disassembler::InternalInstruction::writemask.

Referenced by translateInstruction(), and translateOperand().

◆ translateRegister()

void translateRegister ( MCInst & mcInst,
Reg reg )
static

translateRegister - Translates an internal register to the appropriate LLVM register, and appends it as an operand to an MCInst.

Parameters
mcInst- The MCInst to append to.
reg- The Reg to append.

Definition at line 1931 of file X86Disassembler.cpp.

References llvm::MCInst::addOperand(), ALL_REGS, and llvm::MCOperand::createReg().

Referenced by translateOperand().

◆ translateRM()

bool translateRM ( MCInst & mcInst,
const OperandSpecifier & operand,
InternalInstruction & insn,
const MCDisassembler * Dis )
static

translateRM - Translates an operand stored in the R/M (and possibly SIB) byte of an instruction to LLVM form, and appends it to an MCInst.

Parameters
mcInst- The MCInst to append to.
operand- The operand, as stored in the descriptor table.
insn- The instruction to extract Mod, R/M, and SIB fields from.
Returns
- 0 on success; nonzero otherwise

Definition at line 2310 of file X86Disassembler.cpp.

References debug, translateRMMemory(), translateRMRegister(), and llvm::X86Disassembler::OperandSpecifier::type.

Referenced by translateOperand().

◆ translateRMMemory()

bool translateRMMemory ( MCInst & mcInst,
InternalInstruction & insn,
const MCDisassembler * Dis,
bool ForceSIB = false )
static

translateRMMemory - Translates a memory operand stored in the Mod and R/M fields of an internal instruction (and possibly its SIB byte) to a memory operand in LLVM's format, and appends it to an MCInst.

Parameters
mcInst- The MCInst to append to.
insn- The instruction to extract Mod, R/M, and SIB fields from.
ForceSIB- The instruction must use SIB.
Returns
- 0 on success; nonzero otherwise

Definition at line 2145 of file X86Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::X86Disassembler::InternalInstruction::addressSize, ALL_EA_BASES, ALL_REGS, ALL_SIB_BASES, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), debug, llvm::X86Disassembler::InternalInstruction::displacement, llvm::X86Disassembler::InternalInstruction::displacementOffset, llvm::X86Disassembler::InternalInstruction::displacementSize, llvm::X86Disassembler::EA_BASE_NONE, EA_BASES_32BIT, EA_BASES_64BIT, llvm::X86Disassembler::EA_DISP_NONE, llvm::X86Disassembler::InternalInstruction::eaBase, llvm::X86Disassembler::InternalInstruction::eaDisplacement, llvm::X86Disassembler::InternalInstruction::length, llvm::X86Disassembler::InternalInstruction::mode, llvm::X86Disassembler::MODE_64BIT, REGS_XMM, REGS_YMM, REGS_ZMM, llvm::X86Disassembler::InternalInstruction::segmentOverride, segmentRegnums, llvm::X86Disassembler::SIB_BASE_NONE, llvm::X86Disassembler::SIB_INDEX_NONE, llvm::X86Disassembler::InternalInstruction::sibBase, llvm::X86Disassembler::InternalInstruction::sibIndex, llvm::X86Disassembler::InternalInstruction::sibScale, llvm::X86Disassembler::InternalInstruction::startLocation, llvm::MCDisassembler::tryAddingPcLoadReferenceComment(), and llvm::MCDisassembler::tryAddingSymbolicOperand().

Referenced by translateRM().

◆ translateRMRegister()

bool translateRMRegister ( MCInst & mcInst,
InternalInstruction & insn )
static

translateRMRegister - Translates a register stored in the R/M field of the ModR/M byte to its LLVM equivalent and appends it to an MCInst.

Parameters
mcInst- The MCInst to append to.
insn- The internal instruction to extract the R/M field from.
Returns
- 0 on success; -1 otherwise

Definition at line 2106 of file X86Disassembler.cpp.

References ALL_EA_BASES, ALL_REGS, debug, llvm::X86Disassembler::EA_BASE_NONE, and llvm::X86Disassembler::InternalInstruction::eaBase.

Referenced by translateRM().

◆ translateSrcIndex()

bool translateSrcIndex ( MCInst & mcInst,
InternalInstruction & insn )
static

translateSrcIndex - Appends a source index operand to an MCInst.

Parameters
mcInst- The MCInst to append to.
insn- The internal instruction.

Definition at line 1954 of file X86Disassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createReg(), llvm::X86Disassembler::InternalInstruction::hasAdSize, llvm::X86Disassembler::InternalInstruction::mode, llvm::X86Disassembler::MODE_16BIT, llvm::X86Disassembler::MODE_32BIT, llvm::X86Disassembler::MODE_64BIT, llvm::X86Disassembler::InternalInstruction::segmentOverride, and segmentRegnums.

Referenced by translateOperand().

Variable Documentation

◆ segmentRegnums

const uint8_t segmentRegnums[SEG_OVERRIDE_max]
static
Initial value:
= {
0,
X86::CS,
X86::SS,
X86::DS,
X86::ES,
X86::FS,
X86::GS
}

Definition at line 1940 of file X86Disassembler.cpp.

Referenced by translateImmediate(), translateRMMemory(), and translateSrcIndex().

Generated on for LLVM by doxygen 1.14.0